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pll
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dp_pll_10nm.h

dp_pll_10nm.h 1.4 KB
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  1. /* SPDX-License-Identifier: GPL-2.0-only */
    2. 

  2. /*
    3. 

  3.  * Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.
    4. 

  4.  */
    5. 

  5. 

  6. #ifndef __MDSS_DP_PLL_10NM_H
    7. 

  7. #define __MDSS_DP_PLL_10NM_H
    8. 

  8. 

  9. #define DP_VCO_HSCLK_RATE_1620MHZDIV1000	1620000UL
    10. 

  10. #define DP_VCO_HSCLK_RATE_2700MHZDIV1000	2700000UL
    11. 

  11. #define DP_VCO_HSCLK_RATE_5400MHZDIV1000	5400000UL
    12. 

  12. #define DP_VCO_HSCLK_RATE_8100MHZDIV1000	8100000UL
    13. 

  13. 

  14. struct dp_pll_db {
    15. 

  15. 	struct mdss_pll_resources *pll;
    16. 

  16. 

  17. 	/* lane and orientation settings */
    18. 

  18. 	u8 lane_cnt;
    19. 

  19. 	u8 orientation;
    20. 

  20. 

  21. 	/* COM PHY settings */
    22. 

  22. 	u32 hsclk_sel;
    23. 

  23. 	u32 dec_start_mode0;
    24. 

  24. 	u32 div_frac_start1_mode0;
    25. 

  25. 	u32 div_frac_start2_mode0;
    26. 

  26. 	u32 div_frac_start3_mode0;
    27. 

  27. 	u32 integloop_gain0_mode0;
    28. 

  28. 	u32 integloop_gain1_mode0;
    29. 

  29. 	u32 vco_tune_map;
    30. 

  30. 	u32 lock_cmp1_mode0;
    31. 

  31. 	u32 lock_cmp2_mode0;
    32. 

  32. 	u32 lock_cmp3_mode0;
    33. 

  33. 	u32 lock_cmp_en;
    34. 

  34. 

  35. 	/* PHY vco divider */
    36. 

  36. 	u32 phy_vco_div;
    37. 

  37. };
    38. 

  38. 

  39. int dp_vco_set_rate_10nm(struct clk_hw *hw, unsigned long rate,
    40. 

  40. 				unsigned long parent_rate);
    41. 

  41. unsigned long dp_vco_recalc_rate_10nm(struct clk_hw *hw,
    42. 

  42. 				unsigned long parent_rate);
    43. 

  43. long dp_vco_round_rate_10nm(struct clk_hw *hw, unsigned long rate,
    44. 

  44. 				unsigned long *parent_rate);
    45. 

  45. int dp_vco_prepare_10nm(struct clk_hw *hw);
    46. 

  46. void dp_vco_unprepare_10nm(struct clk_hw *hw);
    47. 

  47. int dp_mux_set_parent_10nm(void *context,
    48. 

  48. 				unsigned int reg, unsigned int val);
    49. 

  49. int dp_mux_get_parent_10nm(void *context,
    50. 

  50. 				unsigned int reg, unsigned int *val);
    51. 

  51. #endif /* __MDSS_DP_PLL_10NM_H */
    52.