dp_tx.c 117 KB

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  1. /*
  2. * Copyright (c) 2016-2020 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "htt.h"
  19. #include "dp_htt.h"
  20. #include "hal_hw_headers.h"
  21. #include "dp_tx.h"
  22. #include "dp_tx_desc.h"
  23. #include "dp_peer.h"
  24. #include "dp_types.h"
  25. #include "hal_tx.h"
  26. #include "qdf_mem.h"
  27. #include "qdf_nbuf.h"
  28. #include "qdf_net_types.h"
  29. #include <wlan_cfg.h>
  30. #include "dp_ipa.h"
  31. #if defined(MESH_MODE_SUPPORT) || defined(FEATURE_PERPKT_INFO)
  32. #include "if_meta_hdr.h"
  33. #endif
  34. #include "enet.h"
  35. #include "dp_internal.h"
  36. #ifdef FEATURE_WDS
  37. #include "dp_txrx_wds.h"
  38. #endif
  39. #ifdef ATH_SUPPORT_IQUE
  40. #include "dp_txrx_me.h"
  41. #endif
  42. /* TODO Add support in TSO */
  43. #define DP_DESC_NUM_FRAG(x) 0
  44. /* disable TQM_BYPASS */
  45. #define TQM_BYPASS_WAR 0
  46. /* invalid peer id for reinject*/
  47. #define DP_INVALID_PEER 0XFFFE
  48. /*mapping between hal encrypt type and cdp_sec_type*/
  49. #define MAX_CDP_SEC_TYPE 12
  50. static const uint8_t sec_type_map[MAX_CDP_SEC_TYPE] = {
  51. HAL_TX_ENCRYPT_TYPE_NO_CIPHER,
  52. HAL_TX_ENCRYPT_TYPE_WEP_128,
  53. HAL_TX_ENCRYPT_TYPE_WEP_104,
  54. HAL_TX_ENCRYPT_TYPE_WEP_40,
  55. HAL_TX_ENCRYPT_TYPE_TKIP_WITH_MIC,
  56. HAL_TX_ENCRYPT_TYPE_TKIP_NO_MIC,
  57. HAL_TX_ENCRYPT_TYPE_AES_CCMP_128,
  58. HAL_TX_ENCRYPT_TYPE_WAPI,
  59. HAL_TX_ENCRYPT_TYPE_AES_CCMP_256,
  60. HAL_TX_ENCRYPT_TYPE_AES_GCMP_128,
  61. HAL_TX_ENCRYPT_TYPE_AES_GCMP_256,
  62. HAL_TX_ENCRYPT_TYPE_WAPI_GCM_SM4};
  63. #ifdef QCA_TX_LIMIT_CHECK
  64. /**
  65. * dp_tx_limit_check - Check if allocated tx descriptors reached
  66. * soc max limit and pdev max limit
  67. * @vdev: DP vdev handle
  68. *
  69. * Return: true if allocated tx descriptors reached max configured value, else
  70. * false
  71. */
  72. static inline bool
  73. dp_tx_limit_check(struct dp_vdev *vdev)
  74. {
  75. struct dp_pdev *pdev = vdev->pdev;
  76. struct dp_soc *soc = pdev->soc;
  77. if (qdf_atomic_read(&soc->num_tx_outstanding) >=
  78. soc->num_tx_allowed) {
  79. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  80. "%s: queued packets are more than max tx, drop the frame",
  81. __func__);
  82. DP_STATS_INC(vdev, tx_i.dropped.desc_na.num, 1);
  83. return true;
  84. }
  85. if (qdf_atomic_read(&pdev->num_tx_outstanding) >=
  86. pdev->num_tx_allowed) {
  87. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  88. "%s: queued packets are more than max tx, drop the frame",
  89. __func__);
  90. DP_STATS_INC(vdev, tx_i.dropped.desc_na.num, 1);
  91. return true;
  92. }
  93. return false;
  94. }
  95. /**
  96. * dp_tx_outstanding_inc - Increment outstanding tx desc values on pdev and soc
  97. * @vdev: DP pdev handle
  98. *
  99. * Return: void
  100. */
  101. static inline void
  102. dp_tx_outstanding_inc(struct dp_pdev *pdev)
  103. {
  104. struct dp_soc *soc = pdev->soc;
  105. qdf_atomic_inc(&pdev->num_tx_outstanding);
  106. qdf_atomic_inc(&soc->num_tx_outstanding);
  107. }
  108. /**
  109. * dp_tx_outstanding__dec - Decrement outstanding tx desc values on pdev and soc
  110. * @vdev: DP pdev handle
  111. *
  112. * Return: void
  113. */
  114. static inline void
  115. dp_tx_outstanding_dec(struct dp_pdev *pdev)
  116. {
  117. struct dp_soc *soc = pdev->soc;
  118. qdf_atomic_dec(&pdev->num_tx_outstanding);
  119. qdf_atomic_dec(&soc->num_tx_outstanding);
  120. }
  121. #else //QCA_TX_LIMIT_CHECK
  122. static inline bool
  123. dp_tx_limit_check(struct dp_vdev *vdev)
  124. {
  125. return false;
  126. }
  127. static inline void
  128. dp_tx_outstanding_inc(struct dp_pdev *pdev)
  129. {
  130. qdf_atomic_inc(&pdev->num_tx_outstanding);
  131. }
  132. static inline void
  133. dp_tx_outstanding_dec(struct dp_pdev *pdev)
  134. {
  135. qdf_atomic_dec(&pdev->num_tx_outstanding);
  136. }
  137. #endif //QCA_TX_LIMIT_CHECK
  138. #if defined(FEATURE_TSO)
  139. /**
  140. * dp_tx_tso_unmap_segment() - Unmap TSO segment
  141. *
  142. * @soc - core txrx main context
  143. * @seg_desc - tso segment descriptor
  144. * @num_seg_desc - tso number segment descriptor
  145. */
  146. static void dp_tx_tso_unmap_segment(
  147. struct dp_soc *soc,
  148. struct qdf_tso_seg_elem_t *seg_desc,
  149. struct qdf_tso_num_seg_elem_t *num_seg_desc)
  150. {
  151. TSO_DEBUG("%s: Unmap the tso segment", __func__);
  152. if (qdf_unlikely(!seg_desc)) {
  153. DP_TRACE(ERROR, "%s %d TSO desc is NULL!",
  154. __func__, __LINE__);
  155. qdf_assert(0);
  156. } else if (qdf_unlikely(!num_seg_desc)) {
  157. DP_TRACE(ERROR, "%s %d TSO num desc is NULL!",
  158. __func__, __LINE__);
  159. qdf_assert(0);
  160. } else {
  161. bool is_last_seg;
  162. /* no tso segment left to do dma unmap */
  163. if (num_seg_desc->num_seg.tso_cmn_num_seg < 1)
  164. return;
  165. is_last_seg = (num_seg_desc->num_seg.tso_cmn_num_seg == 1) ?
  166. true : false;
  167. qdf_nbuf_unmap_tso_segment(soc->osdev,
  168. seg_desc, is_last_seg);
  169. num_seg_desc->num_seg.tso_cmn_num_seg--;
  170. }
  171. }
  172. /**
  173. * dp_tx_tso_desc_release() - Release the tso segment and tso_cmn_num_seg
  174. * back to the freelist
  175. *
  176. * @soc - soc device handle
  177. * @tx_desc - Tx software descriptor
  178. */
  179. static void dp_tx_tso_desc_release(struct dp_soc *soc,
  180. struct dp_tx_desc_s *tx_desc)
  181. {
  182. TSO_DEBUG("%s: Free the tso descriptor", __func__);
  183. if (qdf_unlikely(!tx_desc->tso_desc)) {
  184. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  185. "%s %d TSO desc is NULL!",
  186. __func__, __LINE__);
  187. qdf_assert(0);
  188. } else if (qdf_unlikely(!tx_desc->tso_num_desc)) {
  189. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  190. "%s %d TSO num desc is NULL!",
  191. __func__, __LINE__);
  192. qdf_assert(0);
  193. } else {
  194. struct qdf_tso_num_seg_elem_t *tso_num_desc =
  195. (struct qdf_tso_num_seg_elem_t *)tx_desc->tso_num_desc;
  196. /* Add the tso num segment into the free list */
  197. if (tso_num_desc->num_seg.tso_cmn_num_seg == 0) {
  198. dp_tso_num_seg_free(soc, tx_desc->pool_id,
  199. tx_desc->tso_num_desc);
  200. tx_desc->tso_num_desc = NULL;
  201. DP_STATS_INC(tx_desc->pdev, tso_stats.tso_comp, 1);
  202. }
  203. /* Add the tso segment into the free list*/
  204. dp_tx_tso_desc_free(soc,
  205. tx_desc->pool_id, tx_desc->tso_desc);
  206. tx_desc->tso_desc = NULL;
  207. }
  208. }
  209. #else
  210. static void dp_tx_tso_unmap_segment(
  211. struct dp_soc *soc,
  212. struct qdf_tso_seg_elem_t *seg_desc,
  213. struct qdf_tso_num_seg_elem_t *num_seg_desc)
  214. {
  215. }
  216. static void dp_tx_tso_desc_release(struct dp_soc *soc,
  217. struct dp_tx_desc_s *tx_desc)
  218. {
  219. }
  220. #endif
  221. /**
  222. * dp_tx_desc_release() - Release Tx Descriptor
  223. * @tx_desc : Tx Descriptor
  224. * @desc_pool_id: Descriptor Pool ID
  225. *
  226. * Deallocate all resources attached to Tx descriptor and free the Tx
  227. * descriptor.
  228. *
  229. * Return:
  230. */
  231. static void
  232. dp_tx_desc_release(struct dp_tx_desc_s *tx_desc, uint8_t desc_pool_id)
  233. {
  234. struct dp_pdev *pdev = tx_desc->pdev;
  235. struct dp_soc *soc;
  236. uint8_t comp_status = 0;
  237. qdf_assert(pdev);
  238. soc = pdev->soc;
  239. if (tx_desc->frm_type == dp_tx_frm_tso)
  240. dp_tx_tso_desc_release(soc, tx_desc);
  241. if (tx_desc->flags & DP_TX_DESC_FLAG_FRAG)
  242. dp_tx_ext_desc_free(soc, tx_desc->msdu_ext_desc, desc_pool_id);
  243. if (tx_desc->flags & DP_TX_DESC_FLAG_ME)
  244. dp_tx_me_free_buf(tx_desc->pdev, tx_desc->me_buffer);
  245. dp_tx_outstanding_dec(pdev);
  246. if (tx_desc->flags & DP_TX_DESC_FLAG_TO_FW)
  247. qdf_atomic_dec(&pdev->num_tx_exception);
  248. if (HAL_TX_COMP_RELEASE_SOURCE_TQM ==
  249. hal_tx_comp_get_buffer_source(&tx_desc->comp))
  250. comp_status = hal_tx_comp_get_release_reason(&tx_desc->comp,
  251. soc->hal_soc);
  252. else
  253. comp_status = HAL_TX_COMP_RELEASE_REASON_FW;
  254. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  255. "Tx Completion Release desc %d status %d outstanding %d",
  256. tx_desc->id, comp_status,
  257. qdf_atomic_read(&pdev->num_tx_outstanding));
  258. dp_tx_desc_free(soc, tx_desc, desc_pool_id);
  259. return;
  260. }
  261. /**
  262. * dp_tx_htt_metadata_prepare() - Prepare HTT metadata for special frames
  263. * @vdev: DP vdev Handle
  264. * @nbuf: skb
  265. * @msdu_info: msdu_info required to create HTT metadata
  266. *
  267. * Prepares and fills HTT metadata in the frame pre-header for special frames
  268. * that should be transmitted using varying transmit parameters.
  269. * There are 2 VDEV modes that currently needs this special metadata -
  270. * 1) Mesh Mode
  271. * 2) DSRC Mode
  272. *
  273. * Return: HTT metadata size
  274. *
  275. */
  276. static uint8_t dp_tx_prepare_htt_metadata(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  277. struct dp_tx_msdu_info_s *msdu_info)
  278. {
  279. uint32_t *meta_data = msdu_info->meta_data;
  280. struct htt_tx_msdu_desc_ext2_t *desc_ext =
  281. (struct htt_tx_msdu_desc_ext2_t *) meta_data;
  282. uint8_t htt_desc_size;
  283. /* Size rounded of multiple of 8 bytes */
  284. uint8_t htt_desc_size_aligned;
  285. uint8_t *hdr = NULL;
  286. /*
  287. * Metadata - HTT MSDU Extension header
  288. */
  289. htt_desc_size = sizeof(struct htt_tx_msdu_desc_ext2_t);
  290. htt_desc_size_aligned = (htt_desc_size + 7) & ~0x7;
  291. if (vdev->mesh_vdev || msdu_info->is_tx_sniffer ||
  292. HTT_TX_MSDU_EXT2_DESC_FLAG_VALID_KEY_FLAGS_GET(msdu_info->
  293. meta_data[0])) {
  294. if (qdf_unlikely(qdf_nbuf_headroom(nbuf) <
  295. htt_desc_size_aligned)) {
  296. nbuf = qdf_nbuf_realloc_headroom(nbuf,
  297. htt_desc_size_aligned);
  298. if (!nbuf) {
  299. /*
  300. * qdf_nbuf_realloc_headroom won't do skb_clone
  301. * as skb_realloc_headroom does. so, no free is
  302. * needed here.
  303. */
  304. DP_STATS_INC(vdev,
  305. tx_i.dropped.headroom_insufficient,
  306. 1);
  307. qdf_print(" %s[%d] skb_realloc_headroom failed",
  308. __func__, __LINE__);
  309. return 0;
  310. }
  311. }
  312. /* Fill and add HTT metaheader */
  313. hdr = qdf_nbuf_push_head(nbuf, htt_desc_size_aligned);
  314. if (!hdr) {
  315. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  316. "Error in filling HTT metadata");
  317. return 0;
  318. }
  319. qdf_mem_copy(hdr, desc_ext, htt_desc_size);
  320. } else if (vdev->opmode == wlan_op_mode_ocb) {
  321. /* Todo - Add support for DSRC */
  322. }
  323. return htt_desc_size_aligned;
  324. }
  325. /**
  326. * dp_tx_prepare_tso_ext_desc() - Prepare MSDU extension descriptor for TSO
  327. * @tso_seg: TSO segment to process
  328. * @ext_desc: Pointer to MSDU extension descriptor
  329. *
  330. * Return: void
  331. */
  332. #if defined(FEATURE_TSO)
  333. static void dp_tx_prepare_tso_ext_desc(struct qdf_tso_seg_t *tso_seg,
  334. void *ext_desc)
  335. {
  336. uint8_t num_frag;
  337. uint32_t tso_flags;
  338. /*
  339. * Set tso_en, tcp_flags(NS, CWR, ECE, URG, ACK, PSH, RST, SYN, FIN),
  340. * tcp_flag_mask
  341. *
  342. * Checksum enable flags are set in TCL descriptor and not in Extension
  343. * Descriptor (H/W ignores checksum_en flags in MSDU ext descriptor)
  344. */
  345. tso_flags = *(uint32_t *) &tso_seg->tso_flags;
  346. hal_tx_ext_desc_set_tso_flags(ext_desc, tso_flags);
  347. hal_tx_ext_desc_set_msdu_length(ext_desc, tso_seg->tso_flags.l2_len,
  348. tso_seg->tso_flags.ip_len);
  349. hal_tx_ext_desc_set_tcp_seq(ext_desc, tso_seg->tso_flags.tcp_seq_num);
  350. hal_tx_ext_desc_set_ip_id(ext_desc, tso_seg->tso_flags.ip_id);
  351. for (num_frag = 0; num_frag < tso_seg->num_frags; num_frag++) {
  352. uint32_t lo = 0;
  353. uint32_t hi = 0;
  354. qdf_assert_always((tso_seg->tso_frags[num_frag].paddr) &&
  355. (tso_seg->tso_frags[num_frag].length));
  356. qdf_dmaaddr_to_32s(
  357. tso_seg->tso_frags[num_frag].paddr, &lo, &hi);
  358. hal_tx_ext_desc_set_buffer(ext_desc, num_frag, lo, hi,
  359. tso_seg->tso_frags[num_frag].length);
  360. }
  361. return;
  362. }
  363. #else
  364. static void dp_tx_prepare_tso_ext_desc(struct qdf_tso_seg_t *tso_seg,
  365. void *ext_desc)
  366. {
  367. return;
  368. }
  369. #endif
  370. #if defined(FEATURE_TSO)
  371. /**
  372. * dp_tx_free_tso_seg_list() - Loop through the tso segments
  373. * allocated and free them
  374. *
  375. * @soc: soc handle
  376. * @free_seg: list of tso segments
  377. * @msdu_info: msdu descriptor
  378. *
  379. * Return - void
  380. */
  381. static void dp_tx_free_tso_seg_list(
  382. struct dp_soc *soc,
  383. struct qdf_tso_seg_elem_t *free_seg,
  384. struct dp_tx_msdu_info_s *msdu_info)
  385. {
  386. struct qdf_tso_seg_elem_t *next_seg;
  387. while (free_seg) {
  388. next_seg = free_seg->next;
  389. dp_tx_tso_desc_free(soc,
  390. msdu_info->tx_queue.desc_pool_id,
  391. free_seg);
  392. free_seg = next_seg;
  393. }
  394. }
  395. /**
  396. * dp_tx_free_tso_num_seg_list() - Loop through the tso num segments
  397. * allocated and free them
  398. *
  399. * @soc: soc handle
  400. * @free_num_seg: list of tso number segments
  401. * @msdu_info: msdu descriptor
  402. * Return - void
  403. */
  404. static void dp_tx_free_tso_num_seg_list(
  405. struct dp_soc *soc,
  406. struct qdf_tso_num_seg_elem_t *free_num_seg,
  407. struct dp_tx_msdu_info_s *msdu_info)
  408. {
  409. struct qdf_tso_num_seg_elem_t *next_num_seg;
  410. while (free_num_seg) {
  411. next_num_seg = free_num_seg->next;
  412. dp_tso_num_seg_free(soc,
  413. msdu_info->tx_queue.desc_pool_id,
  414. free_num_seg);
  415. free_num_seg = next_num_seg;
  416. }
  417. }
  418. /**
  419. * dp_tx_unmap_tso_seg_list() - Loop through the tso segments
  420. * do dma unmap for each segment
  421. *
  422. * @soc: soc handle
  423. * @free_seg: list of tso segments
  424. * @num_seg_desc: tso number segment descriptor
  425. *
  426. * Return - void
  427. */
  428. static void dp_tx_unmap_tso_seg_list(
  429. struct dp_soc *soc,
  430. struct qdf_tso_seg_elem_t *free_seg,
  431. struct qdf_tso_num_seg_elem_t *num_seg_desc)
  432. {
  433. struct qdf_tso_seg_elem_t *next_seg;
  434. if (qdf_unlikely(!num_seg_desc)) {
  435. DP_TRACE(ERROR, "TSO number seg desc is NULL!");
  436. return;
  437. }
  438. while (free_seg) {
  439. next_seg = free_seg->next;
  440. dp_tx_tso_unmap_segment(soc, free_seg, num_seg_desc);
  441. free_seg = next_seg;
  442. }
  443. }
  444. #ifdef FEATURE_TSO_STATS
  445. /**
  446. * dp_tso_get_stats_idx: Retrieve the tso packet id
  447. * @pdev - pdev handle
  448. *
  449. * Return: id
  450. */
  451. static uint32_t dp_tso_get_stats_idx(struct dp_pdev *pdev)
  452. {
  453. uint32_t stats_idx;
  454. stats_idx = (((uint32_t)qdf_atomic_inc_return(&pdev->tso_idx))
  455. % CDP_MAX_TSO_PACKETS);
  456. return stats_idx;
  457. }
  458. #else
  459. static int dp_tso_get_stats_idx(struct dp_pdev *pdev)
  460. {
  461. return 0;
  462. }
  463. #endif /* FEATURE_TSO_STATS */
  464. /**
  465. * dp_tx_free_remaining_tso_desc() - do dma unmap for tso segments if any,
  466. * free the tso segments descriptor and
  467. * tso num segments descriptor
  468. *
  469. * @soc: soc handle
  470. * @msdu_info: msdu descriptor
  471. * @tso_seg_unmap: flag to show if dma unmap is necessary
  472. *
  473. * Return - void
  474. */
  475. static void dp_tx_free_remaining_tso_desc(struct dp_soc *soc,
  476. struct dp_tx_msdu_info_s *msdu_info,
  477. bool tso_seg_unmap)
  478. {
  479. struct qdf_tso_info_t *tso_info = &msdu_info->u.tso_info;
  480. struct qdf_tso_seg_elem_t *free_seg = tso_info->tso_seg_list;
  481. struct qdf_tso_num_seg_elem_t *tso_num_desc =
  482. tso_info->tso_num_seg_list;
  483. /* do dma unmap for each segment */
  484. if (tso_seg_unmap)
  485. dp_tx_unmap_tso_seg_list(soc, free_seg, tso_num_desc);
  486. /* free all tso number segment descriptor though looks only have 1 */
  487. dp_tx_free_tso_num_seg_list(soc, tso_num_desc, msdu_info);
  488. /* free all tso segment descriptor */
  489. dp_tx_free_tso_seg_list(soc, free_seg, msdu_info);
  490. }
  491. /**
  492. * dp_tx_prepare_tso() - Given a jumbo msdu, prepare the TSO info
  493. * @vdev: virtual device handle
  494. * @msdu: network buffer
  495. * @msdu_info: meta data associated with the msdu
  496. *
  497. * Return: QDF_STATUS_SUCCESS success
  498. */
  499. static QDF_STATUS dp_tx_prepare_tso(struct dp_vdev *vdev,
  500. qdf_nbuf_t msdu, struct dp_tx_msdu_info_s *msdu_info)
  501. {
  502. struct qdf_tso_seg_elem_t *tso_seg;
  503. int num_seg = qdf_nbuf_get_tso_num_seg(msdu);
  504. struct dp_soc *soc = vdev->pdev->soc;
  505. struct dp_pdev *pdev = vdev->pdev;
  506. struct qdf_tso_info_t *tso_info;
  507. struct qdf_tso_num_seg_elem_t *tso_num_seg;
  508. tso_info = &msdu_info->u.tso_info;
  509. tso_info->curr_seg = NULL;
  510. tso_info->tso_seg_list = NULL;
  511. tso_info->num_segs = num_seg;
  512. msdu_info->frm_type = dp_tx_frm_tso;
  513. tso_info->tso_num_seg_list = NULL;
  514. TSO_DEBUG(" %s: num_seg: %d", __func__, num_seg);
  515. while (num_seg) {
  516. tso_seg = dp_tx_tso_desc_alloc(
  517. soc, msdu_info->tx_queue.desc_pool_id);
  518. if (tso_seg) {
  519. tso_seg->next = tso_info->tso_seg_list;
  520. tso_info->tso_seg_list = tso_seg;
  521. num_seg--;
  522. } else {
  523. dp_err_rl("Failed to alloc tso seg desc");
  524. DP_STATS_INC_PKT(vdev->pdev,
  525. tso_stats.tso_no_mem_dropped, 1,
  526. qdf_nbuf_len(msdu));
  527. dp_tx_free_remaining_tso_desc(soc, msdu_info, false);
  528. return QDF_STATUS_E_NOMEM;
  529. }
  530. }
  531. TSO_DEBUG(" %s: num_seg: %d", __func__, num_seg);
  532. tso_num_seg = dp_tso_num_seg_alloc(soc,
  533. msdu_info->tx_queue.desc_pool_id);
  534. if (tso_num_seg) {
  535. tso_num_seg->next = tso_info->tso_num_seg_list;
  536. tso_info->tso_num_seg_list = tso_num_seg;
  537. } else {
  538. DP_TRACE(ERROR, "%s: Failed to alloc - Number of segs desc",
  539. __func__);
  540. dp_tx_free_remaining_tso_desc(soc, msdu_info, false);
  541. return QDF_STATUS_E_NOMEM;
  542. }
  543. msdu_info->num_seg =
  544. qdf_nbuf_get_tso_info(soc->osdev, msdu, tso_info);
  545. TSO_DEBUG(" %s: msdu_info->num_seg: %d", __func__,
  546. msdu_info->num_seg);
  547. if (!(msdu_info->num_seg)) {
  548. /*
  549. * Free allocated TSO seg desc and number seg desc,
  550. * do unmap for segments if dma map has done.
  551. */
  552. DP_TRACE(ERROR, "%s: Failed to get tso info", __func__);
  553. dp_tx_free_remaining_tso_desc(soc, msdu_info, true);
  554. return QDF_STATUS_E_INVAL;
  555. }
  556. tso_info->curr_seg = tso_info->tso_seg_list;
  557. tso_info->msdu_stats_idx = dp_tso_get_stats_idx(pdev);
  558. dp_tso_packet_update(pdev, tso_info->msdu_stats_idx,
  559. msdu, msdu_info->num_seg);
  560. dp_tso_segment_stats_update(pdev, tso_info->tso_seg_list,
  561. tso_info->msdu_stats_idx);
  562. dp_stats_tso_segment_histogram_update(pdev, msdu_info->num_seg);
  563. return QDF_STATUS_SUCCESS;
  564. }
  565. #else
  566. static QDF_STATUS dp_tx_prepare_tso(struct dp_vdev *vdev,
  567. qdf_nbuf_t msdu, struct dp_tx_msdu_info_s *msdu_info)
  568. {
  569. return QDF_STATUS_E_NOMEM;
  570. }
  571. #endif
  572. /**
  573. * dp_tx_prepare_ext_desc() - Allocate and prepare MSDU extension descriptor
  574. * @vdev: DP Vdev handle
  575. * @msdu_info: MSDU info to be setup in MSDU extension descriptor
  576. * @desc_pool_id: Descriptor Pool ID
  577. *
  578. * Return:
  579. */
  580. static
  581. struct dp_tx_ext_desc_elem_s *dp_tx_prepare_ext_desc(struct dp_vdev *vdev,
  582. struct dp_tx_msdu_info_s *msdu_info, uint8_t desc_pool_id)
  583. {
  584. uint8_t i;
  585. uint8_t cached_ext_desc[HAL_TX_EXT_DESC_WITH_META_DATA];
  586. struct dp_tx_seg_info_s *seg_info;
  587. struct dp_tx_ext_desc_elem_s *msdu_ext_desc;
  588. struct dp_soc *soc = vdev->pdev->soc;
  589. /* Allocate an extension descriptor */
  590. msdu_ext_desc = dp_tx_ext_desc_alloc(soc, desc_pool_id);
  591. qdf_mem_zero(&cached_ext_desc[0], HAL_TX_EXT_DESC_WITH_META_DATA);
  592. if (!msdu_ext_desc) {
  593. DP_STATS_INC(vdev, tx_i.dropped.desc_na.num, 1);
  594. return NULL;
  595. }
  596. if (msdu_info->exception_fw &&
  597. qdf_unlikely(vdev->mesh_vdev)) {
  598. qdf_mem_copy(&cached_ext_desc[HAL_TX_EXTENSION_DESC_LEN_BYTES],
  599. &msdu_info->meta_data[0],
  600. sizeof(struct htt_tx_msdu_desc_ext2_t));
  601. qdf_atomic_inc(&vdev->pdev->num_tx_exception);
  602. }
  603. switch (msdu_info->frm_type) {
  604. case dp_tx_frm_sg:
  605. case dp_tx_frm_me:
  606. case dp_tx_frm_raw:
  607. seg_info = msdu_info->u.sg_info.curr_seg;
  608. /* Update the buffer pointers in MSDU Extension Descriptor */
  609. for (i = 0; i < seg_info->frag_cnt; i++) {
  610. hal_tx_ext_desc_set_buffer(&cached_ext_desc[0], i,
  611. seg_info->frags[i].paddr_lo,
  612. seg_info->frags[i].paddr_hi,
  613. seg_info->frags[i].len);
  614. }
  615. break;
  616. case dp_tx_frm_tso:
  617. dp_tx_prepare_tso_ext_desc(&msdu_info->u.tso_info.curr_seg->seg,
  618. &cached_ext_desc[0]);
  619. break;
  620. default:
  621. break;
  622. }
  623. QDF_TRACE_HEX_DUMP(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  624. cached_ext_desc, HAL_TX_EXT_DESC_WITH_META_DATA);
  625. hal_tx_ext_desc_sync(&cached_ext_desc[0],
  626. msdu_ext_desc->vaddr);
  627. return msdu_ext_desc;
  628. }
  629. /**
  630. * dp_tx_trace_pkt() - Trace TX packet at DP layer
  631. *
  632. * @skb: skb to be traced
  633. * @msdu_id: msdu_id of the packet
  634. * @vdev_id: vdev_id of the packet
  635. *
  636. * Return: None
  637. */
  638. #ifdef DP_DISABLE_TX_PKT_TRACE
  639. static void dp_tx_trace_pkt(qdf_nbuf_t skb, uint16_t msdu_id,
  640. uint8_t vdev_id)
  641. {
  642. }
  643. #else
  644. static void dp_tx_trace_pkt(qdf_nbuf_t skb, uint16_t msdu_id,
  645. uint8_t vdev_id)
  646. {
  647. QDF_NBUF_CB_TX_PACKET_TRACK(skb) = QDF_NBUF_TX_PKT_DATA_TRACK;
  648. QDF_NBUF_CB_TX_DP_TRACE(skb) = 1;
  649. DPTRACE(qdf_dp_trace_ptr(skb,
  650. QDF_DP_TRACE_LI_DP_TX_PACKET_PTR_RECORD,
  651. QDF_TRACE_DEFAULT_PDEV_ID,
  652. qdf_nbuf_data_addr(skb),
  653. sizeof(qdf_nbuf_data(skb)),
  654. msdu_id, vdev_id));
  655. qdf_dp_trace_log_pkt(vdev_id, skb, QDF_TX, QDF_TRACE_DEFAULT_PDEV_ID);
  656. DPTRACE(qdf_dp_trace_data_pkt(skb, QDF_TRACE_DEFAULT_PDEV_ID,
  657. QDF_DP_TRACE_LI_DP_TX_PACKET_RECORD,
  658. msdu_id, QDF_TX));
  659. }
  660. #endif
  661. /**
  662. * dp_tx_desc_prepare_single - Allocate and prepare Tx descriptor
  663. * @vdev: DP vdev handle
  664. * @nbuf: skb
  665. * @desc_pool_id: Descriptor pool ID
  666. * @meta_data: Metadata to the fw
  667. * @tx_exc_metadata: Handle that holds exception path metadata
  668. * Allocate and prepare Tx descriptor with msdu information.
  669. *
  670. * Return: Pointer to Tx Descriptor on success,
  671. * NULL on failure
  672. */
  673. static
  674. struct dp_tx_desc_s *dp_tx_prepare_desc_single(struct dp_vdev *vdev,
  675. qdf_nbuf_t nbuf, uint8_t desc_pool_id,
  676. struct dp_tx_msdu_info_s *msdu_info,
  677. struct cdp_tx_exception_metadata *tx_exc_metadata)
  678. {
  679. uint8_t align_pad;
  680. uint8_t is_exception = 0;
  681. uint8_t htt_hdr_size;
  682. struct dp_tx_desc_s *tx_desc;
  683. struct dp_pdev *pdev = vdev->pdev;
  684. struct dp_soc *soc = pdev->soc;
  685. if (dp_tx_limit_check(vdev))
  686. return NULL;
  687. /* Allocate software Tx descriptor */
  688. tx_desc = dp_tx_desc_alloc(soc, desc_pool_id);
  689. if (qdf_unlikely(!tx_desc)) {
  690. DP_STATS_INC(vdev, tx_i.dropped.desc_na.num, 1);
  691. return NULL;
  692. }
  693. dp_tx_outstanding_inc(pdev);
  694. /* Initialize the SW tx descriptor */
  695. tx_desc->nbuf = nbuf;
  696. tx_desc->frm_type = dp_tx_frm_std;
  697. tx_desc->tx_encap_type = ((tx_exc_metadata &&
  698. (tx_exc_metadata->tx_encap_type != CDP_INVALID_TX_ENCAP_TYPE)) ?
  699. tx_exc_metadata->tx_encap_type : vdev->tx_encap_type);
  700. tx_desc->vdev = vdev;
  701. tx_desc->pdev = pdev;
  702. tx_desc->msdu_ext_desc = NULL;
  703. tx_desc->pkt_offset = 0;
  704. dp_tx_trace_pkt(nbuf, tx_desc->id, vdev->vdev_id);
  705. if (qdf_unlikely(vdev->multipass_en)) {
  706. if (!dp_tx_multipass_process(soc, vdev, nbuf, msdu_info))
  707. goto failure;
  708. }
  709. /*
  710. * For special modes (vdev_type == ocb or mesh), data frames should be
  711. * transmitted using varying transmit parameters (tx spec) which include
  712. * transmit rate, power, priority, channel, channel bandwidth , nss etc.
  713. * These are filled in HTT MSDU descriptor and sent in frame pre-header.
  714. * These frames are sent as exception packets to firmware.
  715. *
  716. * HW requirement is that metadata should always point to a
  717. * 8-byte aligned address. So we add alignment pad to start of buffer.
  718. * HTT Metadata should be ensured to be multiple of 8-bytes,
  719. * to get 8-byte aligned start address along with align_pad added
  720. *
  721. * |-----------------------------|
  722. * | |
  723. * |-----------------------------| <-----Buffer Pointer Address given
  724. * | | ^ in HW descriptor (aligned)
  725. * | HTT Metadata | |
  726. * | | |
  727. * | | | Packet Offset given in descriptor
  728. * | | |
  729. * |-----------------------------| |
  730. * | Alignment Pad | v
  731. * |-----------------------------| <----- Actual buffer start address
  732. * | SKB Data | (Unaligned)
  733. * | |
  734. * | |
  735. * | |
  736. * | |
  737. * | |
  738. * |-----------------------------|
  739. */
  740. if (qdf_unlikely((msdu_info->exception_fw)) ||
  741. (vdev->opmode == wlan_op_mode_ocb) ||
  742. (tx_exc_metadata &&
  743. tx_exc_metadata->is_tx_sniffer)) {
  744. align_pad = ((unsigned long) qdf_nbuf_data(nbuf)) & 0x7;
  745. if (qdf_unlikely(qdf_nbuf_headroom(nbuf) < align_pad)) {
  746. DP_STATS_INC(vdev,
  747. tx_i.dropped.headroom_insufficient, 1);
  748. goto failure;
  749. }
  750. if (qdf_nbuf_push_head(nbuf, align_pad) == NULL) {
  751. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  752. "qdf_nbuf_push_head failed");
  753. goto failure;
  754. }
  755. htt_hdr_size = dp_tx_prepare_htt_metadata(vdev, nbuf,
  756. msdu_info);
  757. if (htt_hdr_size == 0)
  758. goto failure;
  759. tx_desc->pkt_offset = align_pad + htt_hdr_size;
  760. tx_desc->flags |= DP_TX_DESC_FLAG_TO_FW;
  761. is_exception = 1;
  762. }
  763. #if !TQM_BYPASS_WAR
  764. if (is_exception || tx_exc_metadata)
  765. #endif
  766. {
  767. /* Temporary WAR due to TQM VP issues */
  768. tx_desc->flags |= DP_TX_DESC_FLAG_TO_FW;
  769. qdf_atomic_inc(&pdev->num_tx_exception);
  770. }
  771. return tx_desc;
  772. failure:
  773. dp_tx_desc_release(tx_desc, desc_pool_id);
  774. return NULL;
  775. }
  776. /**
  777. * dp_tx_prepare_desc() - Allocate and prepare Tx descriptor for multisegment frame
  778. * @vdev: DP vdev handle
  779. * @nbuf: skb
  780. * @msdu_info: Info to be setup in MSDU descriptor and MSDU extension descriptor
  781. * @desc_pool_id : Descriptor Pool ID
  782. *
  783. * Allocate and prepare Tx descriptor with msdu and fragment descritor
  784. * information. For frames wth fragments, allocate and prepare
  785. * an MSDU extension descriptor
  786. *
  787. * Return: Pointer to Tx Descriptor on success,
  788. * NULL on failure
  789. */
  790. static struct dp_tx_desc_s *dp_tx_prepare_desc(struct dp_vdev *vdev,
  791. qdf_nbuf_t nbuf, struct dp_tx_msdu_info_s *msdu_info,
  792. uint8_t desc_pool_id)
  793. {
  794. struct dp_tx_desc_s *tx_desc;
  795. struct dp_tx_ext_desc_elem_s *msdu_ext_desc;
  796. struct dp_pdev *pdev = vdev->pdev;
  797. struct dp_soc *soc = pdev->soc;
  798. if (dp_tx_limit_check(vdev))
  799. return NULL;
  800. /* Allocate software Tx descriptor */
  801. tx_desc = dp_tx_desc_alloc(soc, desc_pool_id);
  802. if (!tx_desc) {
  803. DP_STATS_INC(vdev, tx_i.dropped.desc_na.num, 1);
  804. return NULL;
  805. }
  806. dp_tx_outstanding_inc(pdev);
  807. /* Initialize the SW tx descriptor */
  808. tx_desc->nbuf = nbuf;
  809. tx_desc->frm_type = msdu_info->frm_type;
  810. tx_desc->tx_encap_type = vdev->tx_encap_type;
  811. tx_desc->vdev = vdev;
  812. tx_desc->pdev = pdev;
  813. tx_desc->pkt_offset = 0;
  814. tx_desc->tso_desc = msdu_info->u.tso_info.curr_seg;
  815. tx_desc->tso_num_desc = msdu_info->u.tso_info.tso_num_seg_list;
  816. dp_tx_trace_pkt(nbuf, tx_desc->id, vdev->vdev_id);
  817. /* Handle scattered frames - TSO/SG/ME */
  818. /* Allocate and prepare an extension descriptor for scattered frames */
  819. msdu_ext_desc = dp_tx_prepare_ext_desc(vdev, msdu_info, desc_pool_id);
  820. if (!msdu_ext_desc) {
  821. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  822. "%s Tx Extension Descriptor Alloc Fail",
  823. __func__);
  824. goto failure;
  825. }
  826. #if TQM_BYPASS_WAR
  827. /* Temporary WAR due to TQM VP issues */
  828. tx_desc->flags |= DP_TX_DESC_FLAG_TO_FW;
  829. qdf_atomic_inc(&pdev->num_tx_exception);
  830. #endif
  831. if (qdf_unlikely(msdu_info->exception_fw))
  832. tx_desc->flags |= DP_TX_DESC_FLAG_TO_FW;
  833. tx_desc->msdu_ext_desc = msdu_ext_desc;
  834. tx_desc->flags |= DP_TX_DESC_FLAG_FRAG;
  835. return tx_desc;
  836. failure:
  837. dp_tx_desc_release(tx_desc, desc_pool_id);
  838. return NULL;
  839. }
  840. /**
  841. * dp_tx_prepare_raw() - Prepare RAW packet TX
  842. * @vdev: DP vdev handle
  843. * @nbuf: buffer pointer
  844. * @seg_info: Pointer to Segment info Descriptor to be prepared
  845. * @msdu_info: MSDU info to be setup in MSDU descriptor and MSDU extension
  846. * descriptor
  847. *
  848. * Return:
  849. */
  850. static qdf_nbuf_t dp_tx_prepare_raw(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  851. struct dp_tx_seg_info_s *seg_info, struct dp_tx_msdu_info_s *msdu_info)
  852. {
  853. qdf_nbuf_t curr_nbuf = NULL;
  854. uint16_t total_len = 0;
  855. qdf_dma_addr_t paddr;
  856. int32_t i;
  857. int32_t mapped_buf_num = 0;
  858. struct dp_tx_sg_info_s *sg_info = &msdu_info->u.sg_info;
  859. qdf_dot3_qosframe_t *qos_wh = (qdf_dot3_qosframe_t *) nbuf->data;
  860. DP_STATS_INC_PKT(vdev, tx_i.raw.raw_pkt, 1, qdf_nbuf_len(nbuf));
  861. /* Continue only if frames are of DATA type */
  862. if (!DP_FRAME_IS_DATA(qos_wh)) {
  863. DP_STATS_INC(vdev, tx_i.raw.invalid_raw_pkt_datatype, 1);
  864. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  865. "Pkt. recd is of not data type");
  866. goto error;
  867. }
  868. /* SWAR for HW: Enable WEP bit in the AMSDU frames for RAW mode */
  869. if (vdev->raw_mode_war &&
  870. (qos_wh->i_fc[0] & QDF_IEEE80211_FC0_SUBTYPE_QOS) &&
  871. (qos_wh->i_qos[0] & IEEE80211_QOS_AMSDU))
  872. qos_wh->i_fc[1] |= IEEE80211_FC1_WEP;
  873. for (curr_nbuf = nbuf, i = 0; curr_nbuf;
  874. curr_nbuf = qdf_nbuf_next(curr_nbuf), i++) {
  875. if (QDF_STATUS_SUCCESS !=
  876. qdf_nbuf_map_nbytes_single(vdev->osdev,
  877. curr_nbuf,
  878. QDF_DMA_TO_DEVICE,
  879. curr_nbuf->len)) {
  880. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  881. "%s dma map error ", __func__);
  882. DP_STATS_INC(vdev, tx_i.raw.dma_map_error, 1);
  883. mapped_buf_num = i;
  884. goto error;
  885. }
  886. paddr = qdf_nbuf_get_frag_paddr(curr_nbuf, 0);
  887. seg_info->frags[i].paddr_lo = paddr;
  888. seg_info->frags[i].paddr_hi = ((uint64_t)paddr >> 32);
  889. seg_info->frags[i].len = qdf_nbuf_len(curr_nbuf);
  890. seg_info->frags[i].vaddr = (void *) curr_nbuf;
  891. total_len += qdf_nbuf_len(curr_nbuf);
  892. }
  893. seg_info->frag_cnt = i;
  894. seg_info->total_len = total_len;
  895. seg_info->next = NULL;
  896. sg_info->curr_seg = seg_info;
  897. msdu_info->frm_type = dp_tx_frm_raw;
  898. msdu_info->num_seg = 1;
  899. return nbuf;
  900. error:
  901. i = 0;
  902. while (nbuf) {
  903. curr_nbuf = nbuf;
  904. if (i < mapped_buf_num) {
  905. qdf_nbuf_unmap_nbytes_single(vdev->osdev, curr_nbuf,
  906. QDF_DMA_TO_DEVICE,
  907. curr_nbuf->len);
  908. i++;
  909. }
  910. nbuf = qdf_nbuf_next(nbuf);
  911. qdf_nbuf_free(curr_nbuf);
  912. }
  913. return NULL;
  914. }
  915. /**
  916. * dp_tx_raw_prepare_unset() - unmap the chain of nbufs belonging to RAW frame.
  917. * @soc: DP soc handle
  918. * @nbuf: Buffer pointer
  919. *
  920. * unmap the chain of nbufs that belong to this RAW frame.
  921. *
  922. * Return: None
  923. */
  924. static void dp_tx_raw_prepare_unset(struct dp_soc *soc,
  925. qdf_nbuf_t nbuf)
  926. {
  927. qdf_nbuf_t cur_nbuf = nbuf;
  928. do {
  929. qdf_nbuf_unmap_nbytes_single(soc->osdev, cur_nbuf,
  930. QDF_DMA_TO_DEVICE,
  931. cur_nbuf->len);
  932. cur_nbuf = qdf_nbuf_next(cur_nbuf);
  933. } while (cur_nbuf);
  934. }
  935. #ifdef VDEV_PEER_PROTOCOL_COUNT
  936. #define dp_vdev_peer_stats_update_protocol_cnt_tx(vdev_hdl, nbuf) \
  937. { \
  938. qdf_nbuf_t nbuf_local; \
  939. struct dp_vdev *vdev_local = vdev_hdl; \
  940. do { \
  941. if (qdf_likely(!((vdev_local)->peer_protocol_count_track))) \
  942. break; \
  943. nbuf_local = nbuf; \
  944. if (qdf_unlikely(((vdev_local)->tx_encap_type) == \
  945. htt_cmn_pkt_type_raw)) \
  946. break; \
  947. else if (qdf_unlikely(qdf_nbuf_is_nonlinear((nbuf_local)))) \
  948. break; \
  949. else if (qdf_nbuf_is_tso((nbuf_local))) \
  950. break; \
  951. dp_vdev_peer_stats_update_protocol_cnt((vdev_local), \
  952. (nbuf_local), \
  953. NULL, 1, 0); \
  954. } while (0); \
  955. }
  956. #else
  957. #define dp_vdev_peer_stats_update_protocol_cnt_tx(vdev_hdl, skb)
  958. #endif
  959. /**
  960. * dp_tx_hw_enqueue() - Enqueue to TCL HW for transmit
  961. * @soc: DP Soc Handle
  962. * @vdev: DP vdev handle
  963. * @tx_desc: Tx Descriptor Handle
  964. * @tid: TID from HLOS for overriding default DSCP-TID mapping
  965. * @fw_metadata: Metadata to send to Target Firmware along with frame
  966. * @ring_id: Ring ID of H/W ring to which we enqueue the packet
  967. * @tx_exc_metadata: Handle that holds exception path meta data
  968. *
  969. * Gets the next free TCL HW DMA descriptor and sets up required parameters
  970. * from software Tx descriptor
  971. *
  972. * Return: QDF_STATUS_SUCCESS: success
  973. * QDF_STATUS_E_RESOURCES: Error return
  974. */
  975. static QDF_STATUS dp_tx_hw_enqueue(struct dp_soc *soc, struct dp_vdev *vdev,
  976. struct dp_tx_desc_s *tx_desc, uint8_t tid,
  977. uint16_t fw_metadata, uint8_t ring_id,
  978. struct cdp_tx_exception_metadata
  979. *tx_exc_metadata)
  980. {
  981. uint8_t type;
  982. uint16_t length;
  983. void *hal_tx_desc;
  984. uint32_t *hal_tx_desc_cached;
  985. qdf_dma_addr_t dma_addr;
  986. /*
  987. * Setting it initialization statically here to avoid
  988. * a memset call jump with qdf_mem_set call
  989. */
  990. uint8_t cached_desc[HAL_TX_DESC_LEN_BYTES] = { 0 };
  991. enum cdp_sec_type sec_type = ((tx_exc_metadata &&
  992. tx_exc_metadata->sec_type != CDP_INVALID_SEC_TYPE) ?
  993. tx_exc_metadata->sec_type : vdev->sec_type);
  994. /* Return Buffer Manager ID */
  995. uint8_t bm_id = dp_tx_get_rbm_id(soc, ring_id);
  996. hal_ring_handle_t hal_ring_hdl = NULL;
  997. QDF_STATUS status = QDF_STATUS_E_RESOURCES;
  998. if (!dp_tx_is_desc_id_valid(soc, tx_desc->id)) {
  999. dp_err_rl("Invalid tx desc id:%d", tx_desc->id);
  1000. return QDF_STATUS_E_RESOURCES;
  1001. }
  1002. hal_tx_desc_cached = (void *) cached_desc;
  1003. if (tx_desc->flags & DP_TX_DESC_FLAG_FRAG) {
  1004. length = HAL_TX_EXT_DESC_WITH_META_DATA;
  1005. type = HAL_TX_BUF_TYPE_EXT_DESC;
  1006. dma_addr = tx_desc->msdu_ext_desc->paddr;
  1007. } else {
  1008. length = qdf_nbuf_len(tx_desc->nbuf) - tx_desc->pkt_offset;
  1009. type = HAL_TX_BUF_TYPE_BUFFER;
  1010. dma_addr = qdf_nbuf_mapped_paddr_get(tx_desc->nbuf);
  1011. }
  1012. qdf_assert_always(dma_addr);
  1013. hal_tx_desc_set_buf_addr(soc->hal_soc, hal_tx_desc_cached,
  1014. dma_addr, bm_id, tx_desc->id,
  1015. type);
  1016. hal_tx_desc_set_lmac_id(soc->hal_soc, hal_tx_desc_cached,
  1017. vdev->lmac_id);
  1018. hal_tx_desc_set_search_type(soc->hal_soc, hal_tx_desc_cached,
  1019. vdev->search_type);
  1020. hal_tx_desc_set_search_index(soc->hal_soc, hal_tx_desc_cached,
  1021. vdev->bss_ast_idx);
  1022. hal_tx_desc_set_dscp_tid_table_id(soc->hal_soc, hal_tx_desc_cached,
  1023. vdev->dscp_tid_map_id);
  1024. hal_tx_desc_set_encrypt_type(hal_tx_desc_cached,
  1025. sec_type_map[sec_type]);
  1026. hal_tx_desc_set_cache_set_num(soc->hal_soc, hal_tx_desc_cached,
  1027. (vdev->bss_ast_hash & 0xF));
  1028. hal_tx_desc_set_fw_metadata(hal_tx_desc_cached, fw_metadata);
  1029. hal_tx_desc_set_buf_length(hal_tx_desc_cached, length);
  1030. hal_tx_desc_set_buf_offset(hal_tx_desc_cached, tx_desc->pkt_offset);
  1031. hal_tx_desc_set_encap_type(hal_tx_desc_cached, tx_desc->tx_encap_type);
  1032. hal_tx_desc_set_addr_search_flags(hal_tx_desc_cached,
  1033. vdev->hal_desc_addr_search_flags);
  1034. if (tx_desc->flags & DP_TX_DESC_FLAG_TO_FW)
  1035. hal_tx_desc_set_to_fw(hal_tx_desc_cached, 1);
  1036. /* verify checksum offload configuration*/
  1037. if ((wlan_cfg_get_checksum_offload(soc->wlan_cfg_ctx)) &&
  1038. ((qdf_nbuf_get_tx_cksum(tx_desc->nbuf) == QDF_NBUF_TX_CKSUM_TCP_UDP)
  1039. || qdf_nbuf_is_tso(tx_desc->nbuf))) {
  1040. hal_tx_desc_set_l3_checksum_en(hal_tx_desc_cached, 1);
  1041. hal_tx_desc_set_l4_checksum_en(hal_tx_desc_cached, 1);
  1042. }
  1043. if (tid != HTT_TX_EXT_TID_INVALID)
  1044. hal_tx_desc_set_hlos_tid(hal_tx_desc_cached, tid);
  1045. if (tx_desc->flags & DP_TX_DESC_FLAG_MESH)
  1046. hal_tx_desc_set_mesh_en(soc->hal_soc, hal_tx_desc_cached, 1);
  1047. if (qdf_unlikely(vdev->pdev->delay_stats_flag))
  1048. tx_desc->timestamp = qdf_ktime_to_ms(qdf_ktime_get());
  1049. dp_verbose_debug("length:%d , type = %d, dma_addr %llx, offset %d desc id %u",
  1050. length, type, (uint64_t)dma_addr,
  1051. tx_desc->pkt_offset, tx_desc->id);
  1052. hal_ring_hdl = dp_tx_get_hal_ring_hdl(soc, ring_id);
  1053. if (qdf_unlikely(dp_tx_hal_ring_access_start(soc, hal_ring_hdl))) {
  1054. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1055. "%s %d : HAL RING Access Failed -- %pK",
  1056. __func__, __LINE__, hal_ring_hdl);
  1057. DP_STATS_INC(soc, tx.tcl_ring_full[ring_id], 1);
  1058. DP_STATS_INC(vdev, tx_i.dropped.enqueue_fail, 1);
  1059. return status;
  1060. }
  1061. /* Sync cached descriptor with HW */
  1062. hal_tx_desc = hal_srng_src_get_next(soc->hal_soc, hal_ring_hdl);
  1063. if (qdf_unlikely(!hal_tx_desc)) {
  1064. dp_verbose_debug("TCL ring full ring_id:%d", ring_id);
  1065. DP_STATS_INC(soc, tx.tcl_ring_full[ring_id], 1);
  1066. DP_STATS_INC(vdev, tx_i.dropped.enqueue_fail, 1);
  1067. goto ring_access_fail;
  1068. }
  1069. tx_desc->flags |= DP_TX_DESC_FLAG_QUEUED_TX;
  1070. dp_vdev_peer_stats_update_protocol_cnt_tx(vdev, tx_desc->nbuf);
  1071. hal_tx_desc_sync(hal_tx_desc_cached, hal_tx_desc);
  1072. DP_STATS_INC_PKT(vdev, tx_i.processed, 1, length);
  1073. status = QDF_STATUS_SUCCESS;
  1074. ring_access_fail:
  1075. if (hif_pm_runtime_get(soc->hif_handle,
  1076. RTPM_ID_DW_TX_HW_ENQUEUE) == 0) {
  1077. dp_tx_hal_ring_access_end(soc, hal_ring_hdl);
  1078. hif_pm_runtime_put(soc->hif_handle,
  1079. RTPM_ID_DW_TX_HW_ENQUEUE);
  1080. } else {
  1081. dp_tx_hal_ring_access_end_reap(soc, hal_ring_hdl);
  1082. hal_srng_set_event(hal_ring_hdl, HAL_SRNG_FLUSH_EVENT);
  1083. hal_srng_inc_flush_cnt(hal_ring_hdl);
  1084. }
  1085. return status;
  1086. }
  1087. /**
  1088. * dp_cce_classify() - Classify the frame based on CCE rules
  1089. * @vdev: DP vdev handle
  1090. * @nbuf: skb
  1091. *
  1092. * Classify frames based on CCE rules
  1093. * Return: bool( true if classified,
  1094. * else false)
  1095. */
  1096. static bool dp_cce_classify(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  1097. {
  1098. qdf_ether_header_t *eh = NULL;
  1099. uint16_t ether_type;
  1100. qdf_llc_t *llcHdr;
  1101. qdf_nbuf_t nbuf_clone = NULL;
  1102. qdf_dot3_qosframe_t *qos_wh = NULL;
  1103. /* for mesh packets don't do any classification */
  1104. if (qdf_unlikely(vdev->mesh_vdev))
  1105. return false;
  1106. if (qdf_likely(vdev->tx_encap_type != htt_cmn_pkt_type_raw)) {
  1107. eh = (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  1108. ether_type = eh->ether_type;
  1109. llcHdr = (qdf_llc_t *)(nbuf->data +
  1110. sizeof(qdf_ether_header_t));
  1111. } else {
  1112. qos_wh = (qdf_dot3_qosframe_t *) nbuf->data;
  1113. /* For encrypted packets don't do any classification */
  1114. if (qdf_unlikely(qos_wh->i_fc[1] & IEEE80211_FC1_WEP))
  1115. return false;
  1116. if (qdf_unlikely(qos_wh->i_fc[0] & QDF_IEEE80211_FC0_SUBTYPE_QOS)) {
  1117. if (qdf_unlikely(
  1118. qos_wh->i_fc[1] & QDF_IEEE80211_FC1_TODS &&
  1119. qos_wh->i_fc[1] & QDF_IEEE80211_FC1_FROMDS)) {
  1120. ether_type = *(uint16_t *)(nbuf->data
  1121. + QDF_IEEE80211_4ADDR_HDR_LEN
  1122. + sizeof(qdf_llc_t)
  1123. - sizeof(ether_type));
  1124. llcHdr = (qdf_llc_t *)(nbuf->data +
  1125. QDF_IEEE80211_4ADDR_HDR_LEN);
  1126. } else {
  1127. ether_type = *(uint16_t *)(nbuf->data
  1128. + QDF_IEEE80211_3ADDR_HDR_LEN
  1129. + sizeof(qdf_llc_t)
  1130. - sizeof(ether_type));
  1131. llcHdr = (qdf_llc_t *)(nbuf->data +
  1132. QDF_IEEE80211_3ADDR_HDR_LEN);
  1133. }
  1134. if (qdf_unlikely(DP_FRAME_IS_SNAP(llcHdr)
  1135. && (ether_type ==
  1136. qdf_htons(QDF_NBUF_TRAC_EAPOL_ETH_TYPE)))) {
  1137. DP_STATS_INC(vdev, tx_i.cce_classified_raw, 1);
  1138. return true;
  1139. }
  1140. }
  1141. return false;
  1142. }
  1143. if (qdf_unlikely(DP_FRAME_IS_SNAP(llcHdr))) {
  1144. ether_type = *(uint16_t *)(nbuf->data + 2*QDF_MAC_ADDR_SIZE +
  1145. sizeof(*llcHdr));
  1146. nbuf_clone = qdf_nbuf_clone(nbuf);
  1147. if (qdf_unlikely(nbuf_clone)) {
  1148. qdf_nbuf_pull_head(nbuf_clone, sizeof(*llcHdr));
  1149. if (ether_type == htons(ETHERTYPE_VLAN)) {
  1150. qdf_nbuf_pull_head(nbuf_clone,
  1151. sizeof(qdf_net_vlanhdr_t));
  1152. }
  1153. }
  1154. } else {
  1155. if (ether_type == htons(ETHERTYPE_VLAN)) {
  1156. nbuf_clone = qdf_nbuf_clone(nbuf);
  1157. if (qdf_unlikely(nbuf_clone)) {
  1158. qdf_nbuf_pull_head(nbuf_clone,
  1159. sizeof(qdf_net_vlanhdr_t));
  1160. }
  1161. }
  1162. }
  1163. if (qdf_unlikely(nbuf_clone))
  1164. nbuf = nbuf_clone;
  1165. if (qdf_unlikely(qdf_nbuf_is_ipv4_eapol_pkt(nbuf)
  1166. || qdf_nbuf_is_ipv4_arp_pkt(nbuf)
  1167. || qdf_nbuf_is_ipv4_wapi_pkt(nbuf)
  1168. || qdf_nbuf_is_ipv4_tdls_pkt(nbuf)
  1169. || (qdf_nbuf_is_ipv4_pkt(nbuf)
  1170. && qdf_nbuf_is_ipv4_dhcp_pkt(nbuf))
  1171. || (qdf_nbuf_is_ipv6_pkt(nbuf) &&
  1172. qdf_nbuf_is_ipv6_dhcp_pkt(nbuf)))) {
  1173. if (qdf_unlikely(nbuf_clone))
  1174. qdf_nbuf_free(nbuf_clone);
  1175. return true;
  1176. }
  1177. if (qdf_unlikely(nbuf_clone))
  1178. qdf_nbuf_free(nbuf_clone);
  1179. return false;
  1180. }
  1181. /**
  1182. * dp_tx_get_tid() - Obtain TID to be used for this frame
  1183. * @vdev: DP vdev handle
  1184. * @nbuf: skb
  1185. *
  1186. * Extract the DSCP or PCP information from frame and map into TID value.
  1187. *
  1188. * Return: void
  1189. */
  1190. static void dp_tx_get_tid(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1191. struct dp_tx_msdu_info_s *msdu_info)
  1192. {
  1193. uint8_t tos = 0, dscp_tid_override = 0;
  1194. uint8_t *hdr_ptr, *L3datap;
  1195. uint8_t is_mcast = 0;
  1196. qdf_ether_header_t *eh = NULL;
  1197. qdf_ethervlan_header_t *evh = NULL;
  1198. uint16_t ether_type;
  1199. qdf_llc_t *llcHdr;
  1200. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  1201. DP_TX_TID_OVERRIDE(msdu_info, nbuf);
  1202. if (qdf_likely(vdev->tx_encap_type != htt_cmn_pkt_type_raw)) {
  1203. eh = (qdf_ether_header_t *)nbuf->data;
  1204. hdr_ptr = eh->ether_dhost;
  1205. L3datap = hdr_ptr + sizeof(qdf_ether_header_t);
  1206. } else {
  1207. qdf_dot3_qosframe_t *qos_wh =
  1208. (qdf_dot3_qosframe_t *) nbuf->data;
  1209. msdu_info->tid = qos_wh->i_fc[0] & DP_FC0_SUBTYPE_QOS ?
  1210. qos_wh->i_qos[0] & DP_QOS_TID : 0;
  1211. return;
  1212. }
  1213. is_mcast = DP_FRAME_IS_MULTICAST(hdr_ptr);
  1214. ether_type = eh->ether_type;
  1215. llcHdr = (qdf_llc_t *)(nbuf->data + sizeof(qdf_ether_header_t));
  1216. /*
  1217. * Check if packet is dot3 or eth2 type.
  1218. */
  1219. if (DP_FRAME_IS_LLC(ether_type) && DP_FRAME_IS_SNAP(llcHdr)) {
  1220. ether_type = (uint16_t)*(nbuf->data + 2*QDF_MAC_ADDR_SIZE +
  1221. sizeof(*llcHdr));
  1222. if (ether_type == htons(ETHERTYPE_VLAN)) {
  1223. L3datap = hdr_ptr + sizeof(qdf_ethervlan_header_t) +
  1224. sizeof(*llcHdr);
  1225. ether_type = (uint16_t)*(nbuf->data + 2*QDF_MAC_ADDR_SIZE
  1226. + sizeof(*llcHdr) +
  1227. sizeof(qdf_net_vlanhdr_t));
  1228. } else {
  1229. L3datap = hdr_ptr + sizeof(qdf_ether_header_t) +
  1230. sizeof(*llcHdr);
  1231. }
  1232. } else {
  1233. if (ether_type == htons(ETHERTYPE_VLAN)) {
  1234. evh = (qdf_ethervlan_header_t *) eh;
  1235. ether_type = evh->ether_type;
  1236. L3datap = hdr_ptr + sizeof(qdf_ethervlan_header_t);
  1237. }
  1238. }
  1239. /*
  1240. * Find priority from IP TOS DSCP field
  1241. */
  1242. if (qdf_nbuf_is_ipv4_pkt(nbuf)) {
  1243. qdf_net_iphdr_t *ip = (qdf_net_iphdr_t *) L3datap;
  1244. if (qdf_nbuf_is_ipv4_dhcp_pkt(nbuf)) {
  1245. /* Only for unicast frames */
  1246. if (!is_mcast) {
  1247. /* send it on VO queue */
  1248. msdu_info->tid = DP_VO_TID;
  1249. }
  1250. } else {
  1251. /*
  1252. * IP frame: exclude ECN bits 0-1 and map DSCP bits 2-7
  1253. * from TOS byte.
  1254. */
  1255. tos = ip->ip_tos;
  1256. dscp_tid_override = 1;
  1257. }
  1258. } else if (qdf_nbuf_is_ipv6_pkt(nbuf)) {
  1259. /* TODO
  1260. * use flowlabel
  1261. *igmpmld cases to be handled in phase 2
  1262. */
  1263. unsigned long ver_pri_flowlabel;
  1264. unsigned long pri;
  1265. ver_pri_flowlabel = *(unsigned long *) L3datap;
  1266. pri = (ntohl(ver_pri_flowlabel) & IPV6_FLOWINFO_PRIORITY) >>
  1267. DP_IPV6_PRIORITY_SHIFT;
  1268. tos = pri;
  1269. dscp_tid_override = 1;
  1270. } else if (qdf_nbuf_is_ipv4_eapol_pkt(nbuf))
  1271. msdu_info->tid = DP_VO_TID;
  1272. else if (qdf_nbuf_is_ipv4_arp_pkt(nbuf)) {
  1273. /* Only for unicast frames */
  1274. if (!is_mcast) {
  1275. /* send ucast arp on VO queue */
  1276. msdu_info->tid = DP_VO_TID;
  1277. }
  1278. }
  1279. /*
  1280. * Assign all MCAST packets to BE
  1281. */
  1282. if (qdf_unlikely(vdev->tx_encap_type != htt_cmn_pkt_type_raw)) {
  1283. if (is_mcast) {
  1284. tos = 0;
  1285. dscp_tid_override = 1;
  1286. }
  1287. }
  1288. if (dscp_tid_override == 1) {
  1289. tos = (tos >> DP_IP_DSCP_SHIFT) & DP_IP_DSCP_MASK;
  1290. msdu_info->tid = pdev->dscp_tid_map[vdev->dscp_tid_map_id][tos];
  1291. }
  1292. if (msdu_info->tid >= CDP_MAX_DATA_TIDS)
  1293. msdu_info->tid = CDP_MAX_DATA_TIDS - 1;
  1294. return;
  1295. }
  1296. /**
  1297. * dp_tx_classify_tid() - Obtain TID to be used for this frame
  1298. * @vdev: DP vdev handle
  1299. * @nbuf: skb
  1300. *
  1301. * Software based TID classification is required when more than 2 DSCP-TID
  1302. * mapping tables are needed.
  1303. * Hardware supports 2 DSCP-TID mapping tables for HKv1 and 48 for HKv2.
  1304. *
  1305. * Return: void
  1306. */
  1307. static inline void dp_tx_classify_tid(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1308. struct dp_tx_msdu_info_s *msdu_info)
  1309. {
  1310. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  1311. DP_TX_TID_OVERRIDE(msdu_info, nbuf);
  1312. if (pdev->soc && vdev->dscp_tid_map_id < pdev->soc->num_hw_dscp_tid_map)
  1313. return;
  1314. /* for mesh packets don't do any classification */
  1315. if (qdf_unlikely(vdev->mesh_vdev))
  1316. return;
  1317. dp_tx_get_tid(vdev, nbuf, msdu_info);
  1318. }
  1319. #ifdef FEATURE_WLAN_TDLS
  1320. /**
  1321. * dp_tx_update_tdls_flags() - Update descriptor flags for TDLS frame
  1322. * @tx_desc: TX descriptor
  1323. *
  1324. * Return: None
  1325. */
  1326. static void dp_tx_update_tdls_flags(struct dp_tx_desc_s *tx_desc)
  1327. {
  1328. if (tx_desc->vdev) {
  1329. if (tx_desc->vdev->is_tdls_frame) {
  1330. tx_desc->flags |= DP_TX_DESC_FLAG_TDLS_FRAME;
  1331. tx_desc->vdev->is_tdls_frame = false;
  1332. }
  1333. }
  1334. }
  1335. /**
  1336. * dp_non_std_tx_comp_free_buff() - Free the non std tx packet buffer
  1337. * @tx_desc: TX descriptor
  1338. * @vdev: datapath vdev handle
  1339. *
  1340. * Return: None
  1341. */
  1342. static void dp_non_std_tx_comp_free_buff(struct dp_tx_desc_s *tx_desc,
  1343. struct dp_vdev *vdev)
  1344. {
  1345. struct hal_tx_completion_status ts = {0};
  1346. qdf_nbuf_t nbuf = tx_desc->nbuf;
  1347. if (qdf_unlikely(!vdev)) {
  1348. dp_err("vdev is null!");
  1349. return;
  1350. }
  1351. hal_tx_comp_get_status(&tx_desc->comp, &ts, vdev->pdev->soc->hal_soc);
  1352. if (vdev->tx_non_std_data_callback.func) {
  1353. qdf_nbuf_set_next(tx_desc->nbuf, NULL);
  1354. vdev->tx_non_std_data_callback.func(
  1355. vdev->tx_non_std_data_callback.ctxt,
  1356. nbuf, ts.status);
  1357. return;
  1358. }
  1359. }
  1360. #else
  1361. static inline void dp_tx_update_tdls_flags(struct dp_tx_desc_s *tx_desc)
  1362. {
  1363. }
  1364. static inline void dp_non_std_tx_comp_free_buff(struct dp_tx_desc_s *tx_desc,
  1365. struct dp_vdev *vdev)
  1366. {
  1367. }
  1368. #endif
  1369. /**
  1370. * dp_tx_frame_is_drop() - checks if the packet is loopback
  1371. * @vdev: DP vdev handle
  1372. * @nbuf: skb
  1373. *
  1374. * Return: 1 if frame needs to be dropped else 0
  1375. */
  1376. int dp_tx_frame_is_drop(struct dp_vdev *vdev, uint8_t *srcmac, uint8_t *dstmac)
  1377. {
  1378. struct dp_pdev *pdev = NULL;
  1379. struct dp_ast_entry *src_ast_entry = NULL;
  1380. struct dp_ast_entry *dst_ast_entry = NULL;
  1381. struct dp_soc *soc = NULL;
  1382. qdf_assert(vdev);
  1383. pdev = vdev->pdev;
  1384. qdf_assert(pdev);
  1385. soc = pdev->soc;
  1386. dst_ast_entry = dp_peer_ast_hash_find_by_pdevid
  1387. (soc, dstmac, vdev->pdev->pdev_id);
  1388. src_ast_entry = dp_peer_ast_hash_find_by_pdevid
  1389. (soc, srcmac, vdev->pdev->pdev_id);
  1390. if (dst_ast_entry && src_ast_entry) {
  1391. if (dst_ast_entry->peer->peer_ids[0] ==
  1392. src_ast_entry->peer->peer_ids[0])
  1393. return 1;
  1394. }
  1395. return 0;
  1396. }
  1397. /**
  1398. * dp_tx_send_msdu_single() - Setup descriptor and enqueue single MSDU to TCL
  1399. * @vdev: DP vdev handle
  1400. * @nbuf: skb
  1401. * @tid: TID from HLOS for overriding default DSCP-TID mapping
  1402. * @meta_data: Metadata to the fw
  1403. * @tx_q: Tx queue to be used for this Tx frame
  1404. * @peer_id: peer_id of the peer in case of NAWDS frames
  1405. * @tx_exc_metadata: Handle that holds exception path metadata
  1406. *
  1407. * Return: NULL on success,
  1408. * nbuf when it fails to send
  1409. */
  1410. qdf_nbuf_t
  1411. dp_tx_send_msdu_single(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1412. struct dp_tx_msdu_info_s *msdu_info, uint16_t peer_id,
  1413. struct cdp_tx_exception_metadata *tx_exc_metadata)
  1414. {
  1415. struct dp_pdev *pdev = vdev->pdev;
  1416. struct dp_soc *soc = pdev->soc;
  1417. struct dp_tx_desc_s *tx_desc;
  1418. QDF_STATUS status;
  1419. struct dp_tx_queue *tx_q = &(msdu_info->tx_queue);
  1420. uint16_t htt_tcl_metadata = 0;
  1421. enum cdp_tx_sw_drop drop_code = TX_MAX_DROP;
  1422. uint8_t tid = msdu_info->tid;
  1423. struct cdp_tid_tx_stats *tid_stats = NULL;
  1424. /* Setup Tx descriptor for an MSDU, and MSDU extension descriptor */
  1425. tx_desc = dp_tx_prepare_desc_single(vdev, nbuf, tx_q->desc_pool_id,
  1426. msdu_info, tx_exc_metadata);
  1427. if (!tx_desc) {
  1428. dp_err_rl("Tx_desc prepare Fail vdev %pK queue %d",
  1429. vdev, tx_q->desc_pool_id);
  1430. drop_code = TX_DESC_ERR;
  1431. goto fail_return;
  1432. }
  1433. if (qdf_unlikely(soc->cce_disable)) {
  1434. if (dp_cce_classify(vdev, nbuf) == true) {
  1435. DP_STATS_INC(vdev, tx_i.cce_classified, 1);
  1436. tid = DP_VO_TID;
  1437. tx_desc->flags |= DP_TX_DESC_FLAG_TO_FW;
  1438. }
  1439. }
  1440. dp_tx_update_tdls_flags(tx_desc);
  1441. if (qdf_unlikely(peer_id == DP_INVALID_PEER)) {
  1442. htt_tcl_metadata = vdev->htt_tcl_metadata;
  1443. HTT_TX_TCL_METADATA_HOST_INSPECTED_SET(htt_tcl_metadata, 1);
  1444. } else if (qdf_unlikely(peer_id != HTT_INVALID_PEER)) {
  1445. HTT_TX_TCL_METADATA_TYPE_SET(htt_tcl_metadata,
  1446. HTT_TCL_METADATA_TYPE_PEER_BASED);
  1447. HTT_TX_TCL_METADATA_PEER_ID_SET(htt_tcl_metadata,
  1448. peer_id);
  1449. } else
  1450. htt_tcl_metadata = vdev->htt_tcl_metadata;
  1451. if (msdu_info->exception_fw)
  1452. HTT_TX_TCL_METADATA_VALID_HTT_SET(htt_tcl_metadata, 1);
  1453. if (qdf_unlikely(QDF_STATUS_SUCCESS !=
  1454. qdf_nbuf_map_nbytes_single(vdev->osdev, nbuf,
  1455. QDF_DMA_TO_DEVICE, nbuf->len))) {
  1456. /* Handle failure */
  1457. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1458. "qdf_nbuf_map failed");
  1459. DP_STATS_INC(vdev, tx_i.dropped.dma_error, 1);
  1460. drop_code = TX_DMA_MAP_ERR;
  1461. goto release_desc;
  1462. }
  1463. /* Enqueue the Tx MSDU descriptor to HW for transmit */
  1464. status = dp_tx_hw_enqueue(soc, vdev, tx_desc, tid,
  1465. htt_tcl_metadata, tx_q->ring_id, tx_exc_metadata);
  1466. if (status != QDF_STATUS_SUCCESS) {
  1467. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1468. "%s Tx_hw_enqueue Fail tx_desc %pK queue %d",
  1469. __func__, tx_desc, tx_q->ring_id);
  1470. qdf_nbuf_unmap_nbytes_single(vdev->osdev, nbuf,
  1471. QDF_DMA_TO_DEVICE,
  1472. nbuf->len);
  1473. drop_code = TX_HW_ENQUEUE;
  1474. goto release_desc;
  1475. }
  1476. return NULL;
  1477. release_desc:
  1478. dp_tx_desc_release(tx_desc, tx_q->desc_pool_id);
  1479. fail_return:
  1480. dp_tx_get_tid(vdev, nbuf, msdu_info);
  1481. tid_stats = &pdev->stats.tid_stats.
  1482. tid_tx_stats[tx_q->ring_id][tid];
  1483. tid_stats->swdrop_cnt[drop_code]++;
  1484. return nbuf;
  1485. }
  1486. /**
  1487. * dp_tx_send_msdu_multiple() - Enqueue multiple MSDUs
  1488. * @vdev: DP vdev handle
  1489. * @nbuf: skb
  1490. * @msdu_info: MSDU info to be setup in MSDU extension descriptor
  1491. *
  1492. * Prepare descriptors for multiple MSDUs (TSO segments) and enqueue to TCL
  1493. *
  1494. * Return: NULL on success,
  1495. * nbuf when it fails to send
  1496. */
  1497. #if QDF_LOCK_STATS
  1498. noinline
  1499. #else
  1500. #endif
  1501. qdf_nbuf_t dp_tx_send_msdu_multiple(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1502. struct dp_tx_msdu_info_s *msdu_info)
  1503. {
  1504. uint8_t i;
  1505. struct dp_pdev *pdev = vdev->pdev;
  1506. struct dp_soc *soc = pdev->soc;
  1507. struct dp_tx_desc_s *tx_desc;
  1508. bool is_cce_classified = false;
  1509. QDF_STATUS status;
  1510. uint16_t htt_tcl_metadata = 0;
  1511. struct dp_tx_queue *tx_q = &msdu_info->tx_queue;
  1512. struct cdp_tid_tx_stats *tid_stats = NULL;
  1513. if (qdf_unlikely(soc->cce_disable)) {
  1514. is_cce_classified = dp_cce_classify(vdev, nbuf);
  1515. if (is_cce_classified) {
  1516. DP_STATS_INC(vdev, tx_i.cce_classified, 1);
  1517. msdu_info->tid = DP_VO_TID;
  1518. }
  1519. }
  1520. if (msdu_info->frm_type == dp_tx_frm_me)
  1521. nbuf = msdu_info->u.sg_info.curr_seg->nbuf;
  1522. i = 0;
  1523. /* Print statement to track i and num_seg */
  1524. /*
  1525. * For each segment (maps to 1 MSDU) , prepare software and hardware
  1526. * descriptors using information in msdu_info
  1527. */
  1528. while (i < msdu_info->num_seg) {
  1529. /*
  1530. * Setup Tx descriptor for an MSDU, and MSDU extension
  1531. * descriptor
  1532. */
  1533. tx_desc = dp_tx_prepare_desc(vdev, nbuf, msdu_info,
  1534. tx_q->desc_pool_id);
  1535. if (!tx_desc) {
  1536. if (msdu_info->frm_type == dp_tx_frm_me) {
  1537. dp_tx_me_free_buf(pdev,
  1538. (void *)(msdu_info->u.sg_info
  1539. .curr_seg->frags[0].vaddr));
  1540. i++;
  1541. continue;
  1542. }
  1543. goto done;
  1544. }
  1545. if (msdu_info->frm_type == dp_tx_frm_me) {
  1546. tx_desc->me_buffer =
  1547. msdu_info->u.sg_info.curr_seg->frags[0].vaddr;
  1548. tx_desc->flags |= DP_TX_DESC_FLAG_ME;
  1549. }
  1550. if (is_cce_classified)
  1551. tx_desc->flags |= DP_TX_DESC_FLAG_TO_FW;
  1552. htt_tcl_metadata = vdev->htt_tcl_metadata;
  1553. if (msdu_info->exception_fw) {
  1554. HTT_TX_TCL_METADATA_VALID_HTT_SET(htt_tcl_metadata, 1);
  1555. }
  1556. /*
  1557. * Enqueue the Tx MSDU descriptor to HW for transmit
  1558. */
  1559. status = dp_tx_hw_enqueue(soc, vdev, tx_desc, msdu_info->tid,
  1560. htt_tcl_metadata, tx_q->ring_id, NULL);
  1561. if (status != QDF_STATUS_SUCCESS) {
  1562. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1563. "%s Tx_hw_enqueue Fail tx_desc %pK queue %d",
  1564. __func__, tx_desc, tx_q->ring_id);
  1565. dp_tx_get_tid(vdev, nbuf, msdu_info);
  1566. tid_stats = &pdev->stats.tid_stats.
  1567. tid_tx_stats[tx_q->ring_id][msdu_info->tid];
  1568. tid_stats->swdrop_cnt[TX_HW_ENQUEUE]++;
  1569. dp_tx_desc_release(tx_desc, tx_q->desc_pool_id);
  1570. if (msdu_info->frm_type == dp_tx_frm_me) {
  1571. i++;
  1572. continue;
  1573. }
  1574. goto done;
  1575. }
  1576. /*
  1577. * TODO
  1578. * if tso_info structure can be modified to have curr_seg
  1579. * as first element, following 2 blocks of code (for TSO and SG)
  1580. * can be combined into 1
  1581. */
  1582. /*
  1583. * For frames with multiple segments (TSO, ME), jump to next
  1584. * segment.
  1585. */
  1586. if (msdu_info->frm_type == dp_tx_frm_tso) {
  1587. if (msdu_info->u.tso_info.curr_seg->next) {
  1588. msdu_info->u.tso_info.curr_seg =
  1589. msdu_info->u.tso_info.curr_seg->next;
  1590. /*
  1591. * If this is a jumbo nbuf, then increment the number of
  1592. * nbuf users for each additional segment of the msdu.
  1593. * This will ensure that the skb is freed only after
  1594. * receiving tx completion for all segments of an nbuf
  1595. */
  1596. qdf_nbuf_inc_users(nbuf);
  1597. /* Check with MCL if this is needed */
  1598. /* nbuf = msdu_info->u.tso_info.curr_seg->nbuf; */
  1599. }
  1600. }
  1601. /*
  1602. * For Multicast-Unicast converted packets,
  1603. * each converted frame (for a client) is represented as
  1604. * 1 segment
  1605. */
  1606. if ((msdu_info->frm_type == dp_tx_frm_sg) ||
  1607. (msdu_info->frm_type == dp_tx_frm_me)) {
  1608. if (msdu_info->u.sg_info.curr_seg->next) {
  1609. msdu_info->u.sg_info.curr_seg =
  1610. msdu_info->u.sg_info.curr_seg->next;
  1611. nbuf = msdu_info->u.sg_info.curr_seg->nbuf;
  1612. }
  1613. }
  1614. i++;
  1615. }
  1616. nbuf = NULL;
  1617. done:
  1618. return nbuf;
  1619. }
  1620. /**
  1621. * dp_tx_prepare_sg()- Extract SG info from NBUF and prepare msdu_info
  1622. * for SG frames
  1623. * @vdev: DP vdev handle
  1624. * @nbuf: skb
  1625. * @seg_info: Pointer to Segment info Descriptor to be prepared
  1626. * @msdu_info: MSDU info to be setup in MSDU descriptor and MSDU extension desc.
  1627. *
  1628. * Return: NULL on success,
  1629. * nbuf when it fails to send
  1630. */
  1631. static qdf_nbuf_t dp_tx_prepare_sg(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1632. struct dp_tx_seg_info_s *seg_info, struct dp_tx_msdu_info_s *msdu_info)
  1633. {
  1634. uint32_t cur_frag, nr_frags;
  1635. qdf_dma_addr_t paddr;
  1636. struct dp_tx_sg_info_s *sg_info;
  1637. sg_info = &msdu_info->u.sg_info;
  1638. nr_frags = qdf_nbuf_get_nr_frags(nbuf);
  1639. if (QDF_STATUS_SUCCESS !=
  1640. qdf_nbuf_map_nbytes_single(vdev->osdev, nbuf,
  1641. QDF_DMA_TO_DEVICE, nbuf->len)) {
  1642. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1643. "dma map error");
  1644. DP_STATS_INC(vdev, tx_i.sg.dma_map_error, 1);
  1645. qdf_nbuf_free(nbuf);
  1646. return NULL;
  1647. }
  1648. paddr = qdf_nbuf_mapped_paddr_get(nbuf);
  1649. seg_info->frags[0].paddr_lo = paddr;
  1650. seg_info->frags[0].paddr_hi = ((uint64_t) paddr) >> 32;
  1651. seg_info->frags[0].len = qdf_nbuf_headlen(nbuf);
  1652. seg_info->frags[0].vaddr = (void *) nbuf;
  1653. for (cur_frag = 0; cur_frag < nr_frags; cur_frag++) {
  1654. if (QDF_STATUS_E_FAILURE == qdf_nbuf_frag_map(vdev->osdev,
  1655. nbuf, 0, QDF_DMA_TO_DEVICE, cur_frag)) {
  1656. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1657. "frag dma map error");
  1658. DP_STATS_INC(vdev, tx_i.sg.dma_map_error, 1);
  1659. qdf_nbuf_free(nbuf);
  1660. return NULL;
  1661. }
  1662. paddr = qdf_nbuf_get_tx_frag_paddr(nbuf);
  1663. seg_info->frags[cur_frag + 1].paddr_lo = paddr;
  1664. seg_info->frags[cur_frag + 1].paddr_hi =
  1665. ((uint64_t) paddr) >> 32;
  1666. seg_info->frags[cur_frag + 1].len =
  1667. qdf_nbuf_get_frag_size(nbuf, cur_frag);
  1668. }
  1669. seg_info->frag_cnt = (cur_frag + 1);
  1670. seg_info->total_len = qdf_nbuf_len(nbuf);
  1671. seg_info->next = NULL;
  1672. sg_info->curr_seg = seg_info;
  1673. msdu_info->frm_type = dp_tx_frm_sg;
  1674. msdu_info->num_seg = 1;
  1675. return nbuf;
  1676. }
  1677. /**
  1678. * dp_tx_add_tx_sniffer_meta_data()- Add tx_sniffer meta hdr info
  1679. * @vdev: DP vdev handle
  1680. * @msdu_info: MSDU info to be setup in MSDU descriptor and MSDU extension desc.
  1681. * @ppdu_cookie: PPDU cookie that should be replayed in the ppdu completions
  1682. *
  1683. * Return: NULL on failure,
  1684. * nbuf when extracted successfully
  1685. */
  1686. static
  1687. void dp_tx_add_tx_sniffer_meta_data(struct dp_vdev *vdev,
  1688. struct dp_tx_msdu_info_s *msdu_info,
  1689. uint16_t ppdu_cookie)
  1690. {
  1691. struct htt_tx_msdu_desc_ext2_t *meta_data =
  1692. (struct htt_tx_msdu_desc_ext2_t *)&msdu_info->meta_data[0];
  1693. qdf_mem_zero(meta_data, sizeof(struct htt_tx_msdu_desc_ext2_t));
  1694. HTT_TX_MSDU_EXT2_DESC_FLAG_SEND_AS_STANDALONE_SET
  1695. (msdu_info->meta_data[5], 1);
  1696. HTT_TX_MSDU_EXT2_DESC_FLAG_HOST_OPAQUE_VALID_SET
  1697. (msdu_info->meta_data[5], 1);
  1698. HTT_TX_MSDU_EXT2_DESC_HOST_OPAQUE_COOKIE_SET
  1699. (msdu_info->meta_data[6], ppdu_cookie);
  1700. msdu_info->exception_fw = 1;
  1701. msdu_info->is_tx_sniffer = 1;
  1702. }
  1703. #ifdef MESH_MODE_SUPPORT
  1704. /**
  1705. * dp_tx_extract_mesh_meta_data()- Extract mesh meta hdr info from nbuf
  1706. and prepare msdu_info for mesh frames.
  1707. * @vdev: DP vdev handle
  1708. * @nbuf: skb
  1709. * @msdu_info: MSDU info to be setup in MSDU descriptor and MSDU extension desc.
  1710. *
  1711. * Return: NULL on failure,
  1712. * nbuf when extracted successfully
  1713. */
  1714. static
  1715. qdf_nbuf_t dp_tx_extract_mesh_meta_data(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1716. struct dp_tx_msdu_info_s *msdu_info)
  1717. {
  1718. struct meta_hdr_s *mhdr;
  1719. struct htt_tx_msdu_desc_ext2_t *meta_data =
  1720. (struct htt_tx_msdu_desc_ext2_t *)&msdu_info->meta_data[0];
  1721. mhdr = (struct meta_hdr_s *)qdf_nbuf_data(nbuf);
  1722. if (CB_FTYPE_MESH_TX_INFO != qdf_nbuf_get_tx_ftype(nbuf)) {
  1723. msdu_info->exception_fw = 0;
  1724. goto remove_meta_hdr;
  1725. }
  1726. msdu_info->exception_fw = 1;
  1727. qdf_mem_zero(meta_data, sizeof(struct htt_tx_msdu_desc_ext2_t));
  1728. meta_data->host_tx_desc_pool = 1;
  1729. meta_data->update_peer_cache = 1;
  1730. meta_data->learning_frame = 1;
  1731. if (!(mhdr->flags & METAHDR_FLAG_AUTO_RATE)) {
  1732. meta_data->power = mhdr->power;
  1733. meta_data->mcs_mask = 1 << mhdr->rate_info[0].mcs;
  1734. meta_data->nss_mask = 1 << mhdr->rate_info[0].nss;
  1735. meta_data->pream_type = mhdr->rate_info[0].preamble_type;
  1736. meta_data->retry_limit = mhdr->rate_info[0].max_tries;
  1737. meta_data->dyn_bw = 1;
  1738. meta_data->valid_pwr = 1;
  1739. meta_data->valid_mcs_mask = 1;
  1740. meta_data->valid_nss_mask = 1;
  1741. meta_data->valid_preamble_type = 1;
  1742. meta_data->valid_retries = 1;
  1743. meta_data->valid_bw_info = 1;
  1744. }
  1745. if (mhdr->flags & METAHDR_FLAG_NOENCRYPT) {
  1746. meta_data->encrypt_type = 0;
  1747. meta_data->valid_encrypt_type = 1;
  1748. meta_data->learning_frame = 0;
  1749. }
  1750. meta_data->valid_key_flags = 1;
  1751. meta_data->key_flags = (mhdr->keyix & 0x3);
  1752. remove_meta_hdr:
  1753. if (qdf_nbuf_pull_head(nbuf, sizeof(struct meta_hdr_s)) == NULL) {
  1754. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1755. "qdf_nbuf_pull_head failed");
  1756. qdf_nbuf_free(nbuf);
  1757. return NULL;
  1758. }
  1759. msdu_info->tid = qdf_nbuf_get_priority(nbuf);
  1760. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1761. "%s , Meta hdr %0x %0x %0x %0x %0x %0x"
  1762. " tid %d to_fw %d",
  1763. __func__, msdu_info->meta_data[0],
  1764. msdu_info->meta_data[1],
  1765. msdu_info->meta_data[2],
  1766. msdu_info->meta_data[3],
  1767. msdu_info->meta_data[4],
  1768. msdu_info->meta_data[5],
  1769. msdu_info->tid, msdu_info->exception_fw);
  1770. return nbuf;
  1771. }
  1772. #else
  1773. static
  1774. qdf_nbuf_t dp_tx_extract_mesh_meta_data(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1775. struct dp_tx_msdu_info_s *msdu_info)
  1776. {
  1777. return nbuf;
  1778. }
  1779. #endif
  1780. /**
  1781. * dp_check_exc_metadata() - Checks if parameters are valid
  1782. * @tx_exc - holds all exception path parameters
  1783. *
  1784. * Returns true when all the parameters are valid else false
  1785. *
  1786. */
  1787. static bool dp_check_exc_metadata(struct cdp_tx_exception_metadata *tx_exc)
  1788. {
  1789. bool invalid_tid = (tx_exc->tid > DP_MAX_TIDS && tx_exc->tid !=
  1790. HTT_INVALID_TID);
  1791. bool invalid_encap_type =
  1792. (tx_exc->tx_encap_type > htt_cmn_pkt_num_types &&
  1793. tx_exc->tx_encap_type != CDP_INVALID_TX_ENCAP_TYPE);
  1794. bool invalid_sec_type = (tx_exc->sec_type > cdp_num_sec_types &&
  1795. tx_exc->sec_type != CDP_INVALID_SEC_TYPE);
  1796. bool invalid_cookie = (tx_exc->is_tx_sniffer == 1 &&
  1797. tx_exc->ppdu_cookie == 0);
  1798. if (invalid_tid || invalid_encap_type || invalid_sec_type ||
  1799. invalid_cookie) {
  1800. return false;
  1801. }
  1802. return true;
  1803. }
  1804. /**
  1805. * dp_tx_send_exception() - Transmit a frame on a given VAP in exception path
  1806. * @soc: DP soc handle
  1807. * @vdev_id: id of DP vdev handle
  1808. * @nbuf: skb
  1809. * @tx_exc_metadata: Handle that holds exception path meta data
  1810. *
  1811. * Entry point for Core Tx layer (DP_TX) invoked from
  1812. * hard_start_xmit in OSIF/HDD to transmit frames through fw
  1813. *
  1814. * Return: NULL on success,
  1815. * nbuf when it fails to send
  1816. */
  1817. qdf_nbuf_t
  1818. dp_tx_send_exception(struct cdp_soc_t *soc, uint8_t vdev_id, qdf_nbuf_t nbuf,
  1819. struct cdp_tx_exception_metadata *tx_exc_metadata)
  1820. {
  1821. qdf_ether_header_t *eh = NULL;
  1822. struct dp_tx_msdu_info_s msdu_info;
  1823. struct dp_vdev *vdev =
  1824. dp_get_vdev_from_soc_vdev_id_wifi3((struct dp_soc *)soc,
  1825. vdev_id);
  1826. if (qdf_unlikely(!vdev))
  1827. goto fail;
  1828. qdf_mem_zero(&msdu_info, sizeof(msdu_info));
  1829. if (!tx_exc_metadata)
  1830. goto fail;
  1831. msdu_info.tid = tx_exc_metadata->tid;
  1832. eh = (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  1833. dp_verbose_debug("skb %pM", nbuf->data);
  1834. DP_STATS_INC_PKT(vdev, tx_i.rcvd, 1, qdf_nbuf_len(nbuf));
  1835. if (qdf_unlikely(!dp_check_exc_metadata(tx_exc_metadata))) {
  1836. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1837. "Invalid parameters in exception path");
  1838. goto fail;
  1839. }
  1840. /* Basic sanity checks for unsupported packets */
  1841. /* MESH mode */
  1842. if (qdf_unlikely(vdev->mesh_vdev)) {
  1843. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1844. "Mesh mode is not supported in exception path");
  1845. goto fail;
  1846. }
  1847. /* TSO or SG */
  1848. if (qdf_unlikely(qdf_nbuf_is_tso(nbuf)) ||
  1849. qdf_unlikely(qdf_nbuf_is_nonlinear(nbuf))) {
  1850. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1851. "TSO and SG are not supported in exception path");
  1852. goto fail;
  1853. }
  1854. /* RAW */
  1855. if (qdf_unlikely(tx_exc_metadata->tx_encap_type == htt_cmn_pkt_type_raw)) {
  1856. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1857. "Raw frame is not supported in exception path");
  1858. goto fail;
  1859. }
  1860. /* Mcast enhancement*/
  1861. if (qdf_unlikely(vdev->mcast_enhancement_en > 0)) {
  1862. if (DP_FRAME_IS_MULTICAST((eh)->ether_dhost) &&
  1863. !DP_FRAME_IS_BROADCAST((eh)->ether_dhost)) {
  1864. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1865. "Ignoring mcast_enhancement_en which is set and sending the mcast packet to the FW");
  1866. }
  1867. }
  1868. if (qdf_likely(tx_exc_metadata->is_tx_sniffer)) {
  1869. DP_STATS_INC_PKT(vdev, tx_i.sniffer_rcvd, 1,
  1870. qdf_nbuf_len(nbuf));
  1871. dp_tx_add_tx_sniffer_meta_data(vdev, &msdu_info,
  1872. tx_exc_metadata->ppdu_cookie);
  1873. }
  1874. /*
  1875. * Get HW Queue to use for this frame.
  1876. * TCL supports upto 4 DMA rings, out of which 3 rings are
  1877. * dedicated for data and 1 for command.
  1878. * "queue_id" maps to one hardware ring.
  1879. * With each ring, we also associate a unique Tx descriptor pool
  1880. * to minimize lock contention for these resources.
  1881. */
  1882. dp_tx_get_queue(vdev, nbuf, &msdu_info.tx_queue);
  1883. /* Single linear frame */
  1884. /*
  1885. * If nbuf is a simple linear frame, use send_single function to
  1886. * prepare direct-buffer type TCL descriptor and enqueue to TCL
  1887. * SRNG. There is no need to setup a MSDU extension descriptor.
  1888. */
  1889. nbuf = dp_tx_send_msdu_single(vdev, nbuf, &msdu_info,
  1890. tx_exc_metadata->peer_id, tx_exc_metadata);
  1891. return nbuf;
  1892. fail:
  1893. dp_verbose_debug("pkt send failed");
  1894. return nbuf;
  1895. }
  1896. /**
  1897. * dp_tx_send_mesh() - Transmit mesh frame on a given VAP
  1898. * @soc: DP soc handle
  1899. * @vdev_id: DP vdev handle
  1900. * @nbuf: skb
  1901. *
  1902. * Entry point for Core Tx layer (DP_TX) invoked from
  1903. * hard_start_xmit in OSIF/HDD
  1904. *
  1905. * Return: NULL on success,
  1906. * nbuf when it fails to send
  1907. */
  1908. #ifdef MESH_MODE_SUPPORT
  1909. qdf_nbuf_t dp_tx_send_mesh(struct cdp_soc_t *soc, uint8_t vdev_id,
  1910. qdf_nbuf_t nbuf)
  1911. {
  1912. struct meta_hdr_s *mhdr;
  1913. qdf_nbuf_t nbuf_mesh = NULL;
  1914. qdf_nbuf_t nbuf_clone = NULL;
  1915. struct dp_vdev *vdev;
  1916. uint8_t no_enc_frame = 0;
  1917. nbuf_mesh = qdf_nbuf_unshare(nbuf);
  1918. if (!nbuf_mesh) {
  1919. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1920. "qdf_nbuf_unshare failed");
  1921. return nbuf;
  1922. }
  1923. vdev = dp_get_vdev_from_soc_vdev_id_wifi3((struct dp_soc *)soc,
  1924. vdev_id);
  1925. if (!vdev) {
  1926. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1927. "vdev is NULL for vdev_id %d", vdev_id);
  1928. return nbuf;
  1929. }
  1930. nbuf = nbuf_mesh;
  1931. mhdr = (struct meta_hdr_s *)qdf_nbuf_data(nbuf);
  1932. if ((vdev->sec_type != cdp_sec_type_none) &&
  1933. (mhdr->flags & METAHDR_FLAG_NOENCRYPT))
  1934. no_enc_frame = 1;
  1935. if (mhdr->flags & METAHDR_FLAG_NOQOS)
  1936. qdf_nbuf_set_priority(nbuf, HTT_TX_EXT_TID_NON_QOS_MCAST_BCAST);
  1937. if ((mhdr->flags & METAHDR_FLAG_INFO_UPDATED) &&
  1938. !no_enc_frame) {
  1939. nbuf_clone = qdf_nbuf_clone(nbuf);
  1940. if (!nbuf_clone) {
  1941. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1942. "qdf_nbuf_clone failed");
  1943. return nbuf;
  1944. }
  1945. qdf_nbuf_set_tx_ftype(nbuf_clone, CB_FTYPE_MESH_TX_INFO);
  1946. }
  1947. if (nbuf_clone) {
  1948. if (!dp_tx_send(soc, vdev_id, nbuf_clone)) {
  1949. DP_STATS_INC(vdev, tx_i.mesh.exception_fw, 1);
  1950. } else {
  1951. qdf_nbuf_free(nbuf_clone);
  1952. }
  1953. }
  1954. if (no_enc_frame)
  1955. qdf_nbuf_set_tx_ftype(nbuf, CB_FTYPE_MESH_TX_INFO);
  1956. else
  1957. qdf_nbuf_set_tx_ftype(nbuf, CB_FTYPE_INVALID);
  1958. nbuf = dp_tx_send(soc, vdev_id, nbuf);
  1959. if ((!nbuf) && no_enc_frame) {
  1960. DP_STATS_INC(vdev, tx_i.mesh.exception_fw, 1);
  1961. }
  1962. return nbuf;
  1963. }
  1964. #else
  1965. qdf_nbuf_t dp_tx_send_mesh(struct cdp_soc_t *soc, uint8_t vdev_id,
  1966. qdf_nbuf_t nbuf)
  1967. {
  1968. return dp_tx_send(soc, vdev_id, nbuf);
  1969. }
  1970. #endif
  1971. /**
  1972. * dp_tx_nawds_handler() - NAWDS handler
  1973. *
  1974. * @soc: DP soc handle
  1975. * @vdev_id: id of DP vdev handle
  1976. * @msdu_info: msdu_info required to create HTT metadata
  1977. * @nbuf: skb
  1978. *
  1979. * This API transfers the multicast frames with the peer id
  1980. * on NAWDS enabled peer.
  1981. * Return: none
  1982. */
  1983. static inline
  1984. void dp_tx_nawds_handler(struct cdp_soc_t *soc, struct dp_vdev *vdev,
  1985. struct dp_tx_msdu_info_s *msdu_info, qdf_nbuf_t nbuf)
  1986. {
  1987. struct dp_peer *peer = NULL;
  1988. qdf_nbuf_t nbuf_clone = NULL;
  1989. struct dp_soc *dp_soc = (struct dp_soc *)soc;
  1990. uint16_t peer_id = DP_INVALID_PEER;
  1991. struct dp_peer *sa_peer = NULL;
  1992. struct dp_ast_entry *ast_entry = NULL;
  1993. qdf_ether_header_t *eh = (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  1994. if (qdf_nbuf_get_tx_ftype(nbuf) == CB_FTYPE_INTRABSS_FWD) {
  1995. qdf_spin_lock_bh(&dp_soc->ast_lock);
  1996. ast_entry = dp_peer_ast_hash_find_by_pdevid
  1997. (dp_soc,
  1998. (uint8_t *)(eh->ether_shost),
  1999. vdev->pdev->pdev_id);
  2000. if (ast_entry)
  2001. sa_peer = ast_entry->peer;
  2002. qdf_spin_unlock_bh(&dp_soc->ast_lock);
  2003. }
  2004. qdf_spin_lock_bh(&dp_soc->peer_ref_mutex);
  2005. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  2006. if (!peer->bss_peer && peer->nawds_enabled) {
  2007. peer_id = peer->peer_ids[0];
  2008. /* Multicast packets needs to be
  2009. * dropped in case of intra bss forwarding
  2010. */
  2011. if (sa_peer == peer) {
  2012. QDF_TRACE(QDF_MODULE_ID_DP,
  2013. QDF_TRACE_LEVEL_DEBUG,
  2014. " %s: multicast packet", __func__);
  2015. DP_STATS_INC(peer, tx.nawds_mcast_drop, 1);
  2016. continue;
  2017. }
  2018. nbuf_clone = qdf_nbuf_clone(nbuf);
  2019. if (!nbuf_clone) {
  2020. QDF_TRACE(QDF_MODULE_ID_DP,
  2021. QDF_TRACE_LEVEL_ERROR,
  2022. FL("nbuf clone failed"));
  2023. break;
  2024. }
  2025. nbuf_clone = dp_tx_send_msdu_single(vdev, nbuf_clone,
  2026. msdu_info, peer_id,
  2027. NULL);
  2028. if (nbuf_clone) {
  2029. QDF_TRACE(QDF_MODULE_ID_DP,
  2030. QDF_TRACE_LEVEL_DEBUG,
  2031. FL("pkt send failed"));
  2032. qdf_nbuf_free(nbuf_clone);
  2033. } else {
  2034. if (peer_id != DP_INVALID_PEER)
  2035. DP_STATS_INC_PKT(peer, tx.nawds_mcast,
  2036. 1, qdf_nbuf_len(nbuf));
  2037. }
  2038. }
  2039. }
  2040. qdf_spin_unlock_bh(&dp_soc->peer_ref_mutex);
  2041. }
  2042. /**
  2043. * dp_tx_send() - Transmit a frame on a given VAP
  2044. * @soc: DP soc handle
  2045. * @vdev_id: id of DP vdev handle
  2046. * @nbuf: skb
  2047. *
  2048. * Entry point for Core Tx layer (DP_TX) invoked from
  2049. * hard_start_xmit in OSIF/HDD or from dp_rx_process for intravap forwarding
  2050. * cases
  2051. *
  2052. * Return: NULL on success,
  2053. * nbuf when it fails to send
  2054. */
  2055. qdf_nbuf_t dp_tx_send(struct cdp_soc_t *soc, uint8_t vdev_id, qdf_nbuf_t nbuf)
  2056. {
  2057. uint16_t peer_id = HTT_INVALID_PEER;
  2058. /*
  2059. * doing a memzero is causing additional function call overhead
  2060. * so doing static stack clearing
  2061. */
  2062. struct dp_tx_msdu_info_s msdu_info = {0};
  2063. struct dp_vdev *vdev =
  2064. dp_get_vdev_from_soc_vdev_id_wifi3((struct dp_soc *)soc,
  2065. vdev_id);
  2066. if (qdf_unlikely(!vdev))
  2067. return nbuf;
  2068. dp_verbose_debug("skb %pM", nbuf->data);
  2069. /*
  2070. * Set Default Host TID value to invalid TID
  2071. * (TID override disabled)
  2072. */
  2073. msdu_info.tid = HTT_TX_EXT_TID_INVALID;
  2074. DP_STATS_INC_PKT(vdev, tx_i.rcvd, 1, qdf_nbuf_len(nbuf));
  2075. if (qdf_unlikely(vdev->mesh_vdev)) {
  2076. qdf_nbuf_t nbuf_mesh = dp_tx_extract_mesh_meta_data(vdev, nbuf,
  2077. &msdu_info);
  2078. if (!nbuf_mesh) {
  2079. dp_verbose_debug("Extracting mesh metadata failed");
  2080. return nbuf;
  2081. }
  2082. nbuf = nbuf_mesh;
  2083. }
  2084. /*
  2085. * Get HW Queue to use for this frame.
  2086. * TCL supports upto 4 DMA rings, out of which 3 rings are
  2087. * dedicated for data and 1 for command.
  2088. * "queue_id" maps to one hardware ring.
  2089. * With each ring, we also associate a unique Tx descriptor pool
  2090. * to minimize lock contention for these resources.
  2091. */
  2092. dp_tx_get_queue(vdev, nbuf, &msdu_info.tx_queue);
  2093. /*
  2094. * TCL H/W supports 2 DSCP-TID mapping tables.
  2095. * Table 1 - Default DSCP-TID mapping table
  2096. * Table 2 - 1 DSCP-TID override table
  2097. *
  2098. * If we need a different DSCP-TID mapping for this vap,
  2099. * call tid_classify to extract DSCP/ToS from frame and
  2100. * map to a TID and store in msdu_info. This is later used
  2101. * to fill in TCL Input descriptor (per-packet TID override).
  2102. */
  2103. dp_tx_classify_tid(vdev, nbuf, &msdu_info);
  2104. /*
  2105. * Classify the frame and call corresponding
  2106. * "prepare" function which extracts the segment (TSO)
  2107. * and fragmentation information (for TSO , SG, ME, or Raw)
  2108. * into MSDU_INFO structure which is later used to fill
  2109. * SW and HW descriptors.
  2110. */
  2111. if (qdf_nbuf_is_tso(nbuf)) {
  2112. dp_verbose_debug("TSO frame %pK", vdev);
  2113. DP_STATS_INC_PKT(vdev->pdev, tso_stats.num_tso_pkts, 1,
  2114. qdf_nbuf_len(nbuf));
  2115. if (dp_tx_prepare_tso(vdev, nbuf, &msdu_info)) {
  2116. DP_STATS_INC_PKT(vdev->pdev, tso_stats.dropped_host, 1,
  2117. qdf_nbuf_len(nbuf));
  2118. return nbuf;
  2119. }
  2120. goto send_multiple;
  2121. }
  2122. /* SG */
  2123. if (qdf_unlikely(qdf_nbuf_is_nonlinear(nbuf))) {
  2124. struct dp_tx_seg_info_s seg_info = {0};
  2125. nbuf = dp_tx_prepare_sg(vdev, nbuf, &seg_info, &msdu_info);
  2126. if (!nbuf)
  2127. return NULL;
  2128. dp_verbose_debug("non-TSO SG frame %pK", vdev);
  2129. DP_STATS_INC_PKT(vdev, tx_i.sg.sg_pkt, 1,
  2130. qdf_nbuf_len(nbuf));
  2131. goto send_multiple;
  2132. }
  2133. #ifdef ATH_SUPPORT_IQUE
  2134. /* Mcast to Ucast Conversion*/
  2135. if (qdf_unlikely(vdev->mcast_enhancement_en > 0)) {
  2136. qdf_ether_header_t *eh = (qdf_ether_header_t *)
  2137. qdf_nbuf_data(nbuf);
  2138. if (DP_FRAME_IS_MULTICAST((eh)->ether_dhost) &&
  2139. !DP_FRAME_IS_BROADCAST((eh)->ether_dhost)) {
  2140. dp_verbose_debug("Mcast frm for ME %pK", vdev);
  2141. DP_STATS_INC_PKT(vdev,
  2142. tx_i.mcast_en.mcast_pkt, 1,
  2143. qdf_nbuf_len(nbuf));
  2144. if (dp_tx_prepare_send_me(vdev, nbuf) ==
  2145. QDF_STATUS_SUCCESS) {
  2146. return NULL;
  2147. }
  2148. }
  2149. }
  2150. #endif
  2151. /* RAW */
  2152. if (qdf_unlikely(vdev->tx_encap_type == htt_cmn_pkt_type_raw)) {
  2153. struct dp_tx_seg_info_s seg_info = {0};
  2154. nbuf = dp_tx_prepare_raw(vdev, nbuf, &seg_info, &msdu_info);
  2155. if (!nbuf)
  2156. return NULL;
  2157. dp_verbose_debug("Raw frame %pK", vdev);
  2158. goto send_multiple;
  2159. }
  2160. if (qdf_unlikely(vdev->nawds_enabled)) {
  2161. qdf_ether_header_t *eh = (qdf_ether_header_t *)
  2162. qdf_nbuf_data(nbuf);
  2163. if (DP_FRAME_IS_MULTICAST((eh)->ether_dhost))
  2164. dp_tx_nawds_handler(soc, vdev, &msdu_info, nbuf);
  2165. peer_id = DP_INVALID_PEER;
  2166. DP_STATS_INC_PKT(vdev, tx_i.nawds_mcast,
  2167. 1, qdf_nbuf_len(nbuf));
  2168. }
  2169. /* Single linear frame */
  2170. /*
  2171. * If nbuf is a simple linear frame, use send_single function to
  2172. * prepare direct-buffer type TCL descriptor and enqueue to TCL
  2173. * SRNG. There is no need to setup a MSDU extension descriptor.
  2174. */
  2175. nbuf = dp_tx_send_msdu_single(vdev, nbuf, &msdu_info, peer_id, NULL);
  2176. return nbuf;
  2177. send_multiple:
  2178. nbuf = dp_tx_send_msdu_multiple(vdev, nbuf, &msdu_info);
  2179. if (qdf_unlikely(nbuf && msdu_info.frm_type == dp_tx_frm_raw))
  2180. dp_tx_raw_prepare_unset(vdev->pdev->soc, nbuf);
  2181. return nbuf;
  2182. }
  2183. /**
  2184. * dp_tx_reinject_handler() - Tx Reinject Handler
  2185. * @tx_desc: software descriptor head pointer
  2186. * @status : Tx completion status from HTT descriptor
  2187. *
  2188. * This function reinjects frames back to Target.
  2189. * Todo - Host queue needs to be added
  2190. *
  2191. * Return: none
  2192. */
  2193. static
  2194. void dp_tx_reinject_handler(struct dp_tx_desc_s *tx_desc, uint8_t *status)
  2195. {
  2196. struct dp_vdev *vdev;
  2197. struct dp_peer *peer = NULL;
  2198. uint32_t peer_id = HTT_INVALID_PEER;
  2199. qdf_nbuf_t nbuf = tx_desc->nbuf;
  2200. qdf_nbuf_t nbuf_copy = NULL;
  2201. struct dp_tx_msdu_info_s msdu_info;
  2202. struct dp_soc *soc = NULL;
  2203. #ifdef WDS_VENDOR_EXTENSION
  2204. int is_mcast = 0, is_ucast = 0;
  2205. int num_peers_3addr = 0;
  2206. qdf_ether_header_t *eth_hdr = (qdf_ether_header_t *)(qdf_nbuf_data(nbuf));
  2207. struct ieee80211_frame_addr4 *wh = (struct ieee80211_frame_addr4 *)(qdf_nbuf_data(nbuf));
  2208. #endif
  2209. vdev = tx_desc->vdev;
  2210. soc = vdev->pdev->soc;
  2211. qdf_assert(vdev);
  2212. qdf_mem_zero(&msdu_info, sizeof(msdu_info));
  2213. dp_tx_get_queue(vdev, nbuf, &msdu_info.tx_queue);
  2214. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  2215. "%s Tx reinject path", __func__);
  2216. DP_STATS_INC_PKT(vdev, tx_i.reinject_pkts, 1,
  2217. qdf_nbuf_len(tx_desc->nbuf));
  2218. #ifdef WDS_VENDOR_EXTENSION
  2219. if (qdf_unlikely(vdev->tx_encap_type != htt_cmn_pkt_type_raw)) {
  2220. is_mcast = (IS_MULTICAST(wh->i_addr1)) ? 1 : 0;
  2221. } else {
  2222. is_mcast = (IS_MULTICAST(eth_hdr->ether_dhost)) ? 1 : 0;
  2223. }
  2224. is_ucast = !is_mcast;
  2225. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  2226. if (peer->bss_peer)
  2227. continue;
  2228. /* Detect wds peers that use 3-addr framing for mcast.
  2229. * if there are any, the bss_peer is used to send the
  2230. * the mcast frame using 3-addr format. all wds enabled
  2231. * peers that use 4-addr framing for mcast frames will
  2232. * be duplicated and sent as 4-addr frames below.
  2233. */
  2234. if (!peer->wds_enabled || !peer->wds_ecm.wds_tx_mcast_4addr) {
  2235. num_peers_3addr = 1;
  2236. break;
  2237. }
  2238. }
  2239. #endif
  2240. if (qdf_unlikely(vdev->mesh_vdev)) {
  2241. DP_TX_FREE_SINGLE_BUF(vdev->pdev->soc, tx_desc->nbuf);
  2242. } else {
  2243. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  2244. if ((peer->peer_ids[0] != HTT_INVALID_PEER) &&
  2245. #ifdef WDS_VENDOR_EXTENSION
  2246. /*
  2247. * . if 3-addr STA, then send on BSS Peer
  2248. * . if Peer WDS enabled and accept 4-addr mcast,
  2249. * send mcast on that peer only
  2250. * . if Peer WDS enabled and accept 4-addr ucast,
  2251. * send ucast on that peer only
  2252. */
  2253. ((peer->bss_peer && num_peers_3addr && is_mcast) ||
  2254. (peer->wds_enabled &&
  2255. ((is_mcast && peer->wds_ecm.wds_tx_mcast_4addr) ||
  2256. (is_ucast && peer->wds_ecm.wds_tx_ucast_4addr))))) {
  2257. #else
  2258. ((peer->bss_peer &&
  2259. !(vdev->osif_proxy_arp(vdev->osif_vdev, nbuf))))) {
  2260. #endif
  2261. peer_id = DP_INVALID_PEER;
  2262. nbuf_copy = qdf_nbuf_copy(nbuf);
  2263. if (!nbuf_copy) {
  2264. QDF_TRACE(QDF_MODULE_ID_DP,
  2265. QDF_TRACE_LEVEL_DEBUG,
  2266. FL("nbuf copy failed"));
  2267. break;
  2268. }
  2269. nbuf_copy = dp_tx_send_msdu_single(vdev,
  2270. nbuf_copy,
  2271. &msdu_info,
  2272. peer_id,
  2273. NULL);
  2274. if (nbuf_copy) {
  2275. QDF_TRACE(QDF_MODULE_ID_DP,
  2276. QDF_TRACE_LEVEL_DEBUG,
  2277. FL("pkt send failed"));
  2278. qdf_nbuf_free(nbuf_copy);
  2279. } else {
  2280. if (peer_id != DP_INVALID_PEER)
  2281. DP_STATS_INC_PKT(peer,
  2282. tx.nawds_mcast,
  2283. 1, qdf_nbuf_len(nbuf));
  2284. }
  2285. }
  2286. }
  2287. }
  2288. qdf_nbuf_free(nbuf);
  2289. dp_tx_desc_release(tx_desc, tx_desc->pool_id);
  2290. }
  2291. /**
  2292. * dp_tx_inspect_handler() - Tx Inspect Handler
  2293. * @tx_desc: software descriptor head pointer
  2294. * @status : Tx completion status from HTT descriptor
  2295. *
  2296. * Handles Tx frames sent back to Host for inspection
  2297. * (ProxyARP)
  2298. *
  2299. * Return: none
  2300. */
  2301. static void dp_tx_inspect_handler(struct dp_tx_desc_s *tx_desc, uint8_t *status)
  2302. {
  2303. struct dp_soc *soc;
  2304. struct dp_pdev *pdev = tx_desc->pdev;
  2305. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  2306. "%s Tx inspect path",
  2307. __func__);
  2308. qdf_assert(pdev);
  2309. soc = pdev->soc;
  2310. DP_STATS_INC_PKT(tx_desc->vdev, tx_i.inspect_pkts, 1,
  2311. qdf_nbuf_len(tx_desc->nbuf));
  2312. DP_TX_FREE_SINGLE_BUF(soc, tx_desc->nbuf);
  2313. dp_tx_desc_release(tx_desc, tx_desc->pool_id);
  2314. }
  2315. #ifdef FEATURE_PERPKT_INFO
  2316. /**
  2317. * dp_get_completion_indication_for_stack() - send completion to stack
  2318. * @soc : dp_soc handle
  2319. * @pdev: dp_pdev handle
  2320. * @peer: dp peer handle
  2321. * @ts: transmit completion status structure
  2322. * @netbuf: Buffer pointer for free
  2323. *
  2324. * This function is used for indication whether buffer needs to be
  2325. * sent to stack for freeing or not
  2326. */
  2327. QDF_STATUS
  2328. dp_get_completion_indication_for_stack(struct dp_soc *soc,
  2329. struct dp_pdev *pdev,
  2330. struct dp_peer *peer,
  2331. struct hal_tx_completion_status *ts,
  2332. qdf_nbuf_t netbuf,
  2333. uint64_t time_latency)
  2334. {
  2335. struct tx_capture_hdr *ppdu_hdr;
  2336. uint16_t peer_id = ts->peer_id;
  2337. uint32_t ppdu_id = ts->ppdu_id;
  2338. uint8_t first_msdu = ts->first_msdu;
  2339. uint8_t last_msdu = ts->last_msdu;
  2340. if (qdf_unlikely(!pdev->tx_sniffer_enable && !pdev->mcopy_mode &&
  2341. !pdev->latency_capture_enable))
  2342. return QDF_STATUS_E_NOSUPPORT;
  2343. if (!peer) {
  2344. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2345. FL("Peer Invalid"));
  2346. return QDF_STATUS_E_INVAL;
  2347. }
  2348. if (pdev->mcopy_mode) {
  2349. if ((pdev->m_copy_id.tx_ppdu_id == ppdu_id) &&
  2350. (pdev->m_copy_id.tx_peer_id == peer_id)) {
  2351. return QDF_STATUS_E_INVAL;
  2352. }
  2353. pdev->m_copy_id.tx_ppdu_id = ppdu_id;
  2354. pdev->m_copy_id.tx_peer_id = peer_id;
  2355. }
  2356. if (!qdf_nbuf_push_head(netbuf, sizeof(struct tx_capture_hdr))) {
  2357. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2358. FL("No headroom"));
  2359. return QDF_STATUS_E_NOMEM;
  2360. }
  2361. ppdu_hdr = (struct tx_capture_hdr *)qdf_nbuf_data(netbuf);
  2362. qdf_mem_copy(ppdu_hdr->ta, peer->vdev->mac_addr.raw,
  2363. QDF_MAC_ADDR_SIZE);
  2364. qdf_mem_copy(ppdu_hdr->ra, peer->mac_addr.raw,
  2365. QDF_MAC_ADDR_SIZE);
  2366. ppdu_hdr->ppdu_id = ppdu_id;
  2367. ppdu_hdr->peer_id = peer_id;
  2368. ppdu_hdr->first_msdu = first_msdu;
  2369. ppdu_hdr->last_msdu = last_msdu;
  2370. if (qdf_unlikely(pdev->latency_capture_enable)) {
  2371. ppdu_hdr->tsf = ts->tsf;
  2372. ppdu_hdr->time_latency = time_latency;
  2373. }
  2374. return QDF_STATUS_SUCCESS;
  2375. }
  2376. /**
  2377. * dp_send_completion_to_stack() - send completion to stack
  2378. * @soc : dp_soc handle
  2379. * @pdev: dp_pdev handle
  2380. * @peer_id: peer_id of the peer for which completion came
  2381. * @ppdu_id: ppdu_id
  2382. * @netbuf: Buffer pointer for free
  2383. *
  2384. * This function is used to send completion to stack
  2385. * to free buffer
  2386. */
  2387. void dp_send_completion_to_stack(struct dp_soc *soc, struct dp_pdev *pdev,
  2388. uint16_t peer_id, uint32_t ppdu_id,
  2389. qdf_nbuf_t netbuf)
  2390. {
  2391. dp_wdi_event_handler(WDI_EVENT_TX_DATA, soc,
  2392. netbuf, peer_id,
  2393. WDI_NO_VAL, pdev->pdev_id);
  2394. }
  2395. #else
  2396. static QDF_STATUS
  2397. dp_get_completion_indication_for_stack(struct dp_soc *soc,
  2398. struct dp_pdev *pdev,
  2399. struct dp_peer *peer,
  2400. struct hal_tx_completion_status *ts,
  2401. qdf_nbuf_t netbuf,
  2402. uint64_t time_latency)
  2403. {
  2404. return QDF_STATUS_E_NOSUPPORT;
  2405. }
  2406. static void
  2407. dp_send_completion_to_stack(struct dp_soc *soc, struct dp_pdev *pdev,
  2408. uint16_t peer_id, uint32_t ppdu_id, qdf_nbuf_t netbuf)
  2409. {
  2410. }
  2411. #endif
  2412. /**
  2413. * dp_tx_comp_free_buf() - Free nbuf associated with the Tx Descriptor
  2414. * @soc: Soc handle
  2415. * @desc: software Tx descriptor to be processed
  2416. *
  2417. * Return: none
  2418. */
  2419. static inline void dp_tx_comp_free_buf(struct dp_soc *soc,
  2420. struct dp_tx_desc_s *desc)
  2421. {
  2422. struct dp_vdev *vdev = desc->vdev;
  2423. qdf_nbuf_t nbuf = desc->nbuf;
  2424. /* nbuf already freed in vdev detach path */
  2425. if (!nbuf)
  2426. return;
  2427. /* If it is TDLS mgmt, don't unmap or free the frame */
  2428. if (desc->flags & DP_TX_DESC_FLAG_TDLS_FRAME)
  2429. return dp_non_std_tx_comp_free_buff(desc, vdev);
  2430. /* 0 : MSDU buffer, 1 : MLE */
  2431. if (desc->msdu_ext_desc) {
  2432. /* TSO free */
  2433. if (hal_tx_ext_desc_get_tso_enable(
  2434. desc->msdu_ext_desc->vaddr)) {
  2435. /* unmap eash TSO seg before free the nbuf */
  2436. dp_tx_tso_unmap_segment(soc, desc->tso_desc,
  2437. desc->tso_num_desc);
  2438. qdf_nbuf_free(nbuf);
  2439. return;
  2440. }
  2441. }
  2442. qdf_nbuf_unmap_nbytes_single(soc->osdev, nbuf,
  2443. QDF_DMA_TO_DEVICE, nbuf->len);
  2444. if (qdf_unlikely(!vdev)) {
  2445. qdf_nbuf_free(nbuf);
  2446. return;
  2447. }
  2448. if (qdf_likely(!vdev->mesh_vdev))
  2449. qdf_nbuf_free(nbuf);
  2450. else {
  2451. if (desc->flags & DP_TX_DESC_FLAG_TO_FW) {
  2452. qdf_nbuf_free(nbuf);
  2453. DP_STATS_INC(vdev, tx_i.mesh.completion_fw, 1);
  2454. } else
  2455. vdev->osif_tx_free_ext((nbuf));
  2456. }
  2457. }
  2458. #ifdef MESH_MODE_SUPPORT
  2459. /**
  2460. * dp_tx_comp_fill_tx_completion_stats() - Fill per packet Tx completion stats
  2461. * in mesh meta header
  2462. * @tx_desc: software descriptor head pointer
  2463. * @ts: pointer to tx completion stats
  2464. * Return: none
  2465. */
  2466. static
  2467. void dp_tx_comp_fill_tx_completion_stats(struct dp_tx_desc_s *tx_desc,
  2468. struct hal_tx_completion_status *ts)
  2469. {
  2470. struct meta_hdr_s *mhdr;
  2471. qdf_nbuf_t netbuf = tx_desc->nbuf;
  2472. if (!tx_desc->msdu_ext_desc) {
  2473. if (qdf_nbuf_pull_head(netbuf, tx_desc->pkt_offset) == NULL) {
  2474. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2475. "netbuf %pK offset %d",
  2476. netbuf, tx_desc->pkt_offset);
  2477. return;
  2478. }
  2479. }
  2480. if (qdf_nbuf_push_head(netbuf, sizeof(struct meta_hdr_s)) == NULL) {
  2481. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2482. "netbuf %pK offset %lu", netbuf,
  2483. sizeof(struct meta_hdr_s));
  2484. return;
  2485. }
  2486. mhdr = (struct meta_hdr_s *)qdf_nbuf_data(netbuf);
  2487. mhdr->rssi = ts->ack_frame_rssi;
  2488. mhdr->band = tx_desc->pdev->operating_channel.band;
  2489. mhdr->channel = tx_desc->pdev->operating_channel.num;
  2490. }
  2491. #else
  2492. static
  2493. void dp_tx_comp_fill_tx_completion_stats(struct dp_tx_desc_s *tx_desc,
  2494. struct hal_tx_completion_status *ts)
  2495. {
  2496. }
  2497. #endif
  2498. /**
  2499. * dp_tx_compute_delay() - Compute and fill in all timestamps
  2500. * to pass in correct fields
  2501. *
  2502. * @vdev: pdev handle
  2503. * @tx_desc: tx descriptor
  2504. * @tid: tid value
  2505. * @ring_id: TCL or WBM ring number for transmit path
  2506. * Return: none
  2507. */
  2508. static void dp_tx_compute_delay(struct dp_vdev *vdev,
  2509. struct dp_tx_desc_s *tx_desc,
  2510. uint8_t tid, uint8_t ring_id)
  2511. {
  2512. int64_t current_timestamp, timestamp_ingress, timestamp_hw_enqueue;
  2513. uint32_t sw_enqueue_delay, fwhw_transmit_delay, interframe_delay;
  2514. if (qdf_likely(!vdev->pdev->delay_stats_flag))
  2515. return;
  2516. current_timestamp = qdf_ktime_to_ms(qdf_ktime_get());
  2517. timestamp_ingress = qdf_nbuf_get_timestamp(tx_desc->nbuf);
  2518. timestamp_hw_enqueue = tx_desc->timestamp;
  2519. sw_enqueue_delay = (uint32_t)(timestamp_hw_enqueue - timestamp_ingress);
  2520. fwhw_transmit_delay = (uint32_t)(current_timestamp -
  2521. timestamp_hw_enqueue);
  2522. interframe_delay = (uint32_t)(timestamp_ingress -
  2523. vdev->prev_tx_enq_tstamp);
  2524. /*
  2525. * Delay in software enqueue
  2526. */
  2527. dp_update_delay_stats(vdev->pdev, sw_enqueue_delay, tid,
  2528. CDP_DELAY_STATS_SW_ENQ, ring_id);
  2529. /*
  2530. * Delay between packet enqueued to HW and Tx completion
  2531. */
  2532. dp_update_delay_stats(vdev->pdev, fwhw_transmit_delay, tid,
  2533. CDP_DELAY_STATS_FW_HW_TRANSMIT, ring_id);
  2534. /*
  2535. * Update interframe delay stats calculated at hardstart receive point.
  2536. * Value of vdev->prev_tx_enq_tstamp will be 0 for 1st frame, so
  2537. * interframe delay will not be calculate correctly for 1st frame.
  2538. * On the other side, this will help in avoiding extra per packet check
  2539. * of !vdev->prev_tx_enq_tstamp.
  2540. */
  2541. dp_update_delay_stats(vdev->pdev, interframe_delay, tid,
  2542. CDP_DELAY_STATS_TX_INTERFRAME, ring_id);
  2543. vdev->prev_tx_enq_tstamp = timestamp_ingress;
  2544. }
  2545. #ifdef DISABLE_DP_STATS
  2546. static
  2547. inline void dp_update_no_ack_stats(qdf_nbuf_t nbuf, struct dp_peer *peer)
  2548. {
  2549. }
  2550. #else
  2551. static
  2552. inline void dp_update_no_ack_stats(qdf_nbuf_t nbuf, struct dp_peer *peer)
  2553. {
  2554. enum qdf_proto_subtype subtype = QDF_PROTO_INVALID;
  2555. DPTRACE(qdf_dp_track_noack_check(nbuf, &subtype));
  2556. if (subtype != QDF_PROTO_INVALID)
  2557. DP_STATS_INC(peer, tx.no_ack_count[subtype], 1);
  2558. }
  2559. #endif
  2560. /**
  2561. * dp_tx_update_peer_stats() - Update peer stats from Tx completion indications
  2562. * per wbm ring
  2563. *
  2564. * @tx_desc: software descriptor head pointer
  2565. * @ts: Tx completion status
  2566. * @peer: peer handle
  2567. * @ring_id: ring number
  2568. *
  2569. * Return: None
  2570. */
  2571. static inline void
  2572. dp_tx_update_peer_stats(struct dp_tx_desc_s *tx_desc,
  2573. struct hal_tx_completion_status *ts,
  2574. struct dp_peer *peer, uint8_t ring_id)
  2575. {
  2576. struct dp_pdev *pdev = peer->vdev->pdev;
  2577. struct dp_soc *soc = NULL;
  2578. uint8_t mcs, pkt_type;
  2579. uint8_t tid = ts->tid;
  2580. uint32_t length;
  2581. struct cdp_tid_tx_stats *tid_stats;
  2582. if (!pdev)
  2583. return;
  2584. if (qdf_unlikely(tid >= CDP_MAX_DATA_TIDS))
  2585. tid = CDP_MAX_DATA_TIDS - 1;
  2586. tid_stats = &pdev->stats.tid_stats.tid_tx_stats[ring_id][tid];
  2587. soc = pdev->soc;
  2588. mcs = ts->mcs;
  2589. pkt_type = ts->pkt_type;
  2590. if (ts->release_src != HAL_TX_COMP_RELEASE_SOURCE_TQM) {
  2591. dp_err("Release source is not from TQM");
  2592. return;
  2593. }
  2594. length = qdf_nbuf_len(tx_desc->nbuf);
  2595. DP_STATS_INC_PKT(peer, tx.comp_pkt, 1, length);
  2596. if (qdf_unlikely(pdev->delay_stats_flag))
  2597. dp_tx_compute_delay(peer->vdev, tx_desc, tid, ring_id);
  2598. DP_STATS_INCC(peer, tx.dropped.age_out, 1,
  2599. (ts->status == HAL_TX_TQM_RR_REM_CMD_AGED));
  2600. DP_STATS_INCC_PKT(peer, tx.dropped.fw_rem, 1, length,
  2601. (ts->status == HAL_TX_TQM_RR_REM_CMD_REM));
  2602. DP_STATS_INCC(peer, tx.dropped.fw_rem_notx, 1,
  2603. (ts->status == HAL_TX_TQM_RR_REM_CMD_NOTX));
  2604. DP_STATS_INCC(peer, tx.dropped.fw_rem_tx, 1,
  2605. (ts->status == HAL_TX_TQM_RR_REM_CMD_TX));
  2606. DP_STATS_INCC(peer, tx.dropped.fw_reason1, 1,
  2607. (ts->status == HAL_TX_TQM_RR_FW_REASON1));
  2608. DP_STATS_INCC(peer, tx.dropped.fw_reason2, 1,
  2609. (ts->status == HAL_TX_TQM_RR_FW_REASON2));
  2610. DP_STATS_INCC(peer, tx.dropped.fw_reason3, 1,
  2611. (ts->status == HAL_TX_TQM_RR_FW_REASON3));
  2612. /*
  2613. * tx_failed is ideally supposed to be updated from HTT ppdu completion
  2614. * stats. But in IPQ807X/IPQ6018 chipsets owing to hw limitation there
  2615. * are no completions for failed cases. Hence updating tx_failed from
  2616. * data path. Please note that if tx_failed is fixed to be from ppdu,
  2617. * then this has to be removed
  2618. */
  2619. peer->stats.tx.tx_failed = peer->stats.tx.dropped.fw_rem.num +
  2620. peer->stats.tx.dropped.fw_rem_notx +
  2621. peer->stats.tx.dropped.fw_rem_tx +
  2622. peer->stats.tx.dropped.age_out +
  2623. peer->stats.tx.dropped.fw_reason1 +
  2624. peer->stats.tx.dropped.fw_reason2 +
  2625. peer->stats.tx.dropped.fw_reason3;
  2626. if (ts->status < CDP_MAX_TX_TQM_STATUS) {
  2627. tid_stats->tqm_status_cnt[ts->status]++;
  2628. }
  2629. if (ts->status != HAL_TX_TQM_RR_FRAME_ACKED) {
  2630. dp_update_no_ack_stats(tx_desc->nbuf, peer);
  2631. return;
  2632. }
  2633. DP_STATS_INCC(peer, tx.ofdma, 1, ts->ofdma);
  2634. DP_STATS_INCC(peer, tx.amsdu_cnt, 1, ts->msdu_part_of_amsdu);
  2635. DP_STATS_INCC(peer, tx.non_amsdu_cnt, 1, !ts->msdu_part_of_amsdu);
  2636. /*
  2637. * Following Rate Statistics are updated from HTT PPDU events from FW.
  2638. * Return from here if HTT PPDU events are enabled.
  2639. */
  2640. if (!(soc->process_tx_status))
  2641. return;
  2642. DP_STATS_INCC(peer, tx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  2643. ((mcs >= MAX_MCS_11A) && (pkt_type == DOT11_A)));
  2644. DP_STATS_INCC(peer, tx.pkt_type[pkt_type].mcs_count[mcs], 1,
  2645. ((mcs < (MAX_MCS_11A)) && (pkt_type == DOT11_A)));
  2646. DP_STATS_INCC(peer, tx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  2647. ((mcs >= MAX_MCS_11B) && (pkt_type == DOT11_B)));
  2648. DP_STATS_INCC(peer, tx.pkt_type[pkt_type].mcs_count[mcs], 1,
  2649. ((mcs < MAX_MCS_11B) && (pkt_type == DOT11_B)));
  2650. DP_STATS_INCC(peer, tx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  2651. ((mcs >= MAX_MCS_11A) && (pkt_type == DOT11_N)));
  2652. DP_STATS_INCC(peer, tx.pkt_type[pkt_type].mcs_count[mcs], 1,
  2653. ((mcs < MAX_MCS_11A) && (pkt_type == DOT11_N)));
  2654. DP_STATS_INCC(peer, tx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  2655. ((mcs >= MAX_MCS_11AC) && (pkt_type == DOT11_AC)));
  2656. DP_STATS_INCC(peer, tx.pkt_type[pkt_type].mcs_count[mcs], 1,
  2657. ((mcs < MAX_MCS_11AC) && (pkt_type == DOT11_AC)));
  2658. DP_STATS_INCC(peer, tx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  2659. ((mcs >= (MAX_MCS - 1)) && (pkt_type == DOT11_AX)));
  2660. DP_STATS_INCC(peer, tx.pkt_type[pkt_type].mcs_count[mcs], 1,
  2661. ((mcs < (MAX_MCS - 1)) && (pkt_type == DOT11_AX)));
  2662. DP_STATS_INC(peer, tx.sgi_count[ts->sgi], 1);
  2663. DP_STATS_INC(peer, tx.bw[ts->bw], 1);
  2664. DP_STATS_UPD(peer, tx.last_ack_rssi, ts->ack_frame_rssi);
  2665. DP_STATS_INC(peer, tx.wme_ac_type[TID_TO_WME_AC(ts->tid)], 1);
  2666. DP_STATS_INCC(peer, tx.stbc, 1, ts->stbc);
  2667. DP_STATS_INCC(peer, tx.ldpc, 1, ts->ldpc);
  2668. DP_STATS_INCC(peer, tx.retries, 1, ts->transmit_cnt > 1);
  2669. #if defined(FEATURE_PERPKT_INFO) && WDI_EVENT_ENABLE
  2670. dp_wdi_event_handler(WDI_EVENT_UPDATE_DP_STATS, pdev->soc,
  2671. &peer->stats, ts->peer_id,
  2672. UPDATE_PEER_STATS, pdev->pdev_id);
  2673. #endif
  2674. }
  2675. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  2676. /**
  2677. * dp_tx_flow_pool_lock() - take flow pool lock
  2678. * @soc: core txrx main context
  2679. * @tx_desc: tx desc
  2680. *
  2681. * Return: None
  2682. */
  2683. static inline
  2684. void dp_tx_flow_pool_lock(struct dp_soc *soc,
  2685. struct dp_tx_desc_s *tx_desc)
  2686. {
  2687. struct dp_tx_desc_pool_s *pool;
  2688. uint8_t desc_pool_id;
  2689. desc_pool_id = tx_desc->pool_id;
  2690. pool = &soc->tx_desc[desc_pool_id];
  2691. qdf_spin_lock_bh(&pool->flow_pool_lock);
  2692. }
  2693. /**
  2694. * dp_tx_flow_pool_unlock() - release flow pool lock
  2695. * @soc: core txrx main context
  2696. * @tx_desc: tx desc
  2697. *
  2698. * Return: None
  2699. */
  2700. static inline
  2701. void dp_tx_flow_pool_unlock(struct dp_soc *soc,
  2702. struct dp_tx_desc_s *tx_desc)
  2703. {
  2704. struct dp_tx_desc_pool_s *pool;
  2705. uint8_t desc_pool_id;
  2706. desc_pool_id = tx_desc->pool_id;
  2707. pool = &soc->tx_desc[desc_pool_id];
  2708. qdf_spin_unlock_bh(&pool->flow_pool_lock);
  2709. }
  2710. #else
  2711. static inline
  2712. void dp_tx_flow_pool_lock(struct dp_soc *soc, struct dp_tx_desc_s *tx_desc)
  2713. {
  2714. }
  2715. static inline
  2716. void dp_tx_flow_pool_unlock(struct dp_soc *soc, struct dp_tx_desc_s *tx_desc)
  2717. {
  2718. }
  2719. #endif
  2720. /**
  2721. * dp_tx_notify_completion() - Notify tx completion for this desc
  2722. * @soc: core txrx main context
  2723. * @tx_desc: tx desc
  2724. * @netbuf: buffer
  2725. *
  2726. * Return: none
  2727. */
  2728. static inline void dp_tx_notify_completion(struct dp_soc *soc,
  2729. struct dp_tx_desc_s *tx_desc,
  2730. qdf_nbuf_t netbuf)
  2731. {
  2732. void *osif_dev;
  2733. ol_txrx_completion_fp tx_compl_cbk = NULL;
  2734. qdf_assert(tx_desc);
  2735. dp_tx_flow_pool_lock(soc, tx_desc);
  2736. if (!tx_desc->vdev ||
  2737. !tx_desc->vdev->osif_vdev) {
  2738. dp_tx_flow_pool_unlock(soc, tx_desc);
  2739. return;
  2740. }
  2741. osif_dev = tx_desc->vdev->osif_vdev;
  2742. tx_compl_cbk = tx_desc->vdev->tx_comp;
  2743. dp_tx_flow_pool_unlock(soc, tx_desc);
  2744. if (tx_compl_cbk)
  2745. tx_compl_cbk(netbuf, osif_dev);
  2746. }
  2747. /** dp_tx_sojourn_stats_process() - Collect sojourn stats
  2748. * @pdev: pdev handle
  2749. * @tid: tid value
  2750. * @txdesc_ts: timestamp from txdesc
  2751. * @ppdu_id: ppdu id
  2752. *
  2753. * Return: none
  2754. */
  2755. #ifdef FEATURE_PERPKT_INFO
  2756. static inline void dp_tx_sojourn_stats_process(struct dp_pdev *pdev,
  2757. struct dp_peer *peer,
  2758. uint8_t tid,
  2759. uint64_t txdesc_ts,
  2760. uint32_t ppdu_id)
  2761. {
  2762. uint64_t delta_ms;
  2763. struct cdp_tx_sojourn_stats *sojourn_stats;
  2764. if (qdf_unlikely(pdev->enhanced_stats_en == 0))
  2765. return;
  2766. if (qdf_unlikely(tid == HTT_INVALID_TID ||
  2767. tid >= CDP_DATA_TID_MAX))
  2768. return;
  2769. if (qdf_unlikely(!pdev->sojourn_buf))
  2770. return;
  2771. sojourn_stats = (struct cdp_tx_sojourn_stats *)
  2772. qdf_nbuf_data(pdev->sojourn_buf);
  2773. sojourn_stats->cookie = (void *)peer->wlanstats_ctx;
  2774. delta_ms = qdf_ktime_to_ms(qdf_ktime_get()) -
  2775. txdesc_ts;
  2776. qdf_ewma_tx_lag_add(&peer->avg_sojourn_msdu[tid],
  2777. delta_ms);
  2778. sojourn_stats->sum_sojourn_msdu[tid] = delta_ms;
  2779. sojourn_stats->num_msdus[tid] = 1;
  2780. sojourn_stats->avg_sojourn_msdu[tid].internal =
  2781. peer->avg_sojourn_msdu[tid].internal;
  2782. dp_wdi_event_handler(WDI_EVENT_TX_SOJOURN_STAT, pdev->soc,
  2783. pdev->sojourn_buf, HTT_INVALID_PEER,
  2784. WDI_NO_VAL, pdev->pdev_id);
  2785. sojourn_stats->sum_sojourn_msdu[tid] = 0;
  2786. sojourn_stats->num_msdus[tid] = 0;
  2787. sojourn_stats->avg_sojourn_msdu[tid].internal = 0;
  2788. }
  2789. #else
  2790. static inline void dp_tx_sojourn_stats_process(struct dp_pdev *pdev,
  2791. struct dp_peer *peer,
  2792. uint8_t tid,
  2793. uint64_t txdesc_ts,
  2794. uint32_t ppdu_id)
  2795. {
  2796. }
  2797. #endif
  2798. /**
  2799. * dp_tx_comp_process_desc() - Process tx descriptor and free associated nbuf
  2800. * @soc: DP Soc handle
  2801. * @tx_desc: software Tx descriptor
  2802. * @ts : Tx completion status from HAL/HTT descriptor
  2803. *
  2804. * Return: none
  2805. */
  2806. static inline void
  2807. dp_tx_comp_process_desc(struct dp_soc *soc,
  2808. struct dp_tx_desc_s *desc,
  2809. struct hal_tx_completion_status *ts,
  2810. struct dp_peer *peer)
  2811. {
  2812. uint64_t time_latency = 0;
  2813. /*
  2814. * m_copy/tx_capture modes are not supported for
  2815. * scatter gather packets
  2816. */
  2817. if (qdf_unlikely(!!desc->pdev->latency_capture_enable)) {
  2818. time_latency = (qdf_ktime_to_ms(qdf_ktime_get()) -
  2819. desc->timestamp);
  2820. }
  2821. if (!(desc->msdu_ext_desc)) {
  2822. if (QDF_STATUS_SUCCESS ==
  2823. dp_tx_add_to_comp_queue(soc, desc, ts, peer)) {
  2824. return;
  2825. }
  2826. if (QDF_STATUS_SUCCESS ==
  2827. dp_get_completion_indication_for_stack(soc,
  2828. desc->pdev,
  2829. peer, ts,
  2830. desc->nbuf,
  2831. time_latency)) {
  2832. qdf_nbuf_unmap_nbytes_single(soc->osdev, desc->nbuf,
  2833. QDF_DMA_TO_DEVICE,
  2834. desc->nbuf->len);
  2835. dp_send_completion_to_stack(soc,
  2836. desc->pdev,
  2837. ts->peer_id,
  2838. ts->ppdu_id,
  2839. desc->nbuf);
  2840. return;
  2841. }
  2842. }
  2843. dp_tx_comp_free_buf(soc, desc);
  2844. }
  2845. /**
  2846. * dp_tx_comp_process_tx_status() - Parse and Dump Tx completion status info
  2847. * @tx_desc: software descriptor head pointer
  2848. * @ts: Tx completion status
  2849. * @peer: peer handle
  2850. * @ring_id: ring number
  2851. *
  2852. * Return: none
  2853. */
  2854. static inline
  2855. void dp_tx_comp_process_tx_status(struct dp_tx_desc_s *tx_desc,
  2856. struct hal_tx_completion_status *ts,
  2857. struct dp_peer *peer, uint8_t ring_id)
  2858. {
  2859. uint32_t length;
  2860. qdf_ether_header_t *eh;
  2861. struct dp_soc *soc = NULL;
  2862. struct dp_vdev *vdev = tx_desc->vdev;
  2863. qdf_nbuf_t nbuf = tx_desc->nbuf;
  2864. if (!vdev || !nbuf) {
  2865. dp_info_rl("invalid tx descriptor. vdev or nbuf NULL");
  2866. goto out;
  2867. }
  2868. eh = (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  2869. DPTRACE(qdf_dp_trace_ptr(tx_desc->nbuf,
  2870. QDF_DP_TRACE_LI_DP_FREE_PACKET_PTR_RECORD,
  2871. QDF_TRACE_DEFAULT_PDEV_ID,
  2872. qdf_nbuf_data_addr(nbuf),
  2873. sizeof(qdf_nbuf_data(nbuf)),
  2874. tx_desc->id,
  2875. ts->status));
  2876. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  2877. "-------------------- \n"
  2878. "Tx Completion Stats: \n"
  2879. "-------------------- \n"
  2880. "ack_frame_rssi = %d \n"
  2881. "first_msdu = %d \n"
  2882. "last_msdu = %d \n"
  2883. "msdu_part_of_amsdu = %d \n"
  2884. "rate_stats valid = %d \n"
  2885. "bw = %d \n"
  2886. "pkt_type = %d \n"
  2887. "stbc = %d \n"
  2888. "ldpc = %d \n"
  2889. "sgi = %d \n"
  2890. "mcs = %d \n"
  2891. "ofdma = %d \n"
  2892. "tones_in_ru = %d \n"
  2893. "tsf = %d \n"
  2894. "ppdu_id = %d \n"
  2895. "transmit_cnt = %d \n"
  2896. "tid = %d \n"
  2897. "peer_id = %d\n",
  2898. ts->ack_frame_rssi, ts->first_msdu,
  2899. ts->last_msdu, ts->msdu_part_of_amsdu,
  2900. ts->valid, ts->bw, ts->pkt_type, ts->stbc,
  2901. ts->ldpc, ts->sgi, ts->mcs, ts->ofdma,
  2902. ts->tones_in_ru, ts->tsf, ts->ppdu_id,
  2903. ts->transmit_cnt, ts->tid, ts->peer_id);
  2904. soc = vdev->pdev->soc;
  2905. /* Update SoC level stats */
  2906. DP_STATS_INCC(soc, tx.dropped_fw_removed, 1,
  2907. (ts->status == HAL_TX_TQM_RR_REM_CMD_REM));
  2908. /* Update per-packet stats for mesh mode */
  2909. if (qdf_unlikely(vdev->mesh_vdev) &&
  2910. !(tx_desc->flags & DP_TX_DESC_FLAG_TO_FW))
  2911. dp_tx_comp_fill_tx_completion_stats(tx_desc, ts);
  2912. length = qdf_nbuf_len(nbuf);
  2913. /* Update peer level stats */
  2914. if (!peer) {
  2915. QDF_TRACE_DEBUG_RL(QDF_MODULE_ID_DP,
  2916. "peer is null or deletion in progress");
  2917. DP_STATS_INC_PKT(soc, tx.tx_invalid_peer, 1, length);
  2918. goto out;
  2919. }
  2920. if (qdf_unlikely(peer->bss_peer && vdev->opmode == wlan_op_mode_ap)) {
  2921. if (ts->status != HAL_TX_TQM_RR_REM_CMD_REM) {
  2922. DP_STATS_INC_PKT(peer, tx.mcast, 1, length);
  2923. if ((peer->vdev->tx_encap_type ==
  2924. htt_cmn_pkt_type_ethernet) &&
  2925. QDF_IS_ADDR_BROADCAST(eh->ether_dhost)) {
  2926. DP_STATS_INC_PKT(peer, tx.bcast, 1, length);
  2927. }
  2928. }
  2929. } else {
  2930. DP_STATS_INC_PKT(peer, tx.ucast, 1, length);
  2931. if (ts->status == HAL_TX_TQM_RR_FRAME_ACKED)
  2932. DP_STATS_INC_PKT(peer, tx.tx_success, 1, length);
  2933. }
  2934. dp_tx_update_peer_stats(tx_desc, ts, peer, ring_id);
  2935. #ifdef QCA_SUPPORT_RDK_STATS
  2936. if (soc->wlanstats_enabled)
  2937. dp_tx_sojourn_stats_process(vdev->pdev, peer, ts->tid,
  2938. tx_desc->timestamp,
  2939. ts->ppdu_id);
  2940. #endif
  2941. out:
  2942. return;
  2943. }
  2944. /**
  2945. * dp_tx_comp_process_desc_list() - Tx complete software descriptor handler
  2946. * @soc: core txrx main context
  2947. * @comp_head: software descriptor head pointer
  2948. * @ring_id: ring number
  2949. *
  2950. * This function will process batch of descriptors reaped by dp_tx_comp_handler
  2951. * and release the software descriptors after processing is complete
  2952. *
  2953. * Return: none
  2954. */
  2955. static void
  2956. dp_tx_comp_process_desc_list(struct dp_soc *soc,
  2957. struct dp_tx_desc_s *comp_head, uint8_t ring_id)
  2958. {
  2959. struct dp_tx_desc_s *desc;
  2960. struct dp_tx_desc_s *next;
  2961. struct hal_tx_completion_status ts = {0};
  2962. struct dp_peer *peer;
  2963. qdf_nbuf_t netbuf;
  2964. desc = comp_head;
  2965. while (desc) {
  2966. hal_tx_comp_get_status(&desc->comp, &ts, soc->hal_soc);
  2967. peer = dp_peer_find_by_id(soc, ts.peer_id);
  2968. dp_tx_comp_process_tx_status(desc, &ts, peer, ring_id);
  2969. netbuf = desc->nbuf;
  2970. /* check tx complete notification */
  2971. if (QDF_NBUF_CB_TX_EXTRA_FRAG_FLAGS_NOTIFY_COMP(netbuf))
  2972. dp_tx_notify_completion(soc, desc, netbuf);
  2973. dp_tx_comp_process_desc(soc, desc, &ts, peer);
  2974. if (peer)
  2975. dp_peer_unref_del_find_by_id(peer);
  2976. next = desc->next;
  2977. dp_tx_desc_release(desc, desc->pool_id);
  2978. desc = next;
  2979. }
  2980. }
  2981. /**
  2982. * dp_tx_process_htt_completion() - Tx HTT Completion Indication Handler
  2983. * @tx_desc: software descriptor head pointer
  2984. * @status : Tx completion status from HTT descriptor
  2985. * @ring_id: ring number
  2986. *
  2987. * This function will process HTT Tx indication messages from Target
  2988. *
  2989. * Return: none
  2990. */
  2991. static
  2992. void dp_tx_process_htt_completion(struct dp_tx_desc_s *tx_desc, uint8_t *status,
  2993. uint8_t ring_id)
  2994. {
  2995. uint8_t tx_status;
  2996. struct dp_pdev *pdev;
  2997. struct dp_vdev *vdev;
  2998. struct dp_soc *soc;
  2999. struct hal_tx_completion_status ts = {0};
  3000. uint32_t *htt_desc = (uint32_t *)status;
  3001. struct dp_peer *peer;
  3002. struct cdp_tid_tx_stats *tid_stats = NULL;
  3003. struct htt_soc *htt_handle;
  3004. qdf_assert(tx_desc->pdev);
  3005. pdev = tx_desc->pdev;
  3006. vdev = tx_desc->vdev;
  3007. soc = pdev->soc;
  3008. if (!vdev)
  3009. return;
  3010. tx_status = HTT_TX_WBM_COMPLETION_V2_TX_STATUS_GET(htt_desc[0]);
  3011. htt_handle = (struct htt_soc *)soc->htt_handle;
  3012. htt_wbm_event_record(htt_handle->htt_logger_handle, tx_status, status);
  3013. switch (tx_status) {
  3014. case HTT_TX_FW2WBM_TX_STATUS_OK:
  3015. case HTT_TX_FW2WBM_TX_STATUS_DROP:
  3016. case HTT_TX_FW2WBM_TX_STATUS_TTL:
  3017. {
  3018. uint8_t tid;
  3019. if (HTT_TX_WBM_COMPLETION_V2_VALID_GET(htt_desc[2])) {
  3020. ts.peer_id =
  3021. HTT_TX_WBM_COMPLETION_V2_SW_PEER_ID_GET(
  3022. htt_desc[2]);
  3023. ts.tid =
  3024. HTT_TX_WBM_COMPLETION_V2_TID_NUM_GET(
  3025. htt_desc[2]);
  3026. } else {
  3027. ts.peer_id = HTT_INVALID_PEER;
  3028. ts.tid = HTT_INVALID_TID;
  3029. }
  3030. ts.ppdu_id =
  3031. HTT_TX_WBM_COMPLETION_V2_SCH_CMD_ID_GET(
  3032. htt_desc[1]);
  3033. ts.ack_frame_rssi =
  3034. HTT_TX_WBM_COMPLETION_V2_ACK_FRAME_RSSI_GET(
  3035. htt_desc[1]);
  3036. ts.first_msdu = 1;
  3037. ts.last_msdu = 1;
  3038. tid = ts.tid;
  3039. if (qdf_unlikely(tid >= CDP_MAX_DATA_TIDS))
  3040. tid = CDP_MAX_DATA_TIDS - 1;
  3041. tid_stats = &pdev->stats.tid_stats.tid_tx_stats[ring_id][tid];
  3042. if (qdf_unlikely(pdev->delay_stats_flag))
  3043. dp_tx_compute_delay(vdev, tx_desc, tid, ring_id);
  3044. if (tx_status < CDP_MAX_TX_HTT_STATUS) {
  3045. tid_stats->htt_status_cnt[tx_status]++;
  3046. }
  3047. peer = dp_peer_find_by_id(soc, ts.peer_id);
  3048. if (qdf_likely(peer))
  3049. dp_peer_unref_del_find_by_id(peer);
  3050. dp_tx_comp_process_tx_status(tx_desc, &ts, peer, ring_id);
  3051. dp_tx_comp_process_desc(soc, tx_desc, &ts, peer);
  3052. dp_tx_desc_release(tx_desc, tx_desc->pool_id);
  3053. break;
  3054. }
  3055. case HTT_TX_FW2WBM_TX_STATUS_REINJECT:
  3056. {
  3057. dp_tx_reinject_handler(tx_desc, status);
  3058. break;
  3059. }
  3060. case HTT_TX_FW2WBM_TX_STATUS_INSPECT:
  3061. {
  3062. dp_tx_inspect_handler(tx_desc, status);
  3063. break;
  3064. }
  3065. case HTT_TX_FW2WBM_TX_STATUS_MEC_NOTIFY:
  3066. {
  3067. dp_tx_mec_handler(vdev, status);
  3068. break;
  3069. }
  3070. default:
  3071. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  3072. "%s Invalid HTT tx_status %d\n",
  3073. __func__, tx_status);
  3074. break;
  3075. }
  3076. }
  3077. #ifdef WLAN_FEATURE_RX_SOFTIRQ_TIME_LIMIT
  3078. static inline
  3079. bool dp_tx_comp_loop_pkt_limit_hit(struct dp_soc *soc, int num_reaped)
  3080. {
  3081. bool limit_hit = false;
  3082. struct wlan_cfg_dp_soc_ctxt *cfg = soc->wlan_cfg_ctx;
  3083. limit_hit =
  3084. (num_reaped >= cfg->tx_comp_loop_pkt_limit) ? true : false;
  3085. if (limit_hit)
  3086. DP_STATS_INC(soc, tx.tx_comp_loop_pkt_limit_hit, 1);
  3087. return limit_hit;
  3088. }
  3089. static inline bool dp_tx_comp_enable_eol_data_check(struct dp_soc *soc)
  3090. {
  3091. return soc->wlan_cfg_ctx->tx_comp_enable_eol_data_check;
  3092. }
  3093. #else
  3094. static inline
  3095. bool dp_tx_comp_loop_pkt_limit_hit(struct dp_soc *soc, int num_reaped)
  3096. {
  3097. return false;
  3098. }
  3099. static inline bool dp_tx_comp_enable_eol_data_check(struct dp_soc *soc)
  3100. {
  3101. return false;
  3102. }
  3103. #endif
  3104. uint32_t dp_tx_comp_handler(struct dp_intr *int_ctx, struct dp_soc *soc,
  3105. hal_ring_handle_t hal_ring_hdl, uint8_t ring_id,
  3106. uint32_t quota)
  3107. {
  3108. void *tx_comp_hal_desc;
  3109. uint8_t buffer_src;
  3110. uint8_t pool_id;
  3111. uint32_t tx_desc_id;
  3112. struct dp_tx_desc_s *tx_desc = NULL;
  3113. struct dp_tx_desc_s *head_desc = NULL;
  3114. struct dp_tx_desc_s *tail_desc = NULL;
  3115. uint32_t num_processed = 0;
  3116. uint32_t count = 0;
  3117. bool force_break = false;
  3118. DP_HIST_INIT();
  3119. more_data:
  3120. /* Re-initialize local variables to be re-used */
  3121. head_desc = NULL;
  3122. tail_desc = NULL;
  3123. if (qdf_unlikely(dp_srng_access_start(int_ctx, soc, hal_ring_hdl))) {
  3124. dp_err("HAL RING Access Failed -- %pK", hal_ring_hdl);
  3125. return 0;
  3126. }
  3127. /* Find head descriptor from completion ring */
  3128. while (qdf_likely(tx_comp_hal_desc =
  3129. hal_srng_dst_get_next(soc->hal_soc, hal_ring_hdl))) {
  3130. buffer_src = hal_tx_comp_get_buffer_source(tx_comp_hal_desc);
  3131. /* If this buffer was not released by TQM or FW, then it is not
  3132. * Tx completion indication, assert */
  3133. if ((buffer_src != HAL_TX_COMP_RELEASE_SOURCE_TQM) &&
  3134. (buffer_src != HAL_TX_COMP_RELEASE_SOURCE_FW)) {
  3135. uint8_t wbm_internal_error;
  3136. dp_err_rl(
  3137. "Tx comp release_src != TQM | FW but from %d",
  3138. buffer_src);
  3139. hal_dump_comp_desc(tx_comp_hal_desc);
  3140. DP_STATS_INC(soc, tx.invalid_release_source, 1);
  3141. /* When WBM sees NULL buffer_addr_info in any of
  3142. * ingress rings it sends an error indication,
  3143. * with wbm_internal_error=1, to a specific ring.
  3144. * The WBM2SW ring used to indicate these errors is
  3145. * fixed in HW, and that ring is being used as Tx
  3146. * completion ring. These errors are not related to
  3147. * Tx completions, and should just be ignored
  3148. */
  3149. wbm_internal_error = hal_get_wbm_internal_error(
  3150. soc->hal_soc,
  3151. tx_comp_hal_desc);
  3152. if (wbm_internal_error) {
  3153. dp_err_rl("Tx comp wbm_internal_error!!");
  3154. DP_STATS_INC(soc, tx.wbm_internal_error[WBM_INT_ERROR_ALL], 1);
  3155. if (HAL_TX_COMP_RELEASE_SOURCE_REO ==
  3156. buffer_src)
  3157. dp_handle_wbm_internal_error(
  3158. soc,
  3159. tx_comp_hal_desc,
  3160. hal_tx_comp_get_buffer_type(
  3161. tx_comp_hal_desc));
  3162. } else {
  3163. dp_err_rl("Tx comp wbm_internal_error false");
  3164. DP_STATS_INC(soc, tx.non_wbm_internal_err, 1);
  3165. }
  3166. continue;
  3167. }
  3168. /* Get descriptor id */
  3169. tx_desc_id = hal_tx_comp_get_desc_id(tx_comp_hal_desc);
  3170. pool_id = (tx_desc_id & DP_TX_DESC_ID_POOL_MASK) >>
  3171. DP_TX_DESC_ID_POOL_OS;
  3172. /* Find Tx descriptor */
  3173. tx_desc = dp_tx_desc_find(soc, pool_id,
  3174. (tx_desc_id & DP_TX_DESC_ID_PAGE_MASK) >>
  3175. DP_TX_DESC_ID_PAGE_OS,
  3176. (tx_desc_id & DP_TX_DESC_ID_OFFSET_MASK) >>
  3177. DP_TX_DESC_ID_OFFSET_OS);
  3178. /*
  3179. * If the descriptor is already freed in vdev_detach,
  3180. * continue to next descriptor
  3181. */
  3182. if (!tx_desc->vdev && !tx_desc->flags) {
  3183. QDF_TRACE(QDF_MODULE_ID_DP,
  3184. QDF_TRACE_LEVEL_INFO,
  3185. "Descriptor freed in vdev_detach %d",
  3186. tx_desc_id);
  3187. num_processed += !(count & DP_TX_NAPI_BUDGET_DIV_MASK);
  3188. count++;
  3189. continue;
  3190. }
  3191. if (qdf_unlikely(tx_desc->pdev->is_pdev_down)) {
  3192. QDF_TRACE(QDF_MODULE_ID_DP,
  3193. QDF_TRACE_LEVEL_INFO,
  3194. "pdev in down state %d",
  3195. tx_desc_id);
  3196. num_processed += !(count & DP_TX_NAPI_BUDGET_DIV_MASK);
  3197. count++;
  3198. dp_tx_comp_free_buf(soc, tx_desc);
  3199. dp_tx_desc_release(tx_desc, tx_desc->pool_id);
  3200. continue;
  3201. }
  3202. /*
  3203. * If the release source is FW, process the HTT status
  3204. */
  3205. if (qdf_unlikely(buffer_src ==
  3206. HAL_TX_COMP_RELEASE_SOURCE_FW)) {
  3207. uint8_t htt_tx_status[HAL_TX_COMP_HTT_STATUS_LEN];
  3208. hal_tx_comp_get_htt_desc(tx_comp_hal_desc,
  3209. htt_tx_status);
  3210. dp_tx_process_htt_completion(tx_desc,
  3211. htt_tx_status, ring_id);
  3212. } else {
  3213. /* Pool id is not matching. Error */
  3214. if (tx_desc->pool_id != pool_id) {
  3215. QDF_TRACE(QDF_MODULE_ID_DP,
  3216. QDF_TRACE_LEVEL_FATAL,
  3217. "Tx Comp pool id %d not matched %d",
  3218. pool_id, tx_desc->pool_id);
  3219. qdf_assert_always(0);
  3220. }
  3221. if (!(tx_desc->flags & DP_TX_DESC_FLAG_ALLOCATED) ||
  3222. !(tx_desc->flags & DP_TX_DESC_FLAG_QUEUED_TX)) {
  3223. QDF_TRACE(QDF_MODULE_ID_DP,
  3224. QDF_TRACE_LEVEL_FATAL,
  3225. "Txdesc invalid, flgs = %x,id = %d",
  3226. tx_desc->flags, tx_desc_id);
  3227. qdf_assert_always(0);
  3228. }
  3229. /* First ring descriptor on the cycle */
  3230. if (!head_desc) {
  3231. head_desc = tx_desc;
  3232. tail_desc = tx_desc;
  3233. }
  3234. tail_desc->next = tx_desc;
  3235. tx_desc->next = NULL;
  3236. tail_desc = tx_desc;
  3237. DP_HIST_PACKET_COUNT_INC(tx_desc->pdev->pdev_id);
  3238. /* Collect hw completion contents */
  3239. hal_tx_comp_desc_sync(tx_comp_hal_desc,
  3240. &tx_desc->comp, 1);
  3241. }
  3242. num_processed += !(count & DP_TX_NAPI_BUDGET_DIV_MASK);
  3243. /*
  3244. * Processed packet count is more than given quota
  3245. * stop to processing
  3246. */
  3247. if (num_processed >= quota) {
  3248. force_break = true;
  3249. break;
  3250. }
  3251. count++;
  3252. if (dp_tx_comp_loop_pkt_limit_hit(soc, count))
  3253. break;
  3254. }
  3255. dp_srng_access_end(int_ctx, soc, hal_ring_hdl);
  3256. /* Process the reaped descriptors */
  3257. if (head_desc)
  3258. dp_tx_comp_process_desc_list(soc, head_desc, ring_id);
  3259. if (dp_tx_comp_enable_eol_data_check(soc)) {
  3260. if (!force_break &&
  3261. hal_srng_dst_peek_sync_locked(soc->hal_soc,
  3262. hal_ring_hdl)) {
  3263. DP_STATS_INC(soc, tx.hp_oos2, 1);
  3264. if (!hif_exec_should_yield(soc->hif_handle,
  3265. int_ctx->dp_intr_id))
  3266. goto more_data;
  3267. }
  3268. }
  3269. DP_TX_HIST_STATS_PER_PDEV();
  3270. return num_processed;
  3271. }
  3272. #ifdef FEATURE_WLAN_TDLS
  3273. qdf_nbuf_t dp_tx_non_std(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  3274. enum ol_tx_spec tx_spec, qdf_nbuf_t msdu_list)
  3275. {
  3276. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  3277. struct dp_vdev *vdev = dp_get_vdev_from_soc_vdev_id_wifi3(soc, vdev_id);
  3278. if (!vdev) {
  3279. dp_err("vdev handle for id %d is NULL", vdev_id);
  3280. return NULL;
  3281. }
  3282. if (tx_spec & OL_TX_SPEC_NO_FREE)
  3283. vdev->is_tdls_frame = true;
  3284. return dp_tx_send(soc_hdl, vdev_id, msdu_list);
  3285. }
  3286. #endif
  3287. /**
  3288. * dp_tx_vdev_attach() - attach vdev to dp tx
  3289. * @vdev: virtual device instance
  3290. *
  3291. * Return: QDF_STATUS_SUCCESS: success
  3292. * QDF_STATUS_E_RESOURCES: Error return
  3293. */
  3294. QDF_STATUS dp_tx_vdev_attach(struct dp_vdev *vdev)
  3295. {
  3296. int pdev_id;
  3297. /*
  3298. * Fill HTT TCL Metadata with Vdev ID and MAC ID
  3299. */
  3300. HTT_TX_TCL_METADATA_TYPE_SET(vdev->htt_tcl_metadata,
  3301. HTT_TCL_METADATA_TYPE_VDEV_BASED);
  3302. HTT_TX_TCL_METADATA_VDEV_ID_SET(vdev->htt_tcl_metadata,
  3303. vdev->vdev_id);
  3304. pdev_id =
  3305. dp_get_target_pdev_id_for_host_pdev_id(vdev->pdev->soc,
  3306. vdev->pdev->pdev_id);
  3307. HTT_TX_TCL_METADATA_PDEV_ID_SET(vdev->htt_tcl_metadata, pdev_id);
  3308. /*
  3309. * Set HTT Extension Valid bit to 0 by default
  3310. */
  3311. HTT_TX_TCL_METADATA_VALID_HTT_SET(vdev->htt_tcl_metadata, 0);
  3312. dp_tx_vdev_update_search_flags(vdev);
  3313. return QDF_STATUS_SUCCESS;
  3314. }
  3315. #ifndef FEATURE_WDS
  3316. static inline bool dp_tx_da_search_override(struct dp_vdev *vdev)
  3317. {
  3318. return false;
  3319. }
  3320. #endif
  3321. /**
  3322. * dp_tx_vdev_update_search_flags() - Update vdev flags as per opmode
  3323. * @vdev: virtual device instance
  3324. *
  3325. * Return: void
  3326. *
  3327. */
  3328. void dp_tx_vdev_update_search_flags(struct dp_vdev *vdev)
  3329. {
  3330. struct dp_soc *soc = vdev->pdev->soc;
  3331. /*
  3332. * Enable both AddrY (SA based search) and AddrX (Da based search)
  3333. * for TDLS link
  3334. *
  3335. * Enable AddrY (SA based search) only for non-WDS STA and
  3336. * ProxySTA VAP (in HKv1) modes.
  3337. *
  3338. * In all other VAP modes, only DA based search should be
  3339. * enabled
  3340. */
  3341. if (vdev->opmode == wlan_op_mode_sta &&
  3342. vdev->tdls_link_connected)
  3343. vdev->hal_desc_addr_search_flags =
  3344. (HAL_TX_DESC_ADDRX_EN | HAL_TX_DESC_ADDRY_EN);
  3345. else if ((vdev->opmode == wlan_op_mode_sta) &&
  3346. !dp_tx_da_search_override(vdev))
  3347. vdev->hal_desc_addr_search_flags = HAL_TX_DESC_ADDRY_EN;
  3348. else
  3349. vdev->hal_desc_addr_search_flags = HAL_TX_DESC_ADDRX_EN;
  3350. /* Set search type only when peer map v2 messaging is enabled
  3351. * as we will have the search index (AST hash) only when v2 is
  3352. * enabled
  3353. */
  3354. if (soc->is_peer_map_unmap_v2 && vdev->opmode == wlan_op_mode_sta)
  3355. vdev->search_type = HAL_TX_ADDR_INDEX_SEARCH;
  3356. else
  3357. vdev->search_type = HAL_TX_ADDR_SEARCH_DEFAULT;
  3358. }
  3359. static inline bool
  3360. dp_is_tx_desc_flush_match(struct dp_pdev *pdev,
  3361. struct dp_vdev *vdev,
  3362. struct dp_tx_desc_s *tx_desc)
  3363. {
  3364. if (!(tx_desc && (tx_desc->flags & DP_TX_DESC_FLAG_ALLOCATED)))
  3365. return false;
  3366. /*
  3367. * if vdev is given, then only check whether desc
  3368. * vdev match. if vdev is NULL, then check whether
  3369. * desc pdev match.
  3370. */
  3371. return vdev ? (tx_desc->vdev == vdev) : (tx_desc->pdev == pdev);
  3372. }
  3373. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  3374. /**
  3375. * dp_tx_desc_flush() - release resources associated
  3376. * to TX Desc
  3377. *
  3378. * @dp_pdev: Handle to DP pdev structure
  3379. * @vdev: virtual device instance
  3380. * NULL: no specific Vdev is required and check all allcated TX desc
  3381. * on this pdev.
  3382. * Non-NULL: only check the allocated TX Desc associated to this Vdev.
  3383. *
  3384. * @force_free:
  3385. * true: flush the TX desc.
  3386. * false: only reset the Vdev in each allocated TX desc
  3387. * that associated to current Vdev.
  3388. *
  3389. * This function will go through the TX desc pool to flush
  3390. * the outstanding TX data or reset Vdev to NULL in associated TX
  3391. * Desc.
  3392. */
  3393. static void dp_tx_desc_flush(struct dp_pdev *pdev,
  3394. struct dp_vdev *vdev,
  3395. bool force_free)
  3396. {
  3397. uint8_t i;
  3398. uint32_t j;
  3399. uint32_t num_desc, page_id, offset;
  3400. uint16_t num_desc_per_page;
  3401. struct dp_soc *soc = pdev->soc;
  3402. struct dp_tx_desc_s *tx_desc = NULL;
  3403. struct dp_tx_desc_pool_s *tx_desc_pool = NULL;
  3404. if (!vdev && !force_free) {
  3405. dp_err("Reset TX desc vdev, Vdev param is required!");
  3406. return;
  3407. }
  3408. for (i = 0; i < MAX_TXDESC_POOLS; i++) {
  3409. tx_desc_pool = &soc->tx_desc[i];
  3410. if (!(tx_desc_pool->pool_size) ||
  3411. IS_TX_DESC_POOL_STATUS_INACTIVE(tx_desc_pool) ||
  3412. !(tx_desc_pool->desc_pages.cacheable_pages))
  3413. continue;
  3414. /*
  3415. * Add flow pool lock protection in case pool is freed
  3416. * due to all tx_desc is recycled when handle TX completion.
  3417. * this is not necessary when do force flush as:
  3418. * a. double lock will happen if dp_tx_desc_release is
  3419. * also trying to acquire it.
  3420. * b. dp interrupt has been disabled before do force TX desc
  3421. * flush in dp_pdev_deinit().
  3422. */
  3423. if (!force_free)
  3424. qdf_spin_lock_bh(&tx_desc_pool->flow_pool_lock);
  3425. num_desc = tx_desc_pool->pool_size;
  3426. num_desc_per_page =
  3427. tx_desc_pool->desc_pages.num_element_per_page;
  3428. for (j = 0; j < num_desc; j++) {
  3429. page_id = j / num_desc_per_page;
  3430. offset = j % num_desc_per_page;
  3431. if (qdf_unlikely(!(tx_desc_pool->
  3432. desc_pages.cacheable_pages)))
  3433. break;
  3434. tx_desc = dp_tx_desc_find(soc, i, page_id, offset);
  3435. if (dp_is_tx_desc_flush_match(pdev, vdev, tx_desc)) {
  3436. /*
  3437. * Free TX desc if force free is
  3438. * required, otherwise only reset vdev
  3439. * in this TX desc.
  3440. */
  3441. if (force_free) {
  3442. dp_tx_comp_free_buf(soc, tx_desc);
  3443. dp_tx_desc_release(tx_desc, i);
  3444. } else {
  3445. tx_desc->vdev = NULL;
  3446. }
  3447. }
  3448. }
  3449. if (!force_free)
  3450. qdf_spin_unlock_bh(&tx_desc_pool->flow_pool_lock);
  3451. }
  3452. }
  3453. #else /* QCA_LL_TX_FLOW_CONTROL_V2! */
  3454. /**
  3455. * dp_tx_desc_reset_vdev() - reset vdev to NULL in TX Desc
  3456. *
  3457. * @soc: Handle to DP soc structure
  3458. * @tx_desc: pointer of one TX desc
  3459. * @desc_pool_id: TX Desc pool id
  3460. */
  3461. static inline void
  3462. dp_tx_desc_reset_vdev(struct dp_soc *soc, struct dp_tx_desc_s *tx_desc,
  3463. uint8_t desc_pool_id)
  3464. {
  3465. TX_DESC_LOCK_LOCK(&soc->tx_desc[desc_pool_id].lock);
  3466. tx_desc->vdev = NULL;
  3467. TX_DESC_LOCK_UNLOCK(&soc->tx_desc[desc_pool_id].lock);
  3468. }
  3469. static void dp_tx_desc_flush(struct dp_pdev *pdev,
  3470. struct dp_vdev *vdev,
  3471. bool force_free)
  3472. {
  3473. uint8_t i, num_pool;
  3474. uint32_t j;
  3475. uint32_t num_desc, page_id, offset;
  3476. uint16_t num_desc_per_page;
  3477. struct dp_soc *soc = pdev->soc;
  3478. struct dp_tx_desc_s *tx_desc = NULL;
  3479. struct dp_tx_desc_pool_s *tx_desc_pool = NULL;
  3480. if (!vdev && !force_free) {
  3481. dp_err("Reset TX desc vdev, Vdev param is required!");
  3482. return;
  3483. }
  3484. num_desc = wlan_cfg_get_num_tx_desc(soc->wlan_cfg_ctx);
  3485. num_pool = wlan_cfg_get_num_tx_desc_pool(soc->wlan_cfg_ctx);
  3486. for (i = 0; i < num_pool; i++) {
  3487. tx_desc_pool = &soc->tx_desc[i];
  3488. if (!tx_desc_pool->desc_pages.cacheable_pages)
  3489. continue;
  3490. num_desc_per_page =
  3491. tx_desc_pool->desc_pages.num_element_per_page;
  3492. for (j = 0; j < num_desc; j++) {
  3493. page_id = j / num_desc_per_page;
  3494. offset = j % num_desc_per_page;
  3495. tx_desc = dp_tx_desc_find(soc, i, page_id, offset);
  3496. if (dp_is_tx_desc_flush_match(pdev, vdev, tx_desc)) {
  3497. if (force_free) {
  3498. dp_tx_comp_free_buf(soc, tx_desc);
  3499. dp_tx_desc_release(tx_desc, i);
  3500. } else {
  3501. dp_tx_desc_reset_vdev(soc, tx_desc,
  3502. i);
  3503. }
  3504. }
  3505. }
  3506. }
  3507. }
  3508. #endif /* !QCA_LL_TX_FLOW_CONTROL_V2 */
  3509. /**
  3510. * dp_tx_vdev_detach() - detach vdev from dp tx
  3511. * @vdev: virtual device instance
  3512. *
  3513. * Return: QDF_STATUS_SUCCESS: success
  3514. * QDF_STATUS_E_RESOURCES: Error return
  3515. */
  3516. QDF_STATUS dp_tx_vdev_detach(struct dp_vdev *vdev)
  3517. {
  3518. struct dp_pdev *pdev = vdev->pdev;
  3519. /* Reset TX desc associated to this Vdev as NULL */
  3520. dp_tx_desc_flush(pdev, vdev, false);
  3521. dp_tx_vdev_multipass_deinit(vdev);
  3522. return QDF_STATUS_SUCCESS;
  3523. }
  3524. /**
  3525. * dp_tx_pdev_attach() - attach pdev to dp tx
  3526. * @pdev: physical device instance
  3527. *
  3528. * Return: QDF_STATUS_SUCCESS: success
  3529. * QDF_STATUS_E_RESOURCES: Error return
  3530. */
  3531. QDF_STATUS dp_tx_pdev_attach(struct dp_pdev *pdev)
  3532. {
  3533. struct dp_soc *soc = pdev->soc;
  3534. /* Initialize Flow control counters */
  3535. qdf_atomic_init(&pdev->num_tx_exception);
  3536. qdf_atomic_init(&pdev->num_tx_outstanding);
  3537. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  3538. /* Initialize descriptors in TCL Ring */
  3539. hal_tx_init_data_ring(soc->hal_soc,
  3540. soc->tcl_data_ring[pdev->pdev_id].hal_srng);
  3541. }
  3542. return QDF_STATUS_SUCCESS;
  3543. }
  3544. /**
  3545. * dp_tx_pdev_detach() - detach pdev from dp tx
  3546. * @pdev: physical device instance
  3547. *
  3548. * Return: QDF_STATUS_SUCCESS: success
  3549. * QDF_STATUS_E_RESOURCES: Error return
  3550. */
  3551. QDF_STATUS dp_tx_pdev_detach(struct dp_pdev *pdev)
  3552. {
  3553. /* flush TX outstanding data per pdev */
  3554. dp_tx_desc_flush(pdev, NULL, true);
  3555. dp_tx_me_exit(pdev);
  3556. return QDF_STATUS_SUCCESS;
  3557. }
  3558. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  3559. /* Pools will be allocated dynamically */
  3560. static int dp_tx_alloc_static_pools(struct dp_soc *soc, int num_pool,
  3561. int num_desc)
  3562. {
  3563. uint8_t i;
  3564. for (i = 0; i < num_pool; i++) {
  3565. qdf_spinlock_create(&soc->tx_desc[i].flow_pool_lock);
  3566. soc->tx_desc[i].status = FLOW_POOL_INACTIVE;
  3567. }
  3568. return 0;
  3569. }
  3570. static void dp_tx_delete_static_pools(struct dp_soc *soc, int num_pool)
  3571. {
  3572. uint8_t i;
  3573. for (i = 0; i < num_pool; i++)
  3574. qdf_spinlock_destroy(&soc->tx_desc[i].flow_pool_lock);
  3575. }
  3576. #else /* QCA_LL_TX_FLOW_CONTROL_V2! */
  3577. static int dp_tx_alloc_static_pools(struct dp_soc *soc, int num_pool,
  3578. int num_desc)
  3579. {
  3580. uint8_t i;
  3581. /* Allocate software Tx descriptor pools */
  3582. for (i = 0; i < num_pool; i++) {
  3583. if (dp_tx_desc_pool_alloc(soc, i, num_desc)) {
  3584. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3585. "%s Tx Desc Pool alloc %d failed %pK",
  3586. __func__, i, soc);
  3587. return ENOMEM;
  3588. }
  3589. }
  3590. return 0;
  3591. }
  3592. static void dp_tx_delete_static_pools(struct dp_soc *soc, int num_pool)
  3593. {
  3594. uint8_t i;
  3595. for (i = 0; i < num_pool; i++) {
  3596. qdf_assert_always(!soc->tx_desc[i].num_allocated);
  3597. if (dp_tx_desc_pool_free(soc, i)) {
  3598. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  3599. "%s Tx Desc Pool Free failed", __func__);
  3600. }
  3601. }
  3602. }
  3603. #endif /* !QCA_LL_TX_FLOW_CONTROL_V2 */
  3604. #ifndef QCA_MEM_ATTACH_ON_WIFI3
  3605. /**
  3606. * dp_tso_attach_wifi3() - TSO attach handler
  3607. * @txrx_soc: Opaque Dp handle
  3608. *
  3609. * Reserve TSO descriptor buffers
  3610. *
  3611. * Return: QDF_STATUS_E_FAILURE on failure or
  3612. * QDF_STATUS_SUCCESS on success
  3613. */
  3614. static
  3615. QDF_STATUS dp_tso_attach_wifi3(void *txrx_soc)
  3616. {
  3617. return dp_tso_soc_attach(txrx_soc);
  3618. }
  3619. /**
  3620. * dp_tso_detach_wifi3() - TSO Detach handler
  3621. * @txrx_soc: Opaque Dp handle
  3622. *
  3623. * Deallocate TSO descriptor buffers
  3624. *
  3625. * Return: QDF_STATUS_E_FAILURE on failure or
  3626. * QDF_STATUS_SUCCESS on success
  3627. */
  3628. static
  3629. QDF_STATUS dp_tso_detach_wifi3(void *txrx_soc)
  3630. {
  3631. return dp_tso_soc_detach(txrx_soc);
  3632. }
  3633. #else
  3634. static
  3635. QDF_STATUS dp_tso_attach_wifi3(void *txrx_soc)
  3636. {
  3637. return QDF_STATUS_SUCCESS;
  3638. }
  3639. static
  3640. QDF_STATUS dp_tso_detach_wifi3(void *txrx_soc)
  3641. {
  3642. return QDF_STATUS_SUCCESS;
  3643. }
  3644. #endif
  3645. QDF_STATUS dp_tso_soc_detach(struct cdp_soc_t *txrx_soc)
  3646. {
  3647. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  3648. uint8_t i;
  3649. uint8_t num_pool;
  3650. uint32_t num_desc;
  3651. num_pool = wlan_cfg_get_num_tx_desc_pool(soc->wlan_cfg_ctx);
  3652. num_desc = wlan_cfg_get_num_tx_desc(soc->wlan_cfg_ctx);
  3653. for (i = 0; i < num_pool; i++)
  3654. dp_tx_tso_desc_pool_free(soc, i);
  3655. dp_info("%s TSO Desc Pool %d Free descs = %d",
  3656. __func__, num_pool, num_desc);
  3657. for (i = 0; i < num_pool; i++)
  3658. dp_tx_tso_num_seg_pool_free(soc, i);
  3659. dp_info("%s TSO Num of seg Desc Pool %d Free descs = %d",
  3660. __func__, num_pool, num_desc);
  3661. return QDF_STATUS_SUCCESS;
  3662. }
  3663. /**
  3664. * dp_tso_attach() - TSO attach handler
  3665. * @txrx_soc: Opaque Dp handle
  3666. *
  3667. * Reserve TSO descriptor buffers
  3668. *
  3669. * Return: QDF_STATUS_E_FAILURE on failure or
  3670. * QDF_STATUS_SUCCESS on success
  3671. */
  3672. QDF_STATUS dp_tso_soc_attach(struct cdp_soc_t *txrx_soc)
  3673. {
  3674. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  3675. uint8_t i;
  3676. uint8_t num_pool;
  3677. uint32_t num_desc;
  3678. num_pool = wlan_cfg_get_num_tx_desc_pool(soc->wlan_cfg_ctx);
  3679. num_desc = wlan_cfg_get_num_tx_desc(soc->wlan_cfg_ctx);
  3680. for (i = 0; i < num_pool; i++) {
  3681. if (dp_tx_tso_desc_pool_alloc(soc, i, num_desc)) {
  3682. dp_err("TSO Desc Pool alloc %d failed %pK",
  3683. i, soc);
  3684. return QDF_STATUS_E_FAILURE;
  3685. }
  3686. }
  3687. dp_info("%s TSO Desc Alloc %d, descs = %d",
  3688. __func__, num_pool, num_desc);
  3689. for (i = 0; i < num_pool; i++) {
  3690. if (dp_tx_tso_num_seg_pool_alloc(soc, i, num_desc)) {
  3691. dp_err("TSO Num of seg Pool alloc %d failed %pK",
  3692. i, soc);
  3693. return QDF_STATUS_E_FAILURE;
  3694. }
  3695. }
  3696. return QDF_STATUS_SUCCESS;
  3697. }
  3698. /**
  3699. * dp_tx_soc_detach() - detach soc from dp tx
  3700. * @soc: core txrx main context
  3701. *
  3702. * This function will detach dp tx into main device context
  3703. * will free dp tx resource and initialize resources
  3704. *
  3705. * Return: QDF_STATUS_SUCCESS: success
  3706. * QDF_STATUS_E_RESOURCES: Error return
  3707. */
  3708. QDF_STATUS dp_tx_soc_detach(struct dp_soc *soc)
  3709. {
  3710. uint8_t num_pool;
  3711. uint16_t num_desc;
  3712. uint16_t num_ext_desc;
  3713. uint8_t i;
  3714. QDF_STATUS status = QDF_STATUS_SUCCESS;
  3715. num_pool = wlan_cfg_get_num_tx_desc_pool(soc->wlan_cfg_ctx);
  3716. num_desc = wlan_cfg_get_num_tx_desc(soc->wlan_cfg_ctx);
  3717. num_ext_desc = wlan_cfg_get_num_tx_ext_desc(soc->wlan_cfg_ctx);
  3718. dp_tx_flow_control_deinit(soc);
  3719. dp_tx_delete_static_pools(soc, num_pool);
  3720. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  3721. "%s Tx Desc Pool Free num_pool = %d, descs = %d",
  3722. __func__, num_pool, num_desc);
  3723. for (i = 0; i < num_pool; i++) {
  3724. if (dp_tx_ext_desc_pool_free(soc, i)) {
  3725. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  3726. "%s Tx Ext Desc Pool Free failed",
  3727. __func__);
  3728. return QDF_STATUS_E_RESOURCES;
  3729. }
  3730. }
  3731. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  3732. "%s MSDU Ext Desc Pool %d Free descs = %d",
  3733. __func__, num_pool, num_ext_desc);
  3734. status = dp_tso_detach_wifi3(soc);
  3735. if (status != QDF_STATUS_SUCCESS)
  3736. return status;
  3737. return QDF_STATUS_SUCCESS;
  3738. }
  3739. /**
  3740. * dp_tx_soc_attach() - attach soc to dp tx
  3741. * @soc: core txrx main context
  3742. *
  3743. * This function will attach dp tx into main device context
  3744. * will allocate dp tx resource and initialize resources
  3745. *
  3746. * Return: QDF_STATUS_SUCCESS: success
  3747. * QDF_STATUS_E_RESOURCES: Error return
  3748. */
  3749. QDF_STATUS dp_tx_soc_attach(struct dp_soc *soc)
  3750. {
  3751. uint8_t i;
  3752. uint8_t num_pool;
  3753. uint32_t num_desc;
  3754. uint32_t num_ext_desc;
  3755. QDF_STATUS status = QDF_STATUS_SUCCESS;
  3756. num_pool = wlan_cfg_get_num_tx_desc_pool(soc->wlan_cfg_ctx);
  3757. num_desc = wlan_cfg_get_num_tx_desc(soc->wlan_cfg_ctx);
  3758. num_ext_desc = wlan_cfg_get_num_tx_ext_desc(soc->wlan_cfg_ctx);
  3759. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  3760. "%s Tx Desc Alloc num_pool = %d, descs = %d",
  3761. __func__, num_pool, num_desc);
  3762. if ((num_pool > MAX_TXDESC_POOLS) ||
  3763. (num_desc > WLAN_CFG_NUM_TX_DESC_MAX))
  3764. goto fail;
  3765. if (dp_tx_alloc_static_pools(soc, num_pool, num_desc))
  3766. goto fail;
  3767. dp_tx_flow_control_init(soc);
  3768. /* Allocate extension tx descriptor pools */
  3769. for (i = 0; i < num_pool; i++) {
  3770. if (dp_tx_ext_desc_pool_alloc(soc, i, num_ext_desc)) {
  3771. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3772. "MSDU Ext Desc Pool alloc %d failed %pK",
  3773. i, soc);
  3774. goto fail;
  3775. }
  3776. }
  3777. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  3778. "%s MSDU Ext Desc Alloc %d, descs = %d",
  3779. __func__, num_pool, num_ext_desc);
  3780. status = dp_tso_attach_wifi3((void *)soc);
  3781. if (status != QDF_STATUS_SUCCESS)
  3782. goto fail;
  3783. /* Initialize descriptors in TCL Rings */
  3784. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  3785. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  3786. hal_tx_init_data_ring(soc->hal_soc,
  3787. soc->tcl_data_ring[i].hal_srng);
  3788. }
  3789. if (wlan_cfg_is_ipa_enabled(soc->wlan_cfg_ctx))
  3790. hal_tx_init_data_ring(soc->hal_soc,
  3791. soc->tcl_data_ring[IPA_TCL_DATA_RING_IDX].hal_srng);
  3792. }
  3793. /*
  3794. * Initialize command/credit ring descriptor
  3795. * Command/CREDIT ring also used for sending DATA cmds
  3796. */
  3797. hal_tx_init_cmd_credit_ring(soc->hal_soc,
  3798. soc->tcl_cmd_credit_ring.hal_srng);
  3799. /*
  3800. * todo - Add a runtime config option to enable this.
  3801. */
  3802. /*
  3803. * Due to multiple issues on NPR EMU, enable it selectively
  3804. * only for NPR EMU, should be removed, once NPR platforms
  3805. * are stable.
  3806. */
  3807. soc->process_tx_status = CONFIG_PROCESS_TX_STATUS;
  3808. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  3809. "%s HAL Tx init Success", __func__);
  3810. return QDF_STATUS_SUCCESS;
  3811. fail:
  3812. /* Detach will take care of freeing only allocated resources */
  3813. dp_tx_soc_detach(soc);
  3814. return QDF_STATUS_E_RESOURCES;
  3815. }