877e934a3ac0813c4f3773e82425607a8236860d

In DP simulation mode, DP link clock's parent is driven by usb pll clock, in case usb is disconnected during DP simulation, those registers driven by DP link clock cannot be accessed any more. In that case, put xo clock as DP link clock's parent to keep the registers driven by link clock still be accessible. Change-Id: I2bbe6b92052284c7825f80348818d00557312a10 Signed-off-by: Yu Wu <quic_zwy@quicinc.com>
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