When delete peer, host will try to flush all frames in REO queue
by sending a cmd through reo ring, but sometimes encounted failure to
send this cmd, dump ring status if ecountered above failure.
Change-Id: I3ea4e96e5999f85398b531ddf4f350e91e798d70
CRs-Fixed: 2167419
fwhdr_abstrct: Use Host based TARGET_TYPE instead of firmware
defined TARGET_TYPE. It will abstract dependency on bmi_msg.h.
Change-Id: I76d744db27df730a3a91a243adfc07fc17d77487
CRs-Fixed: 2140921
If hal_srng_setup() fails, memory allocated for srng
is not freed resulting in a leak. Free the memory in
that case. In future, return error to caller and
assert when invalid ring ID is used during setup.
Change-Id: I6f3a7494a5c5e861652f3a38d18c220cd9a6eef2
Direct Buffer Receive provides the driver with a mechanism by which target
can transfer information directly into host memory via DMA.
DMA rings must be initialized and configured before they can be shared
to the target for transfer ot data. Host driver will use the HAL SRNG
APIs to create, initialize and configure the DMA rings.
Change-Id: I43cd39ccbb5f5069c9a14092459d5c88ea514dca
CRs-Fixed: 2157986
Interrupt was constantly firing because the low_threshold was
improperly configured. The low threshold needs to be 1 less than
the number of buffers posted when the CE is fully posted. The
srng backed CE's are setup with nentries - 2 buffers as the fully
posted amount, therefore the threshold needs to be nentries - 3.
Also fixes a bug where a reused variable is not cleared. This
bug could result in the threshold being set to a garbages value.
Change-Id: Iac840bfd6677683bf2feb42d8bdbd050f42e895d
CRs-Fixed: 2090603
assign msi vectors to srng rings based on the ext_group they will be
serviced in.
provide support for ext_groups in hif_pci.
Change-Id: If313fdb43b939871c0d73dea9a05f757427b5b16
CRs-Fixed: 2051911
Currently interrupt mitigation values are configured for per-packet interrupts.
Change this for core DP rings (REO Destination and WBM Tx Completions) to reduce
CPU overhead of interrupt processing
Change-Id: I7bf0f6e78c52b5678ad3c8cc4d829444e410fad3
CRs-Fixed: 2064113
Calculate register size by subtracting the higher
register address by the lower one.
Change-Id: Id2255ad48d0ceb2fde00774dbf56868efb3646ca
CRs-Fixed: 2052617
HAL modification to provide additional information to
support lithium nss offload configuration.
A new API added to extract addtional information from HAL
Few additional parameter added in get_param function.
Change-Id: I2fb0ed89c2d3cb3ee253b158f7982e1a00ab4353
The register write apis for the srng rings pass the
srng structure as their context. Add a pointer to
the hal to enable windowing.
Change-Id: Ib3bda2d49d5c2d327cc1b986dcf825a216a004ef
CRs-Fixed: 2032131
Use windowing for register read/write. This allows
for pci based devices to reduce the mapped bar size.
Required for QCA6290.
Change-Id: Ifb173095c135e9eca454f2ba6132b5c54ea8fc4b
CRs-Fixed: 2032131
Setting the SRNG_ENABLE bit is required for devices with newer
hardware definitions. Setting this bit is a no-op for older
hardware.
Change-Id: I2e0369b62a89f6a9a32f9e211ab815e3c16b2393
CRs-Fixed: 2032351
This change is for supporting monitor mode VAP. All the monitor mode ring
is configured. The related monitor mode ring includes:
-monitor mode buffer ring
-monitor mode destination ring
-monitor mode status ring
-monitor mode link descriptor ring
The packet is not sent to monitor mode ring unless the monitor mode VAP is
configured. This release support Multiple VAP - AP/STA VAP plus Monitor
VAP configuration. The status ring is not used in this release. However,
the ring is tested and the ring is moving and there are TLV's in the ring.
Change-Id: I782ee0c3b998d8b3bbac79b5e7fdecdbff15fa93
CRs-Fixed: 2013049
1. Increased the sizes of following SRNGs used by WBM and also added max size
check in SRNG setup:
-idle link descriptor ring
-Tx completion ring
-Rx release ing
2. As per HW team, TP_ADDR and HP_ADDR for Idle link ring should remain 0 to avoid
some WBM stability issues. Remote head/tail pointers are not required since
this ring is completly managed by WBM HW
Change-Id: I93d70a287329dfeb08fcfb6b04306d65776b4834
For platforms that don't use QMI and have firmware
enable shadow registers, host needs to ignore the
shadow register configuration it calculated.
Change-Id: I91a3d9a0c65172afde6a2ddab61651f9f8683aee
CRs-Fixed: 2003581
There is a bug where the mac id passed to get the
HAL srng id is always hardcoded to 1. This should be
the mac id.
Change-Id: I0e07c420f77c7158b0a778c8a5fc81af7de2e5ee
CRs-Fixed: 2003050
The pld_common.h stub doesn't include all the header files it needs
for compilation. Let it get included from hal_internal.h through
hal_api.h. In this manner, all the required .h files will allready
be included.
Change-Id: I40d107d2305baabe57719afe854bad4428d74a23
CRs-Fixed: 1113131
When shadow registers replace other register addresses,
ensure that they are configured to point at the registers
that would be written to with shadow registers disabled.
Change-Id: I789021fe394cad2ce50cbbeb2943827b6d5e464f
CRs-Fixed: 1113131
In this change, hif requests hal construct the shadow register
configuration for all the necessary datapath rings. Then hif
requests hal append the configuration for the srng rings used
by the host copy engine module. When constructing the shadow
register configuration, the hal makes note to use the shadow
register addresses instead of the actual addresses.
Change-Id: Ide8f523dece0d1dc6eb05f4c86739ece7909c25a
CRs-Fixed: 1113131
Changes needed to support the new definitions introduced
in the R102 hardware header files for QCA6290.
Change-Id: I4e3c27dfdc48b4d6a44f0f50f3e4a907be20e53d
CRs-Fixed: 1105853
Add HW version check to remove referencing macros
not available in r96 headers. RING_ID_BMSK seems to be
removed in r96, Use it only for older version hw headers.
Change-Id: I0467a900317581ae7040ab0baae288ed9a905d60
CRs-Fixed: 1090092
Change that allows configuration of max buffer
size for SRNG rings in the receive direction
Change-Id: Ib857f1fdf43c849078f9470ec029fe627379fcb4
CRs-Fixed: 1089874
PRODUCER_INT_SETUP register write was missed.
MSI init should be done before configuring interrupt
triggers.
Change-Id: Idf356b889ba2aa9d1269e0c07dcad02cc9c63a6a
CRs-Fixed: 1089874
Wifi 3.0 compile against cdp apis.
Make compilable against mobile code base.
selective hw common header include.
Change-Id: I051f917001c0d13c762d9cb5a3ec141cd278d0e7
CRs-fixed: 1075736
Function prototype for hif_get_dev_ba is added in hal_sng.c to avoid
warning. This should be ideally added in header file. Removing the
prototype from c file.
Change-Id: I3220765b1dbc8a2cd5a45ccfe85fde09aee12a00
CRs-Fixed: 1079655
On 64-bit platform consistent mem alloc was failing due to NULL
passed for dev. Fix this by passing valid dev in consistent mem alloc
call.
Change-Id: I730af58c637dc652c4e249b83d432e0b5f01f7fb
CRs-fixed: 1079575
Add support for replenishing the rx buffers using the host to
firmware buffer ring.
This includes adding a flag QCA_HOST2FW_RXBUF_RING:
When QCA_HOST2FW_RXBUF_RING is enabled the host will do the following:
- Allocate the refill buffer ring (HTT_HOST1_TO_FW_RXBUF_RING) and
populate it with
rx buffers
- Send the refill buffer ring configuration to the firmware
- Allocate the rx DMA ring (HTT_RXDMA_HOST_BUF_RING), leave it empty.
- Send the rx DMA ring configuration to the firmware
When QCA_HOST2FW_RXBUF_RING is disabled, the host will do the following:
- Allocate the rx DMA ring (HTT_RXDMA_HOST_BUF_RING), and populate it with
rx buffers
- Send the rx DMA ring configuration to the firmware
CRs-Fixed: 1074199
Change-Id: Iec05a973cd9d628c742e3aaa16b8dabc7797625d
