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qcacmn: Configure DP interrupt mitigation values based on ring type

Currently interrupt mitigation values are configured for per-packet interrupts.
Change this for core DP rings (REO Destination and WBM Tx Completions) to reduce
CPU overhead of interrupt processing

Change-Id: I7bf0f6e78c52b5678ad3c8cc4d829444e410fad3
CRs-Fixed: 2064113
Pamidipati, Vijay 7 years ago
parent
commit
45b1df25fc
4 changed files with 163 additions and 21 deletions
  1. 19 4
      dp/wifi3.0/dp_main.c
  2. 8 1
      hal/wifi3.0/hal_srng.c
  3. 87 16
      wlan_cfg/wlan_cfg.c
  4. 49 0
      wlan_cfg/wlan_cfg.h

+ 19 - 4
dp/wifi3.0/dp_main.c

@@ -120,7 +120,7 @@ const int dp_stats_mapping_table[][STATS_TYPE_MAX] = {
 	{TXRX_FW_STATS_INVALID, TXRX_RX_HOST_STATS},
 };
 
-/**
+/*
  * dp_setup_srng - Internal function to setup SRNG rings used by data path
  */
 static int dp_srng_setup(struct dp_soc *soc, struct dp_srng *srng,
@@ -158,11 +158,26 @@ static int dp_srng_setup(struct dp_soc *soc, struct dp_srng *srng,
 	ring_params.msi_data = 0;
 	ring_params.msi_addr = 0;
 
-	/* TODO: Setup interrupt timer and batch counter thresholds for
+	/*
+	 * Setup interrupt timer and batch counter thresholds for
 	 * interrupt mitigation based on ring type
 	 */
-	ring_params.intr_timer_thres_us = 8;
-	ring_params.intr_batch_cntr_thres_entries = 1;
+	if (ring_type == REO_DST) {
+		ring_params.intr_timer_thres_us =
+			wlan_cfg_get_int_timer_threshold_rx(soc->wlan_cfg_ctx);
+		ring_params.intr_batch_cntr_thres_entries =
+			wlan_cfg_get_int_batch_threshold_rx(soc->wlan_cfg_ctx);
+	} else if (ring_type == WBM2SW_RELEASE && (ring_num < 3)) {
+		ring_params.intr_timer_thres_us =
+			wlan_cfg_get_int_timer_threshold_tx(soc->wlan_cfg_ctx);
+		ring_params.intr_batch_cntr_thres_entries =
+			wlan_cfg_get_int_batch_threshold_tx(soc->wlan_cfg_ctx);
+	} else {
+		ring_params.intr_timer_thres_us =
+			wlan_cfg_get_int_timer_threshold_other(soc->wlan_cfg_ctx);
+		ring_params.intr_batch_cntr_thres_entries =
+			wlan_cfg_get_int_timer_threshold_other(soc->wlan_cfg_ctx);
+	}
 
 	/* TODO: Currently hal layer takes care of endianness related settings.
 	 * See if these settings need to passed from DP layer

+ 8 - 1
hal/wifi3.0/hal_srng.c

@@ -866,10 +866,17 @@ static inline void hal_srng_src_hw_init(struct hal_soc *hal,
 	 * if level mode is required
 	 */
 	reg_val = 0;
+
+	/*
+	 * WAR - Hawkeye v1 has a hardware bug which requires timer value to be
+	 * programmed in terms of 1us resolution instead of 8us resolution as
+	 * given in MLD.
+	 */
 	if (srng->intr_timer_thres_us) {
 		reg_val |= SRNG_SM(SRNG_SRC_FLD(CONSUMER_INT_SETUP_IX0,
 			INTERRUPT_TIMER_THRESHOLD),
-			srng->intr_timer_thres_us >> 3);
+			srng->intr_timer_thres_us);
+		/* For HK v2 this should be (srng->intr_timer_thres_us >> 3) */
 	}
 
 	if (srng->intr_batch_cntr_thres_entries) {

+ 87 - 16
wlan_cfg/wlan_cfg.c

@@ -31,6 +31,48 @@
  * For now, all these configuration parameters are hardcoded.
  * Many of these should actually be coming from dts file/ini file
  */
+
+#ifdef CONFIG_MCL
+#define WLAN_CFG_PER_PDEV_RX_RING 0
+#define NUM_RXDMA_RINGS_PER_PDEV 2
+#define WLAN_LRO_ENABLE 1
+
+/* Tx Descriptor and Tx Extension Descriptor pool sizes */
+#define WLAN_CFG_NUM_TX_DESC  1024
+#define WLAN_CFG_NUM_TX_EXT_DESC 1024
+
+/* Interrupt Mitigation - Batch threshold in terms of number of frames */
+#define WLAN_CFG_INT_BATCH_THRESHOLD_TX 1
+#define WLAN_CFG_INT_BATCH_THRESHOLD_RX 1
+#define WLAN_CFG_INT_BATCH_THRESHOLD_OTHER 1
+
+/* Interrupt Mitigation - Timer threshold in us */
+#define WLAN_CFG_INT_TIMER_THRESHOLD_TX 8
+#define WLAN_CFG_INT_TIMER_THRESHOLD_RX 8
+#define WLAN_CFG_INT_TIMER_THRESHOLD_OTHER 8
+
+#endif
+
+#ifdef CONFIG_WIN
+#define WLAN_CFG_PER_PDEV_RX_RING 1
+#define NUM_RXDMA_RINGS_PER_PDEV 1
+#define WLAN_LRO_ENABLE 0
+
+/* Tx Descriptor and Tx Extension Descriptor pool sizes */
+#define WLAN_CFG_NUM_TX_DESC  (16 << 10)
+#define WLAN_CFG_NUM_TX_EXT_DESC (8 << 10)
+
+/* Interrupt Mitigation - Batch threshold in terms of number of frames */
+#define WLAN_CFG_INT_BATCH_THRESHOLD_TX 256
+#define WLAN_CFG_INT_BATCH_THRESHOLD_RX 128
+#define WLAN_CFG_INT_BATCH_THRESHOLD_OTHER 1
+
+/* Interrupt Mitigation - Timer threshold in us */
+#define WLAN_CFG_INT_TIMER_THRESHOLD_TX 1000
+#define WLAN_CFG_INT_TIMER_THRESHOLD_RX 500
+#define WLAN_CFG_INT_TIMER_THRESHOLD_OTHER 8
+#endif
+
 #define WLAN_CFG_INT_NUM_CONTEXTS 4
 
 #define RXDMA_BUF_RING_SIZE 2048
@@ -38,7 +80,6 @@
 #define RXDMA_MONITOR_DEST_RING_SIZE 2048
 #define RXDMA_MONITOR_STATUS_RING_SIZE 2048
 
-
 #ifdef TX_PER_PDEV_DESC_POOL
 #define WLAN_CFG_NUM_TX_DESC_POOL 	MAX_PDEV_CNT
 #define WLAN_CFG_NUM_TXEXT_DESC_POOL	MAX_PDEV_CNT
@@ -47,7 +88,6 @@
 #define WLAN_CFG_NUM_TXEXT_DESC_POOL 3
 #endif /* TX_PER_PDEV_DESC_POOL */
 
-
 #define WLAN_CFG_TX_RING_MASK_0 0x1
 #define WLAN_CFG_TX_RING_MASK_1 0x2
 #define WLAN_CFG_TX_RING_MASK_2 0x4
@@ -76,20 +116,6 @@
 #define WLAN_CFG_HTT_PKT_TYPE 2
 #define WLAN_CFG_MAX_PEER_ID 64
 
-#ifdef CONFIG_MCL
-#define WLAN_CFG_PER_PDEV_RX_RING 0
-#define NUM_RXDMA_RINGS_PER_PDEV 2
-#define WLAN_LRO_ENABLE 1
-#define WLAN_CFG_NUM_TX_DESC  1024
-#define WLAN_CFG_NUM_TX_EXT_DESC 1024
-#else
-#define WLAN_CFG_PER_PDEV_RX_RING 1
-#define NUM_RXDMA_RINGS_PER_PDEV 1
-#define WLAN_LRO_ENABLE 0
-#define WLAN_CFG_NUM_TX_DESC  (16 << 10)
-#define WLAN_CFG_NUM_TX_EXT_DESC (8 << 10)
-#endif
-
 #ifdef WLAN_RX_HASH
 #define WLAN_RX_HASH_ENABLE 1
 #else
@@ -154,6 +180,12 @@ struct wlan_cfg_dp_soc_ctxt {
 	int num_tx_ext_desc;
 	int max_peer_id;
 	int htt_packet_type;
+	int int_batch_threshold_tx;
+	int int_timer_threshold_tx;
+	int int_batch_threshold_rx;
+	int int_timer_threshold_rx;
+	int int_batch_threshold_other;
+	int int_timer_threshold_other;
 	int int_tx_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
 	int int_rx_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
 	int int_rx_mon_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
@@ -208,6 +240,15 @@ struct wlan_cfg_dp_soc_ctxt *wlan_cfg_soc_attach()
 	wlan_cfg_ctx->htt_packet_type = WLAN_CFG_HTT_PKT_TYPE;
 	wlan_cfg_ctx->max_peer_id = WLAN_CFG_MAX_PEER_ID;
 
+	wlan_cfg_ctx->int_batch_threshold_tx = WLAN_CFG_INT_BATCH_THRESHOLD_TX;
+	wlan_cfg_ctx->int_timer_threshold_tx =  WLAN_CFG_INT_TIMER_THRESHOLD_TX;
+	wlan_cfg_ctx->int_batch_threshold_rx = WLAN_CFG_INT_BATCH_THRESHOLD_RX;
+	wlan_cfg_ctx->int_timer_threshold_rx = WLAN_CFG_INT_TIMER_THRESHOLD_RX;
+	wlan_cfg_ctx->int_batch_threshold_other =
+		WLAN_CFG_INT_BATCH_THRESHOLD_OTHER;
+	wlan_cfg_ctx->int_timer_threshold_other =
+		WLAN_CFG_INT_TIMER_THRESHOLD_OTHER;
+
 	for (i = 0; i < WLAN_CFG_INT_NUM_CONTEXTS; i++) {
 		wlan_cfg_ctx->int_tx_ring_mask[i] = tx_ring_mask[i];
 		wlan_cfg_ctx->int_rx_ring_mask[i] = rx_ring_mask[i];
@@ -427,3 +468,33 @@ void wlan_cfg_set_dp_soc_nss_cfg(struct wlan_cfg_dp_soc_ctxt *cfg, int nss_cfg)
 {
 	cfg->nss_cfg = nss_cfg;
 }
+
+int wlan_cfg_get_int_batch_threshold_tx(struct wlan_cfg_dp_soc_ctxt *cfg)
+{
+	return cfg->int_batch_threshold_tx;
+}
+
+int wlan_cfg_get_int_timer_threshold_tx(struct wlan_cfg_dp_soc_ctxt *cfg)
+{
+	return cfg->int_timer_threshold_tx;
+}
+
+int wlan_cfg_get_int_batch_threshold_rx(struct wlan_cfg_dp_soc_ctxt *cfg)
+{
+	return cfg->int_batch_threshold_rx;
+}
+
+int wlan_cfg_get_int_timer_threshold_rx(struct wlan_cfg_dp_soc_ctxt *cfg)
+{
+	return cfg->int_timer_threshold_rx;
+}
+
+int wlan_cfg_get_int_batch_threshold_other(struct wlan_cfg_dp_soc_ctxt *cfg)
+{
+	return cfg->int_batch_threshold_other;
+}
+
+int wlan_cfg_get_int_timer_threshold_other(struct wlan_cfg_dp_soc_ctxt *cfg)
+{
+	return cfg->int_timer_threshold_other;
+}

+ 49 - 0
wlan_cfg/wlan_cfg.h

@@ -360,4 +360,53 @@ int wlan_cfg_get_dp_soc_nss_cfg(struct wlan_cfg_dp_soc_ctxt *cfg);
  *
  */
 void wlan_cfg_set_dp_soc_nss_cfg(struct wlan_cfg_dp_soc_ctxt *cfg, int nss_cfg);
+
+
+/*
+ * wlan_cfg_get_int_batch_threshold_tx - Get interrupt mitigation cfg for Tx
+ * @wlan_cfg_soc_ctx
+ *
+ * Return: Batch threshold
+ */
+int wlan_cfg_get_int_batch_threshold_tx(struct wlan_cfg_dp_soc_ctxt *cfg);
+
+/*
+ * wlan_cfg_get_int_timer_threshold_tx - Get interrupt mitigation cfg for Tx
+ * @wlan_cfg_soc_ctx
+ *
+ * Return: Timer threshold
+ */
+int wlan_cfg_get_int_timer_threshold_tx(struct wlan_cfg_dp_soc_ctxt *cfg);
+
+/*
+ * wlan_cfg_get_int_batch_threshold_rx - Get interrupt mitigation cfg for Rx
+ * @wlan_cfg_soc_ctx
+ *
+ * Return: Batch threshold
+ */
+int wlan_cfg_get_int_batch_threshold_rx(struct wlan_cfg_dp_soc_ctxt *cfg);
+
+/*
+ * wlan_cfg_get_int_batch_threshold_rx - Get interrupt mitigation cfg for Rx
+ * @wlan_cfg_soc_ctx
+ *
+ * Return: Timer threshold
+ */
+int wlan_cfg_get_int_timer_threshold_rx(struct wlan_cfg_dp_soc_ctxt *cfg);
+
+/*
+ * wlan_cfg_get_int_batch_threshold_tx - Get interrupt mitigation cfg for other srngs
+ * @wlan_cfg_soc_ctx
+ *
+ * Return: Batch threshold
+ */
+int wlan_cfg_get_int_batch_threshold_other(struct wlan_cfg_dp_soc_ctxt *cfg);
+
+/*
+ * wlan_cfg_get_int_batch_threshold_tx - Get interrupt mitigation cfg for other srngs
+ * @wlan_cfg_soc_ctx
+ *
+ * Return: Timer threshold
+ */
+int wlan_cfg_get_int_timer_threshold_other(struct wlan_cfg_dp_soc_ctxt *cfg);
 #endif