This GPIO is a input signal, so need to set it
to input mode, or it will lead leakage in RBC.
This change is only to fix the power issue.
Change-Id: I87716f646c75dac2f1350a2ea55188829a4ccc9e
Signed-off-by: Yuan Zhao <yzhao@codeaurora.org>
This pin is a output pin from panel. Panel can
output signal of internal VSYNC and ERR_FLAG.
Change-Id: Ib8e661ca1fdb33bb7060935edb9bc1f1a858c4b3
Signed-off-by: Yuan Zhao <yzhao@codeaurora.org>
Change calculates and updates correct pclk that is being
used to drm modes in kilo hertz.
Change-Id: I7aab10c08689697120d4d7c152f30993defd36d3
Signed-off-by: Vara Reddy <varar@codeaurora.org>
Partial update commands are using static memory. For dual dsi,
both dsi's can manipulate on same memory, if partial update is enabled
on both of them. Change removes the static configuration.
Change-Id: I0ca16324a27427d13deaa9d18e3ab4f47fe1cc21
Signed-off-by: Vara Reddy <varar@codeaurora.org>
CWB, DP and WB displays tear down sequence must reset
3d_merge, ctl, pingpong_binding, etc. MDP HW
blocks. This change fixes the tear down
sequence register programming. It also moves flush
sw reset before encoder_disable call. That allows
CWB tear down to update the flush configuration
on primary ctl path.
Change-Id: I21c521b39456af4144cf836c65d46a25c985f51d
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
This change updates the DSI PHY sequence for Kona target as
per latest HW team recommendation.
Change-Id: I20f6a81bb1112e9e976acae595b985dad7ad4b7a
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
This change updates the DSI PHY PLL programming for kona target
as per the hardware recommendation.
Change-Id: I706169fb635e72bd0ccd3057107ea749408733d0
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
Unpaired trace "sde_power_resource_enable" caused tracer parse
incorrect trace points and display weird state on Chrome. Make
trace "sde_power_resource_enable" pair to fix it.
Bug: 122510119
Test: Checked sde trace can be displayed correctly on Chrome
Change-Id: I938b5648a09e00eaea59070af31a2e6469763087
Signed-off-by: Midas Chien <midaschieh@google.com>
(cherry picked from commit 3a335059bf7a200977e8f4e0a4aa5c6ceca3863a)
Signed-off-by: Christopher Braga <cbraga@codeaurora.org>
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
Highest bank bit property is read from device-tree, else set
to default value based on DDR type.
Change-Id: I8b31d957e29071b599a7f983cbf8300e293e9e36
Signed-off-by: Prashant Singh <prasin@codeaurora.org>
When there is a change in resolution or FPS, a new clock rate is
calculated. During such a Dynamic Mode Switch, the clock rate
change pending flag needs to be set after it has been calculated.
This flag is later checked before kickoff and the clocks are updated
accordingly.
Change-Id: Iec102796d5c61d01c567f0b6676e9a6d4ed94268
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
When secondary display preference is determined and 2 layer
mixers are required, the preference must check LM pair mask
to meet hw restrictions.
Change-Id: I22845be84f95659a58be98ff11afa4e652fb16e3
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
Update the PLL and PHY power on and clock set sequence as per
the hardware recommendations. Move the post link clock phy enable
part to the catalog so that it can be programmed after enabling
link clock.
Change-Id: I9b3b49e5a9ac93bebcb1cb7da63b715a8d5ed85c
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
Reset the dp sink power state during panel init.
Sinks may still be in old power states from
previous sessions, so reset the power to allow
for a clean start to the dp session.
CRs-Fixed: 2453351
Change-Id: I7e2a4c9bcdb8f69d2562ba098d80a1c7e8f9f620
Signed-off-by: Fuad Hossain <fhossain@codeaurora.org>
This change is a snapshot of dsi files taken of 4.14
as of commit 764f7c2 (Merge remote-tracking branch
'quic/dev/msm-4.14-display' into msm-4.14)
Change-Id: I8361a844c35a4450f7800964a8da2741676fd6c7
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
The drm_panel defined in sde_connector was not used, so
removed it.
Change-Id: I70a94f11ebd60362d25e37a256f46d3d4942089d
Signed-off-by: Yuan Zhao <yzhao@codeaurora.org>
SDE fence driver avoids duplicate fence creation if
fence timeline is not increased. This may lead to issue
if client closes the fence with failure ATOMIC_COMMIT.
SDE fence driver provides the closed fd node to subsequent
valid commit and leads to invalid state. This patch avoids
duplicate fence creation from crtc and connector object
instead of sde_fence.
Change-Id: Ic7b43762f0ad251fb20e42edb5f4d5f401790e14
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
For calculating fps, correct frame count initialization
from 1 to 0 to avoid counting one extra frame on every
periodicity window.
Change-Id: I53cea321bb4d3335cc58e08df2f530cd1a306297
Signed-off-by: Shubhashree Dhar <dhar@codeaurora.org>
Update the connected state to false during display clean up. This
will allow subsequent connections to be processed correctly in
the face of disconnect failures due to unresponsive user mode
clients.
Change-Id: If30f5d722bf742060c9d4d2dec2207d7baf27fc2
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
Add a new state to indicate timeout failures in simulation mode.
This can be used by test scripts to trigger a retry of the
session.
Change-Id: I9e250ba7d42fcb318698d8456b3acc5b55081abc
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
Disable audio for every active panel during display clean
up use cases when the driver times out waiting for the
video path to tear down. This ensures that the audio
subsystem is notified before the clean up shuts down the
timing engine, and also ensures that the audio module
state is correctly updated to indicate that the session
has ended. This change will reduce the likelihood of the
audio subsystem attempting to program DP audio, and also
ensure that the state checks will correctly prevent any
attempts to program audio after the session has ended.
Change-Id: I937f894e80b55164f9700f021d852863aeb18959
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
Remove unnecessary vblank get and put. This call is
not required before calling wait for crtc commit done
because downstream driver has its own vblank refcount.
Without this change vblank enable call is seen every
vsync.
Change-Id: I1c692f1d2084dbe7ad2f594ddae3907a4a10bb96
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
Currently the display driver does not consider the write back
client while deriving client type for QOS settings.
Add new API to consider the write back and other non
real time clients also for picking up the proper QOS settings.
This patch also fixes the QOS setting mismatch with QSEEDLITE
hardware.
Change-Id: I5db3d21921b8930bb6399ea355d3ce2b60e51430
Signed-off-by: Lakshmi Narayana Kalavala <lkalaval@codeaurora.org>
In the case of concurrent writeback, display thread
does not wait for writeback done and the fences are released
immediately if the pending frame count is one or zero.
Also during this skip wait process, the output frame buffers are also
cleaned up. If there are couple of bad writeback frames, there could
be a race condition between frame buffer cleanup in the display driver
and DRM_IOCTL_MODE_RMFB ioctl from userspace. Hence add appropriate
ref count logic with output frame buffers while the driver is using them.
Change-Id: I1cf919b93424011c75c39bcddd296a03a9d5c4ee
Signed-off-by: Lakshmi Narayana Kalavala <lkalaval@codeaurora.org>
