نمودار کامیت

479 کامیت‌ها

مولف SHA1 پیام تاریخ
qctecmdr
c7ce49b1c4 Merge "soc: swr-mstr: add support for bt swr ports" 2024-04-30 00:22:09 -07:00
qctecmdr
a7f4928dec Merge "audio-kernel: Fix compilation erros caused by export" 2024-03-28 04:16:40 -07:00
Raghu Ballappa Bankapur
e46afa7663 audio-kernel: Fix compilation erros caused by export
Fix the issues reported after adding export.

Change-Id: I1462d56463545e88619cc70b5dbef052df872399
Signed-off-by: Raghu Ballappa Bankapur <quic_rbankapu@quicinc.com>
2024-03-21 23:25:28 -07:00
Vangala, Amarnath
443ca7a00e soc: swr-mstr: add support for bt swr ports
Add support for BT Soundwire port configurations.
Add support for flow control modes for fractional channel rates.
Configure slave side data ports for flow controls modes.
Fix the direction adn offset1 fields for Tx ports on BT Soundwire.
When the flow control mode is not required,
 update the slave configuration accordingly.
Sample Interval HIGH field in slave port controls needs to be
reset to zero when Sample Interval value is less than 255.
Avoid clock stop mode for bt swr slave during runtime suspend call.
In case of fractional sampling rates, additional offset bits need
 to be added between samples to carry flow control information.

Change-Id: If023946f62c5157119836cf43e8542cfd6e0ce16
Signed-off-by: Vangala, Amarnath <quic_avangala@quicinc.com>
2024-03-14 00:31:39 +05:30
Sarath Varma Ganapathiraju
2c0be1176f asoc: Add compilation support for Volcano
Add compilation support for volcano, includes
wcd9378 driver compilation, and add dedicated
configs for volcano which has different swr
version.

Change-Id: I8dffbe72ed524fcaaad8c9e65c7c993ad9678ae1
Signed-off-by: Sarath Varma Ganapathiraju <quic_ganavarm@quicinc.com>
2024-03-13 10:22:07 -07:00
Sarath Varma Ganapathiraju
d0ef22aa88 asoc: add conditional compilation support for pitti/volcano/pineapple
add conditional compilation support for pitti/volcano/pineapple.

Change-Id: Icedd62d0831e72c51a2a9cb158e310f8afe0e0eb
Signed-off-by: Sarath Varma Ganapathiraju <quic_ganavarm@quicinc.com>
2024-03-12 22:32:40 +05:30
Sarath Varma Ganapathiraju
b58f10f76f soc: add support for swr version 1p7
-add support for swr version 1p7.
-Return 0 instead of EBUSY during swrm_suspend to
allow system to enter suspend without rx swrm
preventing it.
- Update proper reg value during pcm port config.

Change-Id: Id42d3625a0609507fffc92b650cfae92b0e1dc4f
Signed-off-by: Sarath Varma Ganapathiraju <quic_ganavarm@quicinc.com>
2024-03-08 04:03:52 -08:00
Yuhui Zhao
82eaa39165 asoc: reset scp1_val and scp2_val after ssr
Move scp1_val and scp2_val into swr_device struct and
reset this two value after ssr.

Change-Id: I549f7438f034a2de0e556bd749594fbe5db2a21e
Signed-off-by: Yuhui Zhao <quic_yuhuzhao@quicinc.com>
2024-02-28 05:55:38 -08:00
Prasad Kumpatla
bd6e28b958 soc: add irq_set_irq_wake() enable and disable IQRs
from Linux version(>= 5.10) for disabling the irq need
irq_set_irq_wake() along with disable_irq_nosync(). Only
disable_irq_nosync() not allows IQRs to fully disable.

Change-Id: I4eb18ec0d6b96cdb11dcc35d847fefb0ed59cc82
Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
2024-02-12 19:05:28 +05:30
qctecmdr
750e0add3e Merge "soc: Address SWR rate mismatch interrupt" 2024-02-02 23:49:11 -08:00
shengruz
b1246dc67c audio-kernel-ar: enable ar-audio-kernel for quin-gvm-gen4
Add KBUILD_OPTIONS and Kbuild conf.
Read hw params from dts and set it during dailink startup.

Change-Id: Ifba87ce6c20bba515566450ddbfaf63a29758e33
Signed-off-by: shengruz <quic_shengruz@quicinc.com>
2024-01-25 00:12:59 -08:00
Deepali Jindal
db2a1f4e28 soc: Address SWR rate mismatch interrupt
SWR unknown interrupt value: 131072 happens when
disable handset/headphones. Handle DOUT_RATE_MISMATCH
irq to fix this issue.

Change-Id: Ibf3e93df0594eae10dc568bcd4de73526510b963
Signed-off-by: Deepali Jindal <quic_deepjind@quicinc.com>
2024-01-22 03:26:14 -08:00
qctecmdr
a30841251b Merge "asoc: codec: wcd9378: optimize the micbias usage set logic" 2024-01-07 02:11:24 -08:00
Yuhui Zhao
2476775b9b asoc: regmap: add support for 32bit reg_address regmap_write/read
The regmap write/read can only support 16bit reg_address. but
the reg_address of tambora is 32bit_address. need add support for
it.

Change-Id: I2374b3672bc4b652ef5ed00921a0e3beed0c6231
Signed-off-by: Yuhui Zhao <quic_yuhuzhao@quicinc.com>
2024-01-02 13:06:48 +08:00
Prasad Kumpatla
d36fc5c57f asoc: add audio kernel config files for pitti
add audio kernel config files for pitti.

Change-Id: I2ef71e7ce42b6083c099558bd0d14f49800d3e3a
Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
2023-12-29 14:52:53 +08:00
yuayang
568d8d0822 asoc: audio-kernel: Remove trace_printk
Remove trace_printk point.

Change-Id: I76b53eda77bc41c75e06a885084022d74c248188
Signed-off-by: yuayang <quic_yuayang@quicinc.com>
2023-12-21 16:26:31 +08:00
Jiazai Wu
60687055d2 asoc: add support for 7255 monaco
1. Add config for 7255 monaco.
2. Add kernel build rule for 7255 monaco dlkms.

Change-Id: I0b697856907d6bbc7e78a421cde75d6cdf4ee2b4
Signed-off-by: Jiazai Wu <quic_jiazwu@quicinc.com>
2023-11-09 10:38:43 +05:30
sarath varma ganapathiraju
9bb0f01c5d pitti: Add compilation support for target pitti
Add Compilation support for target pitti.

Change-Id: Ibb06ace7332aa87eb5f8082db95f0c0f8b3deb66
Signed-off-by: sarath varma ganapathiraju <quic_ganavarm@quicinc.com>
2023-10-19 22:01:23 -07:00
qctecmdr
2e19e36111 Merge "soc: handle invalid address passed to swrm_peek debugfs node" 2023-08-03 19:37:51 -07:00
Sairam Peri
3ae1bfcfe1 soc: Update lpi device state
Post SSR when audio notifier service up notification
is received lpi_dev_up flag is not updated.
This is causing lpi read/write failures.
Update lpi_dev_up irrespective of initial_boot.

Change-Id: Ifab3709c45144988deb36192d0b1da7da77939d0
Signed-off-by: Sairam Peri <quic_peri@quicinc.com>
2023-08-01 16:26:14 +05:30
Faiz Nabi Kuchay
da3a17a06c soc: handle invalid address passed to swrm_peek debugfs node
Add logic to handle invalid address passed to swrm_peek and swrm_poke
debugfs node.

Change-Id: I46443734e6b4b758276cdf8fd28a022d37112bfc
Signed-off-by: Faiz Nabi Kuchay <quic_fkuchay@quicinc.com>
2023-07-31 05:03:11 -07:00
Prasad Kumpatla
26ab6d4948 soc: pinctrl: add slew-base register update support
add slew offset and register table to update slew values
for required gpio registers.

Change-Id: I001d0602c3fe6c69b0a28d8ebb3c3fd54a3fba90
Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
2023-07-06 22:50:10 -07:00
Phani Kumar Uppalapati
1cd3231eaf pinctrl-lpi: check for boundary conditions for drive strength
Check drive strength for boundary conditions and limit them
to valid values.

Change-Id: I6a474f5d6020bb46b1f6171e77aeaeb5254b2a26
Signed-off-by: Phani Kumar Uppalapati <quic_phaniu@quicinc.com>
2023-06-24 11:07:39 -07:00
Karishma Tekade
1ed2ece8c4 audio_kernel: Enable audio kernel compilation for blair platform
Updated make files in audio_kernel to support blair platform.

Change-Id: I00c832875fc4558580e22825e9a72305e05ae409
2023-05-23 22:44:18 -07:00
Ganapathiraju Sarath Varma
4b8497c773 SOC: Update swr master num port based on ports enabled.
During swr disconnect port, swr master num port is
updated based on the portinfo we receive from slave.
Instead update the master num port based on the ports
enabled. and also if requested port is not enabled
continue to check for other enable port instead of
returning error.

Change-Id: Ia8a6e4935df443f9833e01d56195b590afe3bb4a
Signed-off-by: Ganapathiraju Sarath Varma <quic_ganavarm@quicinc.com>
2023-04-04 21:46:21 +05:30
Prasad Kumpatla
ecbb93d98d soc: define ratelimit for prints to avoid flooding of logs
Change-Id: I7aa38c992716152ebb336190d9d3cd2e9a60e8e0
Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
2023-03-30 05:33:58 -07:00
Ganapathiraju Sarath Varma
4c76e50b0b soc: Boundary check for swr master num_port.
During stress testing, observed master num port is
going out of bounds which is impacting the next usecase
and leads to bus clsh error.
added a check to set master num port to 0 if it is
going out of boundary.

Change-Id: If273230fcef612bae484b19c5b69506606b0e911
Signed-off-by: Ganapathiraju Sarath Varma <quic_ganavarm@quicinc.com>
2023-03-28 11:26:29 +05:30
Eric Rosas
224f288fe3 soc: swr: Remove internal.h dependency
Remove all references to members of regmap struct,
which caused a dependency to the internal.h header
in regmap. Removing these references allows us to
remove the dependency on that header entirely. The
data in question have been replaced with defined
constants.

Change-Id: I6d302a4f2614dd094dd24a850360b4e12868ed88
Signed-off-by: Eric Rosas <quic_erosas@quicinc.com>
2023-03-20 11:27:57 -07:00
Yuhui Zhao
7b2c14090f soc: Add NULL pointer check in lpi_gpio func
Add NULL pointer check in lpi_gpio func

Change-Id: I974f100dea1c3a72d3231ad7dfc3a118f970996e
2023-02-27 22:03:56 -08:00
Eric Rosas
b1da4ef67d soc: Remove internal.h header
Remove soc/internal.h, which
is a duplicate of the internal regmap/internal.h.

Change-Id: I05b30b101382e68ced26343ef1278cecfd1b0ed3
Signed-off-by: Eric Rosas <quic_erosas@quicinc.com>
2023-02-08 22:50:57 -08:00
Prasad Kumpatla
f76f408091 soc: swr-mstr-ctrl: dedicated ports for enable/disable of PCM usescases
For PCM usecase enable/disable we have dedicated ports, so no need of
using counter to manage enable and disable of ports.
This is revert of change-id: I2c65e7658bf90ae01203ebb1b15f14db581ffa55.

Change-Id: Id1953f529569ae48b01dce1c88d2790479cf1a6b
Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
2023-01-04 12:42:53 +05:30
Meng Wang
2b2d743455 soc: swr-mstr-ctrl: disable pcm out/in when all ports are disabled
PCM_DP_OUT/IN enable bit are used for any data_port which supports
word_length larger than 8. Disable these two bits only when all
the ports are disabled.

Change-Id: I2c65e7658bf90ae01203ebb1b15f14db581ffa55
Signed-off-by: Meng Wang <mengw@codeaurora.org>
2022-11-30 11:49:19 -08:00
qctecmdr
04f7220eea Merge "soc: swr-mstr-ctrl: reset PCM_DP_OUT/IN count when SSR" 2022-11-22 06:44:34 -08:00
qctecmdr
ebd6dfdcea Merge "soc: avoid unnecessary attempts during SSR" 2022-11-22 06:29:35 -08:00
Yuhui Zhao
39e7f936b4 soc: swr-mstr-ctrl: reset PCM_DP_OUT/IN count when SSR
during SSR, swrm_disable_ports() is not called so the pcm_enable_count
never decreased. Reset the count to 0 when SSR

Change-Id: I937dd309ab9fb2c28c0962053cd1632c891fb598
Signed-off-by: Junkai Cai <junkai@quicinc.com>
2022-11-21 01:36:16 -08:00
Phani Kumar Uppalapati
5555970830 audio-kernel: fix compilation issues for pineapple target
Fix compilation issues in audio-kernel for pineapple target.

Change-Id: I93fa4fb670989f82139dd2cd0dbe57b52ad52504
Signed-off-by: Phani Kumar Uppalapati <quic_phaniu@quicinc.com>
2022-11-18 11:58:44 -08:00
Prasad Kumpatla
ec92742831 soc: avoid unnecessary attempts during SSR
as part of swrm_runtime_suspend, multiple attempts are made
to write into swr regisers. Incase of SSR state, all those write
 attempts are bound to fail.
Hence avoid swr read/write operations during SSR state.
Also move updating dev_up flag for SSR event to an early point in call flow.

Change-Id: I805d1ccf8bcdab5fdde7b74582a65463d5bcbd6e
Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
2022-11-14 01:38:41 -08:00
Yuhui Zhao
19b039aa73 asoc: add config files to support pineapple target
add pineapple config file to all drivers:
Kbuild, including soc/dsp/ipc

Change-Id: I2357c7c96739bd42cb8764753d2a4fd5dd1c9634
Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
2022-10-07 11:24:42 +05:30
Soumya Managoli
ee00c83a92 audio-kernel: Bring up changes for bengal
Enable audio driver compilation for bengal.

Change-Id: I1ce7f0356fe70bc59c7caa6d333ad380d1e725ff
Signed-off-by: Soumya Managoli <quic_c_smanag@quicinc.com>
2022-09-29 16:50:51 +05:30
qctecmdr
239b1155ff Merge "soc: swr-mstr-ctrl: Update SWR V1.6 registers" 2022-09-01 01:59:41 -07:00
Yuhui Zhao
4b2a2b04ee audio-kernel: Add missing “\n” for trace_printk() in Audio drvier.
Add missing “\n” for trace_printk() in Audio drvier.

Change-Id: I444464dc717c13330e9d4ea686340db4ccd01d6e
Signed-off-by: Yuhui Zhao <quic_yuhuzhao@quicinc.com>
2022-08-17 13:45:22 +08:00
Soumya Managoli
a5dda29cfd soc: swr-mstr-ctrl: Update SWR V1.6 registers
Update swr ver 1.6 registers.

Change-Id: I074a22305915b2ca38b6d6107fa253a435f92214
Signed-off-by: Soumya Managoli <quic_c_smanag@quicinc.com>
2022-08-12 20:02:32 +05:30
Phani Kumar Uppalapati
42f2072808 soc: swr-mstr-ctrl: allow runtime suspend first before system suspend
Allow the swrm to runtime suspend first before entering system
suspend. This will prevent suspend being blocked for about 700ms.

Change-Id: I8f90a9f1ba4f6af0decc256cace2f3bd2295dece
2022-08-09 12:02:24 -07:00
qctecmdr
923d42aac1 Merge "soc : swr-mstr-ctl : Disable PCM port wth proper condition check" 2022-08-04 09:00:20 -07:00
Ganapathiraju Sarath Varma
e517fca722 soc : swr-mstr-ctl : Disable PCM port wth proper condition check
disabling pcm port only when master port needs to be disabled.

Change-Id: I666d4acdad5d7c01e366fac972cb72f85f99d75e
Signed-off-by: Ganapathiraju Sarath Varma <quic_ganavarm@quicinc.com>
2022-07-29 23:53:02 +05:30
Prasad Kumpatla
e569b3b05e dsp: Defer clients probe, when audio notify probe is not complete.
Audio notify probe is defer and PDR state change is not happening before
the clients calls to audio_notifier_register(). Due to this the
service_data[service][domain].state remains as UNINIT_SERVICE (where service is
PDR domain is ADSP) and due to this audio_notifier_reg_client() return success
without registering to PDR service, which is incorrect. To avoid this, will
defer the client probes when the audio notify probe is incomplete.

Change-Id: Ib96bdb24dd92ea8b81a0201a7b48e917c7b1403c
Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
2022-07-27 10:32:03 -07:00
Phani Kumar Uppalapati
12625e7622 soc: swr-mstr-ctrl: check for device number before port params init
If the peripheral device is not enumerated, device number is stuck at
0. Check device number for 0 before initializing port params.

Change-Id: I444b37d56bebdebf75e8e7554cd435beece6b066
2022-07-25 14:06:21 -07:00
Phani Kumar Uppalapati
e7b87f2fcc Revert "soc: Fix PDR WSA auto-enumeration issue"
This reverts commit d17a0ca85e.

Change-Id: I23792f4926184f4e37afed59b08a870d7279979d
2022-06-27 23:37:31 -07:00
Matthew Rice
d17a0ca85e soc: Fix PDR WSA auto-enumeration issue
During PDR, WSA auto-enumeration is swapped (WSA2
gets enumerated before WSA1 unlike bootup).
This causes offset1s to be swapped because dev_nums are
swapped and are used to index into device tree data.
Store dev_id during enumeration and use this instead of
dev_num to pick out offset1 from device tree data.

Change-Id: Ia98ba6554acf67055357625fc789065b60d7006b
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
2022-06-10 11:35:44 -07:00
qctecmdr
0c71807fcc Merge "soc: Fix SWRM DIN Addresses and CPS offset1" 2022-05-16 15:31:02 -07:00