Handle host_ready failures and try to initialize host if not already.
Sometimes customizations for customers causes NOC error as host_ready
doesn't return early upon failure and the customer customization
tries to access aux register to reconfig upon aux failure while
reading EDID. Adding fix will make driver more robust to handle such
cases.
Change-Id: Ifa5c56daa32c4ef366a0e05718495ffcb40b96b3
Signed-off-by: Rajat Gupta <rajatgu@codeaurora.org>
Signed-off-by: Sandeep Gangadharaiah <sandgang@codeaurora.org>
DP driver, at probe time, checks for fsa probe completion by
registering a notifier callback. The fsa driver performs some
I2C operations at this time. But occasionally, it takes multiple
attempts to complete these I2C transactions,adding huge delays
to display driver probing.If this delay is long enough, then
display usermode services start before display driver probe completes
and as a result, it fails to enumerate any displays.
Since the fsa switch is needed only after an external display is hot
plugged,this change moves the fsa probe check to dp hotplug handler.
Change-Id: I1b592ec3921a0b406ca23142d07e1a7e8b72090e
Signed-off-by: Vara Reddy <varar@codeaurora.org>
Add safety checks to check for dp link and core clocks before accessing
the main control registers during dp teardown or dp setup.
Change-Id: Ic80050b7c1cec59d7fc27a1c5f12fa1b244f86fb
Signed-off-by: Vara Reddy <varar@codeaurora.org>
The mode validation logic in DP checks for 3dmux only if DSC is
not supported by the sink. It does not cover the case where the
sink supports DSC but there are not enough DSC blocks available.
In this case, it filters out all the modes even though some of
the modes can be realized with 3dmux or without 3dmux or DSC.
This change updates the logic to check for DSC first and if
that fails, disable DSC for the panel and look for other modes
that can be supported with or without 3dmux alone.
Change-Id: Ie0497333c77d8de30d126e701b5458f354897b8c
Signed-off-by: Rajkumar Subbiah <rsubbia@codeaurora.org>
Currently the DP driver always uses a compression ratio of 3, if
DSC is enabled. So if the sink supports 30bpp, the compressed
output is set to 10bpp. But since the hardware supports
compressing this to 8bpp, it would require less link bandwidth
than 10bpp compressed output. For compliance testing, the
test equipment limits the link bandwidth based on the most
efficient compression ratio and for some resolutions there
is not enough link bandwidth for 3:1 compression.
This change always sets the compression output to 8bpp to
minimize the link bandwidth utilization.
Change-Id: Ifa6129444c2bab4e9c357ddfe49f76efa5b04be0
Signed-off-by: Rajkumar Subbiah <rsubbia@codeaurora.org>
Updating the TU calculator to fix the formulas for the following
two use cases:
* 3.75:1 DSC compression
* Modes with RB2 (reduced blanking) timing.
Change-Id: I295e3fc252691a7fb42b610101da32c9f31d1855
Signed-off-by: Rajkumar Subbiah <rsubbia@codeaurora.org>
Currently edid cache is cleared only in the mst attention callback
flow i.e. if a monitor is plugged in/out of a mst dongle. If mst
dongle is plugged out directly, the edid cache is not cleared.
This change clears the edid cache also during the
connect/disconnect callback.
Change-Id: Icc4b4ca6a59f1ee32f7fe062831a3a19f4ab9f00
Signed-off-by: Sudarsan Ramesh <sudarame@codeaurora.org>
Signed-off-by: Sandeep Gangadharaiah <sandgang@codeaurora.org>
When calculating the maximum bpp that can be supported for the
link configuration and mode, currently the driver is not
accounting for the FEC overhead. When FEC is enabled, the
link bandwidth available for the video stream is reduced and
therefore it needs to be included in the calculation.
Change-Id: I41a664d739f369b17cff2ced7f88f5e90ee196f4
Signed-off-by: Rajkumar Subbiah <rsubbia@codeaurora.org>
FEC is a link specific configuration and should be configured before
the MST streams are enabled. Currently, the driver is configuring FEC
for each stream and in a case where the first stream is compressed and
the second stream is uncompressed, it enables FEC before the first
stream is enabled but ends up disabling FEC when the second stream is
enabled.
This change splits FEC/DSC configuration into separate functions and
skips FEC configuration for the second stream.
Change-Id: Ic1bab321dc77da7ec5c0253c93bb69735a217fd6
Signed-off-by: Rajkumar Subbiah <rsubbia@codeaurora.org>
The connector detect function is currently implemented as a
callback from the framework, and creates a context before
calling the detect_port_ctx MST callback. This change updates
the callflow so that the framework calls the new detect_ctx
function in the MST case. This removes the need for creating a
new context before calling further downstream functions.
In addition, references to the mst_connector_get_info
function were replaced by connector_get_info to avoid
redundancy.
Change-Id: I224d09e77fad4b6925a42b1bc912a05e3e4d060a
Signed-off-by: Sudarsan Ramesh <sudarame@codeaurora.org>
Logging connector id will help debug the issues related to
DP MST stability and pre-merge tests. This change will log
the DP MST connector IDs modified during stability tests.
Change-Id: Ifaf8e319697a809b02c24c473acec8da521286e2
Signed-off-by: Sankeerth Billakanti <sbillaka@codeaurora.org>
Check for pixel1 rcg only for mst supported platforms. On sst only
devices bind gets failed.
Change-Id: I73cc4a572d4d0791205c342f57618b226eb91fef
Signed-off-by: Rajat Gupta <rajatgu@codeaurora.org>
Currently, the max voltage swing supported is level 2. This change
adds support for voltage swing level 3 in the dp driver.
Change-Id: Idf1dbb4e74edff924067130a5edea869f392bf38
Signed-off-by: Sudarsan Ramesh <sudarame@codeaurora.org>
This change adds logic to determine dsc switch based on
the connector property "CONNECTOR_PROP_DSC_MODE" and
performs seamless DSC switch if there is any change in
DSC configuration. The connector property is populated
in msm_sub_mode based on which suitable mode is selected.
Change-Id: Ifc4931f16dfb814781bc1d72b103e09103e6bfee
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
In dumping display registers, physical address will be appended after
each block name. This is to support register compare between kernel
and UEFI.
Change-Id: Ic20d3e2bd4c95aa7c71c4b646a149f7e83ad731a
Signed-off-by: Yu Wu <zwy@codeaurora.org>
This change fixes a regression related to resetting the edid
segment and address when reading port edid introduced by
896cf4fd01 (disp: msm: dp: reset
edid segment and address when reading port edid).
Change-Id: Ie39fb9558d9f3206e4ded17b97018a966aab3a7c
Signed-off-by: Sudarsan Ramesh <sudarame@codeaurora.org>
Current debugfs dpcd node only dumps last written dpcd
string in dpsim mode. This change adds support to dump
dpcd information in real monitor use case.
Change-Id: I8a716f30df72feadf9012c65f5a56fe7194d91d2
Signed-off-by: Sudarsan Ramesh <sudarame@codeaurora.org>
Currently, edid read failures are seen when transitioning from a
resolution with larger edid size to a resolution with smaller
edid size. Edid segment and address values are not getting reset,
and any edid read after switching to a lower resolution
reads the incorrect segment.
This change clears edid segment and resets edid address in the
read_edid function so that the affected values are cleared every
time edid is read.
Change-Id: Iedb231c877b85d645ca74071f9c663393a204ff7
Signed-off-by: Sudarsan Ramesh <sudarame@codeaurora.org>
This change fixes issue, where USB driver was not properly updated
with the number of dp lanes being used for altmode usecase.
Change-Id: Ic93d3e3b37aa8ad2d664e006ede3cf6c27d7133a
Signed-off-by: Vara Reddy <varar@codeaurora.org>
Originally, a call is made to dwc3_msm_release_ss_lane to
notify the USB driver that DP 4 lane is in use. This was
cleared on USB disconnect. Combined with the autosuspend
timeout and UCSI notifying that USB was not needed, this
caused issues in bringing up the monitors.
This change implements a new api call from the USB driver,
dwc3_msm_set_dp_mode. DP driver makes a call to this api to
notify USB driver for 2 lane, 4 lane, and disconnected states.
Change-Id: I051e5424c518ca84e2cc6dc27c114715dc287ac0
Signed-off-by: Sudarsan Ramesh <sudarame@codeaurora.org>
Currently, any edids read by the driver are cached in the
sde_connector object. In the event that subsequent edids are written,
the cached edid is used instead of the newly written edid.
In the event a new edid is written to the edid debugfs node over
dpsim, this change clears the current cached edid before overwriting
the new one.
Change-Id: I53f870e97c3b9ac5954d193f74e4b272386f67a8
Signed-off-by: Sudarsan Ramesh <sudarame@codeaurora.org>
In DPSIM, while calling the hpd callback from dp_sim_host_hpd_irq,
the hpd argument is passed in as false. In the hpd callback, both
the hpd_irq and hpd arguments need to be encoded into the vdo
parameter. Currently, MST DPSIM testcases are broken because this
is not implemented properly.
This change sets the hpd argument to true in the hpd_irq callback, and
encodes the hpd and hpd_irq parameter in the vdo object before passing
it to the simulate_attention callback.
Change-Id: I07155716699aad8554b6e08b446139bcd0d7fa74
Signed-off-by: Sudarsan Ramesh <sudarame@codeaurora.org>
During dp altmode driver initialization, the dp altmode driver is called
with a null data packet. Even though this callback indicates a disconnect,
the multi function flag is incorrectly set to true. If the DP is enabled
later using simulation mode, the multi function flag is not cleared thereby
limiting the lane count to 2 irrespective of capability applied through
DPCD.
This change checks for the zero pin value while setting the multi function
flag.
Change-Id: I974fbf1630eed26f406ac9e4c99140b27f0cb635
Signed-off-by: Rajkumar Subbiah <rsubbia@codeaurora.org>
In an MST DSC setup, the sink_dsc_caps object is read into the base
panel. In the process of creating different connectors and panel
objects, the sink_dsc_caps panel object is not copied correctly to
the new panel objects. This causes an error where a fallback DSC
version is used.
This change correctly copies the sink_dsc_caps object over to the
panel for the MST connector from the base connector.
Change-Id: I66af823bbe08c8b1fbd68d628e759416162e9d53
Signed-off-by: Sudarsan Ramesh <sudarame@codeaurora.org>
Currently, 4K120 mode is being filtered by DP driver
due to invalid topology assignation. When 4 LMs are
needed, the number of DSCs must match the number of
LMs since only DSCMERGE based topologies are supported
for driving DSC capable panels.
This change fixes the topology validation logic and
aggregates LM and DSC validation functions in the topology
one since the number of LMs and DSCs must now be considered
in calculating the topology requirement.
Change-Id: I95577eabb34068cd490d23e70ffbb899d1c2d03a
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
Fix dlkm compilation errors that are due to the use of -Werror
flags used by the build system.
Change-Id: I5e1e9bc63c1361d73e4930aab123212717872ecb
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
Currently, SDE_DBG_DUMP takes any number of hw block names along with
few defined strings as arguments. This set of arguments is used to
determine which HW block registers needs to be dumped. Move to a
blk bitmask to avoid passing a large set of arguments. The bitmask is
split based on the clks required to access the HW block for ease of use.
The lower 0-23 bits are used for HW blocks which can be accessed by just
enabling the MDP clks. DP is kept separate as it needs DP specific
clks to be enabled. Add a debugfs node through which the mask can be
modified, which can be useful while using the debugfs dump option to
force a panic.
As part of the change, remove in-log/in-mem enable mask debugfs node
for every debugbus and use a single node to control the logging
mechanism for all the HW blocks debugbus.
Change-Id: Ibb6354b3e3265c9911104bb0f964616eb8a898c9
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
Add support to the dump the DP register space and debugbus information.
Change-Id: I903471b07fdd1926b0fc505a980b2a5048387b69
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
The offset for DP pixel clock configuration registers in disp_cc has
changed in waipio. Currently the driver is using incorrect offsets to
read M/N values to calculate SW MVID/NVID during MSA programming. This
results in a blank screen as the sink is not able to restore the pixel
clock.
This change fixes this issue by selecting the correct base address
based on dp core version.
Change-Id: I44214ce52c1bc346715362df0a138f1f8cc011e1
Signed-off-by: Sudarsan Ramesh <sudarame@codeaurora.org>
With the change in the clock names for newer targets, this fix
updates the driver to support different clock names per target.
Change-Id: I58c35fce34356f8c79adb0ac8a907e2fb60813ae
Signed-off-by: Sudarsan Ramesh <sudarame@codeaurora.org>
Currently the timing configuration for test pattern generator in DP
controller assumes that the widebus is disabled. This change adds the
check for widebus and adjusts timing configuration accordingly.
Change-Id: Id86601c910e88705a1a6d0ff4a4b38df6a843409
Signed-off-by: Rajkumar Subbiah <rsubbia@codeaurora.org>
Updating the link clock name in dp parser to account for
the changes made in the dtsi file.
Change-Id: Ic5c018a04b0e3dd3ac90387d76b5b0295323b144
Signed-off-by: Sudarsan Ramesh <sudarame@codeaurora.org>
Remove edid/dpcd simulation function from dp_debug and calls to
sim bridge instead to simplify dp_debug module. Also add mst edid
support and mst hpd simulation from aux level.
Move selected mode from dp_debug module to dp_panel module to
simplify mst handling and decouple dp_debug from main dp driver.
Remove custom edid/dpcd mode from dp_panel and dp_aux module.
Remove mst connector list handling from dp_display module.
Change-Id: Ife1d2deb0e353f0a9695b7b90e5bf3459e1c81f7
Signed-off-by: Xiaowen Wu <wxiaowen@codeaurora.org>
Signed-off-by: Karim Henain <khenain@codeaurora.org>
Signed-off-by: Sudarsan Ramesh <sudarame@codeaurora.org>
