update the set function for BASELAYER_PRIORITY control.
with out this change, configuration is not set to firmware.
Change-Id: I57f01a8e02462ee9e8c221581043a8a70adbfcc5
Signed-off-by: Manikanta Kanamarlapudi <quic_kmanikan@quicinc.com>
Disable video power collapse on pineapple chipset until
power collapse sequence is successful.
Change-Id: I2e7d0085e6d810fb79c2b1070c4bd498f443cfc8
Signed-off-by: Deepa Guthyappa Madivalara <quic_dmadival@quicinc.com>
Upstream driver doesn't support context bank address ranges,
so add dma mask attribute to context bank to specify address
range for upstream driver.
Change-Id: I09191b500006d6c7abf364fbfa22377b480a4b4d
Signed-off-by: Dikshita Agarwal <quic_dikshita@quicinc.com>
video driver is maintaining multiple tables based on enum
name pair. So this mapping might go wrong if new entry is
inserted in different position.
So added logic to prepare enums & static const char* arrays
using macros. So compiler will take care of creation and
maintaining order.
Change-Id: Id3669cf3ce150b3ababb84dce18326220f41d88d
Signed-off-by: Govindaraj Rajagopal <quic_grajagop@quicinc.com>
Enable xo reset clock since it is enabled
from clock driver.
Change-Id: Ica38616f514c9f2288a60fbfb3e0a3683c154b15
Signed-off-by: Darshana Patil <quic_darshana@quicinc.com>
Add assert and deassert axi and mvs0c resets to
avoid video hardware unresponsive issues due to
multiple power collapse sequence execution.
Change-Id: I25ec99eab6b50111161ec9486ea1155bee63f7fc
Signed-off-by: Maheshwar Ajja <quic_majja@quicinc.com>
- Add assert and deassert reset control functions to
update power off sequence in pineapple chipset
- Rename clock names to match with clock macros
Change-Id: Ic6dc0daac8110597bfcb02cceba94d2b97548723
Signed-off-by: Maheshwar Ajja <quic_majja@quicinc.com>
Update function definition to be same as prototype to
avoid compile error
Change-Id: I92be0d96ce1e95e858cca6e5cad8de0564a60e5b
Signed-off-by: Deepa Guthyappa Madivalara <quic_dmadival@quicinc.com>
1. Allow turbo for HEVC 10bit all intra decoding;
2. Add 25 percent extra to VSP cycle for HEVC
10bit all intra decoding;
Change-Id: I794b2a896f7e9444c8979abdb15b8e673a5270ee
Signed-off-by: Zhongbo Shi <quic_zhongbos@quicinc.com>
Signed-off-by: Ankush Mitra <quic_ankumitr@quicinc.com>
if PC fails for 10 times then video driver is treating that situation
as fatal and doing force core_deinit(), in this case firmware will not
follow vcodec power_collapse sequence and if there any pending
transaction from any session it will cause smmu_fault during next
firmware_boot sequence. Added change to perform vcodec power_collapse
from power_off_iris3_hardware() incase of core_deinit due to PC failure.
Change-Id: I45e32985d87b5cc882c4f96f77d1cabc796e6ba0
Signed-off-by: Govindaraj Rajagopal <quic_grajagop@quicinc.com>
Signed-off-by: Ankush Mitra <quic_ankumitr@quicinc.com>
Currently not enabling CSD data in output meta data buffer,
due to invalid function invocation for conditional check.
Change-Id: I96a4462abebb257bfcd91af9c725d577c4046feb
Signed-off-by: Gaviraju Doddabettahalli Bettegowda <quic_gdoddabe@quicinc.com>
Signed-off-by: Ankush Mitra <quic_ankumitr@quicinc.com>
- replace list_del() & list_add_tail() with list_move_tail().
- use sg_dma_address() macro at all possible places.
Change-Id: Ie754b5a75a48299fbe71e9ec0217b93d8524264f
Signed-off-by: Govindaraj Rajagopal <quic_grajagop@quicinc.com>
power_collpase thread will initiate suspend sequence
if no there is no transaction for 1.5 sec. So even
after all session closed, power collapse thread will
kick in only after 1.5 sec, which can be avoided.
with this change power_collpase sequence will be
initiated right after last session close.
Change-Id: I4da231fa4a3d65bebbd19725db2f11d1478490dd
Signed-off-by: Govindaraj Rajagopal <quic_grajagop@quicinc.com>
Upstream doesn't support regulators, while downstream kernel does.
So add a condition to check for regulator support before init.
Change-Id: Icab8aec20796546a33ac571963f871d146970002
Signed-off-by: Dikshita Agarwal <quic_dikshita@quicinc.com>
Enabling debug logs in kernel driver can result in Linux
kernel thread scheduling issues which causes unpredictable
behavior. Therefore increased Hardware timeouts to 4sec
if debug logs are enabled i.e. logs are more than default
logs.
Change-Id: Ic0d04bc0a740c8b11c77574ad3252ca2fa0696bb
Signed-off-by: Vedang Nagar <quic_vnagar@quicinc.com>
Re-structure the memory_ops code so that
upstream driver use mem_ops defined on
msm_vidc_memory.c and downstream driver
use mem_ops defined on msm_vidc_memory_ext.c.
It helps to modularize the code even further.
Change-Id: Id00b0872d7a902a8540500df5efb5f546a9dbe41
Signed-off-by: Ankush Mitra <quic_ankumitr@quicinc.com>
Update the clk table to support TURBO and
LOWSVS_D1 clocks
Change-Id: I69f710ae45df47f0e5190ec1be217b69f35abcf7
Signed-off-by: Deepa Guthyappa Madivalara <quic_dmadival@quicinc.com>
add memory ops support so that different
implementations can exist for memory_alloc,
memory_free, memory_map and memory_unmap,
dma buf attach, detach, map, unmap and
get buffer region in upstream and downstream
drivers.
Change-Id: Ifabc34e7a8b0284579c1bc4a8f477fe558d068f4
Signed-off-by: Darshana Patil <quic_darshana@quicinc.com>
msm_vidc_dt functionalities were distributed to
other files and most of the dt parsing code was
removed already. So added change to cleanup
unused files.
Change-Id: I3362c6cfa3f493b965167b9aeb0f5cf3ac8c2711
Signed-off-by: Govindaraj Rajagopal <quic_grajagop@quicinc.com>
Added call_res_op() macro and used at all possible
places to avoid invalid pointer dereference issue.
Also added changes to cleanup unused functions.
Change-Id: Id77711ad9eaf7b407208567b0fde1f2693588641
Signed-off-by: Govindaraj Rajagopal <quic_grajagop@quicinc.com>