Change sequential to burst write in write calls for i2c and i3c.
CRs-Fixed: 3418153
Change-Id: I4b10b1b62e1075225867561297bddaaac2797a2d
Signed-off-by: Ridhi Shah <quic_ridhshah@quicinc.com>
Enhance the start dev log for csiphy.
CRs-Fixed: 3482293
Change-Id: I8887affedb0d7937e4105585e531c654eaa634ff
Signed-off-by: Depeng Shao <quic_depengs@quicinc.com>
- Add support for Dynamic mode switch.
- Request store and apply from waiting queue.
- Add support for reapply request from active queue.
- Handling TPG interrupt.
CRs-Fixed: 3403974
Change-Id: I5dfe146b30631a94059f72d482610e04ba8e4e2c
Signed-off-by: Rishab Garg <quic_rishabg@quicinc.com>
We are seeing cam warning "cpas gdsc clk is on" and qchannel handshake
is failing on next power on. This will happen if some client want to
tunr on camnoc axi clk before turning off the gdsc clk in previous run.
CRs-Fixed: 3417264
Change-Id: I6927998cb47b7555e22c3d57b4c2f526adf62f34
Signed-off-by: Soumen Ghosh <quic_soumeng@quicinc.com>
This change adds support to read/write any sensor
devices that are on i2c, whether using cci or qup.
The debugfs file is mounted on i2c subdir under
camera root directory in debugfs.
Given that these devices are not always turned on,
and that this power on/off sequence is controlled
by userspace, this change displays all available
i2c devices, and their power states.
The user then can read/write to those devices which
are turned on, according to the following:
Usage:
- echo (anything or empty string) > i2c-rw
- cat i2c-rw then displays usage, and states of devices
- echo (proper r/w format) > i2c-rw
- cat i2c-rw displays output/error
Note that cat output is not persistent, it gets cleared
after displaying once.
CRs-Fixed: 3385104
Change-Id: I22023e0a8d9a680b5c8578cae2aa253c4c90226f
Signed-off-by: Li Sha Lim <quic_lishlim@quicinc.com>
when sequential register address present in register setting,
that can be combined as one I2C msg command and save some
Cycles. This lookahead is enabled by default, if it needs
to be disabled then we need to issue below command.
adb shell "echo 0 > /sys/module/camera/parameters/i2c_lookahead_en"
adb shell "echo 0 > /sys/module/camera/parameters/i3c_lookahead_en".
CRs-Fixed: 3418153
Change-Id: I0a63608316fe745e36a25e5206be6681da6aaa76
Signed-off-by: Lokesh Kumar Aakulu <quic_lkumar@quicinc.com>
Print CCI master-id & hardware-id on probe.
Print CSIPHY rx & timer clock rates once when clocks are enabled
and also prints on error trigger notification.
Change-Id: I4ecb1c7214d7482b157c3c1647e19743e8d90e17
CRs-Fixed: 3432375
Signed-off-by: illa lakshmi soujanya <quic_illa@quicinc.com>
Remove all instances of cpas camnoc reg read/write by clients.
Move cpas reg base enums to internal cpas file that is only visible
to CPAS usages, and create cpastop reg base macro in CPAS API file.
So, clients can now read and write to cpastop reg only.
CRs-Fixed: 3405131
Change-Id: I1793377a8b6f010bb2c79ac9020cfa3d21e31812
Signed-off-by: Sokchetra Eung <quic_eung@quicinc.com>
Optimize i2c and i3c table write to send all settings to QUP at once.
Previously we called QUP transfer API for every single register write
which caused latency
In current solution we write all settings to a buffer and send entire
buffer to QUP master by calling the transfer API just once.
CRs-Fixed: 3408965
Change-Id: I251360e36a2d304addd083abd5b02fb6ed7f4bbb
Signed-off-by: Ridhi Shah <quic_ridhshah@quicinc.com>
Update the AON cam id value to uint32 for csiphy driver.
CRs-Fixed: 3355901
Change-Id: I6f16cdc22c7dd0affc5e61f39cb783d2d67c39f9
Signed-off-by: Ridhi Shah <quic_ridhshah@quicinc.com>
Update SOC util to be able to parse multiple irq names from DT and,
request, enable, disable multiple irq lines per soc.
All IRQ lines per SOC will have the same handler but different data,
so ISR will have their own private data to differentiate source of irq
in the same handling function.
CRs-Fixed: 3395596
Change-Id: Id9ca1cd3ef105d732a82decd7c8078bd29668326
Signed-off-by: Sokchetra Eung <quic_eung@quicinc.com>
This change moves load report cmd in lock context,
then all sequence in one queue will be defined as
atomic queue commands without interruption from
the other queue commands.
CRs-Fixed: 3415571
Change-Id: Icda2271b580bd3f462c306ad0f229969a94079f6
Signed-off-by: Depeng Shao <quic_depengs@quicinc.com>
Tough sensor data rate is same for multiple camera sensors
still it'll depend up the mounting distance from sensor
to CSIPHY or SOC. Hence update datarate setting based on
CSIPHY instance.
CRs-Fixed: 3420314
Change-Id: Ie098b121394e241f360f9ae775bfd83b6bace15b
Signed-off-by: Lokesh Kumar Aakulu <quic_lkumar@quicinc.com>
Adding infrastructure to check OIS FW version before downloading
OIS FW to avoid downloading the same FW.
CRs-Fixed: 3383153
Change-Id: Ic92b62bfe2277eaba9b417a13201fabeab04383e
Signed-off-by: Yulei Yao <quic_yuleiy@quicinc.com>
Signed-off-by: Karthik Anantha Ram <quic_kartanan@quicinc.com>
This change is to call the tpg_hw_configure_init_settings_v3
function which is responsible for enabling clock and
resetting tpg clock in case of settings command config.
CRs-Fixed: 3406224
Change-Id: I17edb716074a121e12d04735166b3a0209a19359
Signed-off-by: Shivi Mangal <quic_smangal@quicinc.com>
Added log to print wq_name and callback info to understand
which task is delayed and to aid in debugging.
CRs-Fixed: 3381768
Change-Id: I74f1f5d3312c9163cfbafa4bc15a96c973ef2ba5
Signed-off-by: Karthik Dillibabu <quic_kard@quicinc.com>
Number of CCI masters index validation to avoid
out of bound array indices access.
CRs-Fixed: 3381768
Change-Id: I14d4a111cc5c7dab17d071446cddccd7651389a3
Signed-off-by: Abhilash Mahapatra <quic_abhmah@quicinc.com>
Configuring sensor pd to 1 for hfr usecase, then the setting
of sensor can reflect on next batch.
CRs-Fixed: 3376953
Change-Id: I4a78e087aec0e46f78f40ae8c37f1086125558de
Signed-off-by: Depeng Shao <quic_depengs@quicinc.com>
Change aon_camera_id to uint32 to read correct value from dtsi
Since more than one aon cameras are present.
CRs-Fixed: 3355901
Change-Id: I2a7723fa5b4f6c3a9a27d7119bdab2c65c4e620d
Signed-off-by: Ridhi Shah <quic_ridhshah@quicinc.com>
The current secure camera implementation suffers with a few
issues in terms of typecasting, error handling and in
populating the information in the right data structures when
the new SCM API is used on the targets without domain ID support.
In addition, we needed to be explicit in failing to acquire
if dual IFE is required in secure camera use cases as it is
not a supported feature as of now.
CRs-Fixed: 3317248
Change-Id: Idb762158b0ff0e0a0d6d51de4770fc3d9d9072c8
Signed-off-by: Vijay Kumar Tumati <quic_vtumati@quicinc.com>
Adds support for new mink call to configure secure
camera sessions. This new mink call takes in additional
parameters to support the new domain-id based
security scheme. The additional parameters are in the
form of csid_hw_idx_mask, cdm_hw_idx_mask and
vc_mask. These are in addition to the existing PHY idx
and CPHY/DPHY lanes info.
The introduction of this new mink call deprecates the
existing SCM call used to service secure camera sessions.
What this means is that on all subsequent versions of this
driver, all secure camera sessions will be serviced by this
mink call, which is able to accommodate older and newer targets,
and their programming of different register sets.
This design enables the cam_csiphy_notify_secure_mode
wrapper to remain the same, with the underlying mink call
made in the cam_compat layer, depending on camera driver
version.
CRs-Fixed: 3317248
Change-Id: I05511f4380ce5467b104675c07c9c8faa5318af8
Signed-off-by: Li Sha Lim <quic_lishlim@quicinc.com>
Mode switch delay is an inherent property of a sensor.
Similarly IFE has a static switch delay of 1. For sensors
with switch delay > 1 need special handling on certain
occasions. It is possible that switch settings was applied
to sensor, and on the next frame if there is a flash inject
delay or a packet delay, sensor & IFE are bound to go out of sync.
To address such cases, IFE will decide if it needs to apply
MUP on a dropped frame or not, along with any corresponding
IQ settings.
CRs-Fixed: 3320774
Change-Id: I355fa0f8b767d44bd3fb87c91b3cbf56fb9c3933
Signed-off-by: Karthik Anantha Ram <quic_kartanan@quicinc.com>
Update CSIPHY header for SM8650.
CRs-Fixed: 3335789
Change-Id: I79fed4330cd36e2b1464b9d5667678187a163cd1
Signed-off-by: Wang Kan <quic_wkan@quicinc.com>
Removing some dead code, the power info and
soc private are never used after assignment.
CRs-Fixed: 3376960
Change-Id: I0038cad043ea53ffd18d711f338e094ff0f919cc
Signed-off-by: Depeng Shao <quic_depengs@quicinc.com>
This change allows the tpg clock configuration to be directly picked
up from the get_tpg_clk_level function.
CRs-Fixed: 3376775.
Change-Id: I9a9ef232fd7f0c79c3f6683dc7838555dd02e3f2
Signed-off-by: Shivi Mangal <quic_smangal@quicinc.com>
This change allows the tpg hw register configurations to be directly
programmed from the tpg xml file. The regsettings array can be configured
with the right configurations for the required mode, if regsettings are
not provided in regsettings array. The settings are derived from the
stream configurations and global configurations.
CRs-Fixed: 3289930.
Change-Id: If44678475986efc0f26c334f5db4f9c59cd6873b
Signed-off-by: Shivi Mangal <quic_smangal@quicinc.com>
DW9784 needs Big endian type when QTime is written
into registers.
CRs-Fixed: 3359195
External Impact: No.
Change-Id: I6c141de255dbedb933ca5529f5ce4562d93a7c3a
Signed-off-by: Yulei Yao <quic_yuleiy@quicinc.com>
External dependency has been reverted, change not ready.
This reverts commit b76d66be06cb035886ddebbf7671e02c93fdd1af.
CRs-Fixed: 3317248
Change-Id: If82504f1eb22b1c908d08d256f3b4c4cbad60bc9
Signed-off-by: Li Sha Lim <quic_lishlim@quicinc.com>
Due to i2c driver remove call return value changed from int to void
from 6.1 kernel version.
CRs-Fixed: 3366233
Change-Id: I81713fdd65a53af37b0b9c573407587755bc1bae
Signed-off-by: Soumen Ghosh <quic_soumeng@quicinc.com>
UMD can send packet with READ or CONFIG opcode with req
id 0, if we update the last updated req for every packet,
then the res info may be updated incorrectly. This change
updates the last updated req only when there are valid
res info updating.
CRs-Fixed: 3359553
Change-Id: Ia08ccf7683b87378d00a5ae41e189a70a01cc0fc
Signed-off-by: Depeng Shao <quic_depengs@quicinc.com>
Adds support for new mink call to configure secure
camera sessions. This new mink call takes in additional
parameters to support the new domain-id based
security scheme. The additional parameters are in the
form of csid_hw_idx_mask, cdm_hw_idx_mask and
vc_mask. These are in addition to the existing PHY idx
and CPHY/DPHY lanes info.
The introduction of this new mink call deprecates the
existing SCM call used to service secure camera sessions.
What this means is that on all subsequent versions of this
driver, all secure camera sessions will be serviced by this
mink call, which is able to accommodate older and newer targets,
and their programming of different register sets.
This design enables the cam_csiphy_notify_secure_mode
wrapper to remain the same, with the underlying mink call
made in the cam_compat layer, depending on camera driver
version.
CRs-Fixed: 3317248
Change-Id: I575f4b85097c81f047f398216d0190b249e6b200
Signed-off-by: Li Sha Lim <quic_lishlim@quicinc.com>
On chipsets having cesta hw block support, for cesta supported clks
clk frequency can be changed during veritcal blanking based on
CSID DRV events. For this to happen, camera clients need to setup
high and low clock votes through hw clients. Use corresponding clk,
crm APIs to setup high, low clk frquencies and do channel switch
to apply newly set rates. Clients can also set clk frequency through
sw client which will set the floor. This feature helps in saving
power for usecases where vertical blanking is high such as
Fast Shutter usecase.
CRs-Fixed: 3294948
Change-Id: I1bcf650b439991a23b2a0f0f9a5162bdcd60dc64
Signed-off-by: Mukund Madhusudan Atre <quic_matre@quicinc.com>
Signed-off-by: Pavan Kumar Chilamkurthi <quic_pchilamk@quicinc.com>
This change adds bubble update packet support, when the
sensor mode or feature mask of bubble req is different
with last applied, we can use bubble update packet to
recovery the sensor mode and feature, then the bubble
req can get frame from correct sensor mode and feature.
CRs-Fixed: 3317352
Change-Id: Ia80b578044e74cc5062f9f6c12c5ae8edd2049ac
Signed-off-by: Depeng Shao <quic_depengs@quicinc.com>
Signed-off-by: Karthik Anantha Ram <quic_kartanan@quicinc.com>
Set ois state to config state only after init settings is
applied successfully, to avoid sensor power down is called
twice while init settings apply fail.
CRs-Fixed: 3332288
Change-Id: Ifdd407ea3c07eafc4091e2df354bc704ba6f0f7c
Signed-off-by: chengxue <quic_chengxue@quicinc.com>
Make MSM_CCI_RELEASE command can be executed even if CCI status is
negative. When IIC meets NACK error, CCI status will be set to
negative state. But in function cam_cci_core_cfg, if CCI status is
negative, then the command will not be executed, and the return value
of function camera_io_release is never checked, so we do nothing
even if cam_cci_release is not executed, if all MSM_CCI_INIT cmd
is executed successfully but one or more MSM_CCI_RELEASE cmd is not
executed, the streamon_clients of cpas will never be reduced to 0
and cpas will never be powered off.
CRs-Fixed: 3316756
Change-Id: I7f3d8d4e604f5a41983f1419ccc8b5817b199740
Signed-off-by: mingpan <quic_mingpan@quicinc.com>
Add 16 bit data read/write. Add new FW information
cmd parser. Add new FW download v2. Force CCI burst/
sequential write to be queued into Q0.
CRs-Fixed: 3322287
External Impact: No.
Change-Id: I8a1ea42b01a3748f466a9bc6083a799b939e6d02
Signed-off-by: Yulei Yao <quic_yuleiy@quicinc.com>
Removes logically dead code from various locations.
CRs-Fixed: 3325322
Change-Id: I2bfebbeb50cb6179bea8f02292027dab1d7f6e9b
Signed-off-by: Joshua Florez <quic_jflorez@quicinc.com>
Get slave address from user mode and update in i2c info structure.
CRs-Fixed: 3244380
Change-Id: I85bbe07927cfe072f2640cd632505fd6a168133c
Signed-off-by: Ridhi Shah <quic_ridhshah@quicinc.com>
This change is needed for domain id feature support.
When a PHY and its lanes for a particular CSID are
protected in a secure session, the same for other
unused CSIDs are to be protected as well. This is
to prevent other CSIDs from tapping the data streaming
onto those lanes if they share the same PHY.
For this, the clocks for other CSIDs (eg CSID-Lite)
need to be turned on. Given that the existing driver
turns on the clocks for the CSID in use, and that
this clock information is embedded within the CSID
hw blocks, these clocks are now exposed as optional
clocks to CPAS to enable the PHY driver to turn them
on during streamon for secure session.
CRs-Fixed: 3304650
Change-Id: I1415e78467208b6b4a74223521d964a199288857
Signed-off-by: Li Sha Lim <quic_lishlim@quicinc.com>
Add generic changes to support RGBIR, 3x3 and 4x4
XCFA from TPG XML.
CRs-Fixed: 3175994
External Impact: No
Change-Id: I129e20eb5db2bf2f168202f4854de62926eb613b
Signed-off-by: Rishab Garg <quic_rishabg@quicinc.com>
