Issue1: Driver RTPM state is ON/NONE, Kernel state is RESUMING.
cdp_runtime_resume is already complete,
hif_pm_runtime_get return -E_INPROGRESS,
dp_tx_hw_enqueue will set the flush event,
but cdp_runtime_resume is already done,
this flush event will be handled only on next pkt tx.
Issue2: Driver RTPM state: Resuming
hif_pm_runtime_get returns -EBUSY,
dp_tx_hw_enqueue is interrupted by any IRQ,
cdp_runtime_resume is completed,
dp_tx_hw_enqueue will set the flush event,
This flush event will be handled only on next pkt tx.
Fix:
Introduce a link_state_up atomic variable in hif to track the link state
change by pld_cb.
Set atomic variable link_state_up=1 in pmo_core_psoc_bus_runtime_resume
just after pld_cb. pld_cb brings the PCIe bus out of suspend state.
Set atomic variable link_state_up=0 in pmo_core_psoc_bus_runtime_suspend
just before pld_cb. pld_cb puts the PCIe bus into suspend state.
Introduce dp_runtime_get and dp_runtime_put.
dp_runtime_get get refcount with increment of an atomic variable.
dp_runtime_put return refcount with decrement of this atomic variable.
If hif_pm_runtime_get returns -EBUSY or -EINPROGRESS,
take the dp runtime refcount using dp_runtime_get,
check if the link state is up, write TX ring HP,
return the dp runtime refcount using dp_runtime_put.
cdp_runtime_suspend should reject the suspend, if dp_runtime_get is non
zero.
cdp_runtime_resume should wait until dp_runtime_get becomes zero or time
out, then flush pending tx for runtime suspend.
Change-Id: I5b97d50cba710082f117f3845f7830712b86cda7
CRs-Fixed: 2844888
CE7 is used for CV prefetch on QCN9000. Update documentation to reflect
the same.
Change-Id: I2da515ad3d88f07bbb69976e06d16f69cc443704
CRs-Fixed: 2853602
Currently if the driver is in runtime suspend/suspending
state, any packet transmission will request for resume
via hif_pm_runtime_get.
Unfortunately there is a logging in the above API which
will lead to more time consumption in the NET_TX softirq
context. This can lead to other delay in processing other
softirqs in the system.
Fix this by skipping the logging in the packet transmission
path.
Change-Id: Icc9f5b67794f7666243eb059f2e07a06a987002e
CRs-Fixed: 2844126
CONFIG_PCI_MSM will not be defined if MSM PCI driver is compiled
as a module, so if wlan driver invoke hif_pci_prevent_linkdown to
prevent linkdown, pld_wlan_pm_control() actually is not invoked,
result in Noc error due to inactive PCIe link.
PLD driver already abstract MSM specific feature, remove CONFIG_PCI_MSM
complilation flag in wlan driver.
Change-Id: Iaaf929a74b44ac94370f1d98b7aef7aaec308e0f
CRs-Fixed: 2850839
Add wake_irq_type in HIF layer for power management,
this helps in deciding to enable sync-up between
runtime suspend and wow resume in case of moselle.
Change-Id: I23a4d02d3ae7ec543a28174461996b84b18fd95d
CRs-Fixed: 2851265
Issue happens when
step 1: kernel pm core start to runtime suspend
step 2: host get wma_acquire_wakelock & send PDEV_SET_HW_MODE.
step 3: host send wow_enable cmd
step 4: wow suspend finished and wow resume happens as step2
send pm_runtime_get
step 5: fw dop PDEV_SET_HW_MODE as enter wow mode
so host can't get PDEV_SET_HW_MODE_RESP from fw.
Fix is:
Don't allow suspend if sending PDEV_SET_HW_MODE.
After change logical will be:
1 if PDEV_SET_HW_MODE before send hif_pre_runtime_suspend->
hif_runtime_pm_set_state_suspending, then wow suspend
will return failure.
2 if PDEV_SET_HW_MODE send after hif_pre_runtime_suspend->
hif_runtime_pm_set_state_suspending, it will request resume
and send after wow resume.
Change-Id: I91eea70f841cf9e5d6767f6005eb9662515657a6
CRs-Fixed: 2850561
In moselle, once wow enabled there is a possibility that wow wake
interrupt can be fired from FW during runtime suspend in-progress
in host, this will introduce a race between runtime suspend and
resume, so adding a synchronization between runtime suspend and
wow triggered runtime resume.
Change-Id: I38d6a24e4421697cc2d0090ba8d19884885596cb
CRs-Fixed: 2845672
Currently DMA mask for the device is set during hif_enable_bus.
If the datapath memory prealloc feature is enabled, there are
a few dma memory allocation which is done before the DMA mask
is set for the device. This leads to the aforementioned dma
memory pre-allocation to be attempted at the default DMA mask.
Due to this the entire device capability of dma address might
not be used.
Add hif api to set dma mask before hif is initialized. This
is needed to set dma mask in case of datapath memory pre allocation.
Change-Id: I6fd25d9cb6ab3aaacd6f959abe4e060e23f37095
CRs-Fixed: 2845020
RTPM wow resume gets triggered from ongoing WMI cmds related to SAP
getting started on the 5 GHz DFS channel. Even though PCIe link resume
is successful, there is a link up vote from UMAC and scn link suspended
state is not getting clear. Thus, clear the scn->link_suspended state
at the end of hif_pci_bus_resume_noirq() because before HIF PCIe bus resume
noirq phase is complete, PCIe link is already resumed.
Change-Id: If05593c95d2d63d271fed4abcf84b43e96cc070e
CRs-Fixed: 2833831
Whenever there is a recovery triggered, if there is a
failure in reading the bus id collect the bus specific
registers to understand the reason for the failures.
Change-Id: I7387d63d9205d24fd881824b9a9fac48a7816c73
CRs-Fixed: 2833331
Enhance athdiag to support 32bits HAL register address access. And support
the live dump mode to access the HAL registers directly using PCIE
interface.
Change-Id: I2322059e68b30ae47228e06dca01537b23ac2074
CRs-Fixed: 2831283
Excessive logging is detected when force wake request
command fails.
Rate limit the logs in hif_force_wake_request and
hal_write32_mb.
Change-Id: I9b1166074dfdb2d58d811571c802a75a6dbc03c5
CRs-Fixed: 2823961
Correct the address of ADRASTEA_PCIE_LOCAL_REG_BASE_ADDRESS
to support PCIE Global Reset for Genoa Chip.
This feature is only used at 3rd party platform which
do not support reset WLAN chip by toggle WLAN_EN pin.
To use this feature, please add
"CONFIG_QCN7605_PCIE_GOLBAL_RESET_SUPPORT" in makefile.
Change-Id: Ia75b567bd305d73d17a7cec3a39cbc36b1ae737d
Reducing the PKTLOG ring size to 128 as only USR_COMPLTN_FLUSH_TLV
alone is intended to be processed in this ring on a lowmem platform.
This is done only for IPQ5018 and QCN9000 to reduce the buffer
consumption
Change-Id: I82d3dd0286c97ea672b47613008c97dc6d5dce5c
Add bus related info in hif layer in order to get bus status
when hang issue happened.
Change-Id: If922e0892e0f65de778b9696bbc56fc63c25c169
CRs-Fixed: 2801350
Add apis to map generic registers to shadow region. Existing
logic includes mapping only srng based regs to the shadow
region.
Add support to map REO control regs and WBM2SW2 rel
ring HP reg address to the shadow region in case the direct
reg writes in IPA enable/disable autonomy fail due to UMAC
block being in a power collapsed state.
Shadow reg mapping for these regs is provided to FW during
init. Add stat shadow_reg_write_fail to track shadow reg
write failure and shadow_reg_write_succ to track successful
shadow writes.
Change-Id: I04790765a3de80047689657e2cad0b73123440b9
CRs-Fixed: 2790321
QMI bypass mode uses 2mb of of mem region for
fw uses. Current implementation does not free this
memory region when qmi bypass mode in enabled.
Free mem leak in qmi bypass mode.
Change-Id: Ie11aa9f20f93183e0b999cd6578aea4b231f8d8b
PKTLOG callback is not updated for Adrastea target as
htt_htc_soc_attach does not get called during initialization.
Fix pktlog pipe callbacks assignment for Adrastea target by
checking only CE_ATTR_INIT_ON_DEMAND attribute.
Change-Id: I16f2d2e493440315343087417a8d4c341065ae9a
Disable CE_ATTR_INIT_ON_DEMAND for CE5.
Currenly CE5 is used for other stats apart from pktlog.
When CE5 is configured as on demand its not initialised until pkltog
is enabled, but we still send stats to CE5 causing issue.
Change-Id: I286fcaf5c908028f5f42a0f4f91c810660ee6d11
Add support to dynamically initialize the CE for PKTLOG
and post buffers on demand.
This helps avoid unnecessary initialization of PKTLOG
ring and save the memory in lowmem platforms
Change-Id: Ib02153b3e7205be30b07e4a4763edf3374827328
QCN9100 pci radio is connected to the IPQ5018 through PCI slots
and enumerated by the Q6 radio. From the host driver perspective,
QCN9100 is treated as an AHB device, however the QCN9100 uses
MSI interrupts to notify events
-Reinitialize pci irq ops for hybrid bus type device qcn9100
-Update CE flags of qcn9100 to interrupt mode
-Set disable_wake_irq flag for qcn9100 as wake irq is not used
Change-Id: I8da7f0b48923b9d70e62f4ff181bd47865ea2fe8
Buffers attached to CE2 destination ring are of 4k bytes.
skb allocation for these buffers exceed 1-page allocation
due to addition bytes reserved for alignment, padding and
skb shared info.
Set the CE2 buffer size to 3200 bytes so that the skb memory
fits into a single page.
Change-Id: I97b3fc140376bb107ba23ab581a2dd5aeb833948
CRs-Fixed: 2785267
Increase CE2 host ring size to 512 for QCN7605 to avoid
ring full condition in FW in debug build.
Change-Id: I900611487696e3e83cd7adc72f10cd2cdcb15ead
CRs-Fixed: 2778941
Increase the num of entries in host side from 32 to 64
so FW can post more descriptors to host src ring
without hitting ring full condition. This is to avoid
back pressure issues in FW. The memory increase is
by 32*4K allocations.
This change is applicable to all HSP targets.
Change-Id: Ia973e13b9d9b2b682957ae19fc3f23dd49bef401
CRs-Fixed: 2761953
Currently we use a single timeout value of FORCE_WAKE_DELAY_TIMEOUT_MS
during hif_force_wake_request. A 50ms value is not enough in some cases
to bring MHI to M0 from M2/M3_fast states. This can result in a write
failure.
In certain cases, when not in an interrupt context, it should be okay
to wait slightly longer for MHI to transition into M0.
Hence, pass 0 as the timeout value to pld_force_wake_request_sync.
This API calls CNSS API which uses a blocking call - mhi_device_get_sync,
to transition MHI to M0, when a value of zero is passed.
Change-Id: I738bf9c4a9a83c943186445cba0174df18a45c74
CRs-Fixed: 2766674
In P2P GO mode, on system suspend to s2idle state, bus
is suspended and D0-WoW is enabled. Ping requests from
P2P client cause the REO interrupt to fire but since
system is in s2idle state, system is not woken-up. This
results in destination unreachability or large rtt for
ping on P2P client.
Fix is to do explicit system wakeup when group interrupts
fire after system is in suspend state.
Change-Id: Ic6f51c3fc8bad6da29adf58972890677a81f2064
CRs-Fixed: 2765037
For hif_bus_resume till now driver does panic whenever there is
failure. This is now handled in the cnss driver which will collect
the required dump to debug the link down.
Remove the bug_on, just log and return the status.
Change-Id: Ief4d86dd76c0bbde361b69b38894a944eec05aae
CRs-Fixed: 2765117
Update formate and index to traverse CE Latency stats circular buffer
and print them in more user readable format.
CRs-Fixed: 2676241
Change-Id: I7b3464cd00227dfcf98bbfa63a407055dd7cbf57
IRQ affinity for CE IRQs has been set to gold cores.
But affinity hint is not removed when freeing CE irqs.
Therefore remove affinity hint for CE irqs before freeing
them.
Change-Id: I7385a90955bc7e357badcd784e40d89022542d1a
CRs-Fixed: 2765373
In IRQ storm scenario, the events are logged to hif
event desc history even though the SRNG is empty
resulting in overwriting of older entries useful for
debugging.
Fix is to avoid recording hif events if the SRNG is
empty in IRQ storm scenario.
Change-Id: Id4161198c60f5fae31123c936f0f4acc1082a78b
CRs-Fixed: 2753675
hif_pm_runtime_prevent_suspend_timeout is no longer supported
and hence delete this obsolete API.
Change-Id: I2c01105219adb198bbf27aee5f2d5c7e357c1e34
CRs-Fixed: 2761022
For lithium based HST/HSP, CE4 is no longer used for data TX,
just few HTT msg for ring configuration, 2048 entries requires
16 * 2048 = 32K ring consistent memory which looks is not necessary,
reduce CE4 ring entries number to 256.
Change-Id: I117ec81cbee3642d640457c37a7ab900ddcae3f5
CRs-Fixed: 2757925
