Repurpose the IPA tx and tx completions rings for
normal use when IPA is disabled either via config
flag or ini.
Change-Id: Ia4b6a89c73d888a217bdef40e3c05435c3bb1bb2
CRs-Fixed: 3059730
Add fisa deletion support by invalidating the fisa
DDR entry when adding a new entry.
Change-Id: I02189e22e09ca0ef5e1fdb5952c7e72cd87d3673
CRs-Fixed: 2954060
Currently reg work is being cancelled in deinit path,
cancel work will remove all the pending work items
and wait for completion of current executing work.
But in reg work case even pending work items has to be
executed because we don't want to skip HP/TP values update.
To avoid this make sure all the pending reg work items are
flushed then disable the work for further queueing.
Change-Id: I2ba1e26cf41fb3b0c33ec584c56525cbfac94d8f
CRs-Fixed: 3065038
sw_exception bit will be marked in reo dest ring descriptor for
FW re-injected frame, get this bit and save it in skb->cb,
this bit value can be used for FISA further check.
there is no reo_dest_indication field in reo dest ring on beryllium,
so share same cb member for sw_exception and reo_dest_indication.
Change-Id: I2321121be7dda68ed19faca177d868c7e8ba1dbf
CRs-Fixed: 3056156
Add API to get dp peer authorize state.
Also modify dp_tx_get_rbm_id_li to update rbm for IPA offload
scenario
Change-Id: I0f8cca4623a1c3b840f336aa6d67740951cb6700
This FEATURE_HAL_DELAYED_REG_WRITE_V2 was added to fix the
Audio jank issue, but it could not resolve it completely,
so that was later fixed by existing delayed reg write
support with the help of SMP2P messages to communicate
with FW regarding PCIe link status. This code is not being
used, so removing it and cleaning up the redundant code.
Change-Id: Iada088e72a76b4c071c8a80ee945f36ac959670e
CRs-Fixed: 3056475
This change includes below
1) Changes needed to increase Tx rings to 4
2) Use WBM2SW4 ring for rx error in QCN9224
3) memset srng at alloc to avoid populating RBM_id
in per packet path and enable implicit RBM
Change-Id: Icbd5ac2378273b8f3c6adc41c611e29551fff22f
The multicast echo check feature is moved to hardware in
Beryllium. Enable this hardware feature and also disable
the MEC handing code for Beryllium in the host.
Change-Id: I86d319963191f3ed77aba16dcccbc659906edd9f
In Beryllium the HW does the ast lookup and match
and sets the intra-bss bit in the msdu_desc_info
structure of reo_destination ring and WBM Rx release ring.
So, change the Beryllium code to make use of this
hardware assistance for intra-bss.
Change-Id: Ic7c89efc741fefe35603082309204fbe3c9a97c7
Add big endian version of rxtlv structure. THis is needed since
the structure members are directly accessed by name and hence reverse
order of bitfields have to be defined in case of Big endian mode.
Change-Id: I50ce4bdd482a336ee8d2f394ed2de1a7ddf0be57
FW has some usecases when it needs to enqueue frames into hardware. In
BE WLAN chips, some hardware TX desc fields are moved into Tx
banks, hence a TX bank is also needed to queue to HW.
Dedicate a bank for FW usage.
Change-Id: I1f19f0ef85aff4c7592b0f07de4631259da743a6
CRs-Fixed: 3016828
Conditionally compile scan radio special vap stats.
Also rename spcl_vap to scan_spcl_vap to better reflect
funtionality.
Change-Id: I7d7f636209f6aa12cca0a3e808d7ae1fac9f397d
CRs-Fixed: 3009837
Below are the changes in HW headers for E1.5
1) WBM2SW release source enum changed back to lithium values
2) DSCP to tid table num is added in Bank register
3) MCAST ctrl value is moved from Bank to seperate register
Change-Id: I342c451d792b1618dcb62ca9d4c77dcf4d4beeac
In order to support flow overide feature,
AST table has to be split between RxPCU and DDR.
With this split, RX monitor cannot make use of
ast_index to fetch peer as it is not from DDR.
So make use of sw_peer_id to fetch peer.
This sw_peer_id is derived from RX_MPDU_STAT_START_TLV
Change-Id: Ib2a003a2640fded3287c318d2ad59fd3127af9b6
CRs-fixed: 3004363
-Add flag to inidicate special vap configuration
-Add frame type counters while processing tlv
WIFIRX_MPDU_START_E
-Add function to update special vap rx stats
-Add dp pdev param to enable/disable special vap
stats reset
-Add function to reset special vap stats
-Add fucntion to get special vap stats
-Add CDP function to retreive special vap stats
Change-Id: Ia5de6743e472dc86c9e66b9e789c909a57025e35
CRs-Fixed: 3005425
The following configurations are changed
- Change numer of WBM2SWRELEASE rings from 7 to 8
- Use configurable RBM value when enqueuing packets for TX. This is needed
since WBM release ring numbers do not have an easy mapping to RBM values
for HMT1.0.
Change-Id: Idcf9e48e00b7039331fc1837bb1e900b12f19eb3
CRs-Fixed: 2984362
In WBM error path, add handling for packets received with
rxdma_psh_rsn as rxdma_rx_flush. Also add assert for packets
received with an invalid push reason.
Change-Id: I4e445d52f00bbbdca358225aef488da0e8dccaa7
CRs-Fixed: 2978262
Initialize the last_desc_cleared pointer to -1 not 0, and
also fix the check it should always behind tp.
Change-Id: I281e066d45a99ac99d4f3c4e0bcc3f65f14bb589
CRs-Fixed: 2987029
HAL generic APIs which use HW definitons that
do not have same value across all lithium chipset
are moved to header files. So that these will be
compiled with appropriate header files
Change-Id: I6c167afa4212c5e884f5e18ff1ccb3bbbba8f5f5
For WCN7850, all the REO errors are supposed to be handled
by the APPS core. In accordance with this design, re-route
all the REO error frames to the APPS facing rx-error ring.
Change-Id: Id6f956a1459d318a5876696842ca87fa29e1e27b
CRs-Fixed: 2965087
Register, for WCN7850, the hal ops to get the
current PN for a packet from the tlvs.
Change-Id: I9fabc84aee318de2031bfa5f88dafe19b723079a
CRs-Fixed: 2965086
Currently the EAPOL/ARP/DHCP frames arriving as 2K-jump
or out-of-order frmaes are being delivered to the network
stack, without checking for the packet-number sequence.
WCN7850 has hardware support to provide the packet number
of the previous successful re-ordered packet from hardware.
Use this feature to check if the packet-number are in proper
sequence for these EAPOL/ARP/DHCP packets arriving as 2k-jump
or out-of-order packets before submitting it to the network
stack.
Change-Id: I1078452afce4bc00b2509436295e5bd80000feb4
CRs-Fixed: 2965086
Currently the hardware srng register offset is statically
assigned to the handle. This can lead to incorrect index access
when targets (eg: wcn7850) is added which require additional
register offsets to be stored in the hw srng register offset table.
Move to the index based assignment of the srng register offset.
Change-Id: I8e38bdd0c28068029a0267fce706edf4378b9df8
CRs-Fixed: 2965081