state handling changes were spread across multiple files.
So re-arrange all state related handling changes into
msm_vidc_state.h/.c file.
Change-Id: I3826daa678d1e2b5ce7e74380d465e70b1b824c6
Signed-off-by: Govindaraj Rajagopal <quic_grajagop@quicinc.com>
Re-structure video driver statemachine to use
event handler. Added event handler support for
event states.
Added change to handle event depending on the
underlying state implementation.
Change-Id: Ib55c12c6cadc4d780797a5aee75d5ea61e95c94f
Signed-off-by: Govindaraj Rajagopal <quic_grajagop@quicinc.com>
- add support to intialise device region by reading data from
platform to resources.
- add support for iommu_map and iommu_unmap apis.
- allocate a 4K page and send this address through
HFI_MMAP_ADDR register.
- map AON region, send virtual address and size as payload.
Change-Id: I5aa26593309a220c5de62836e432c1bd5a63ba1d
Signed-off-by: Darshana Patil <quic_darshana@quicinc.com>
- remove support of dynamic layer change for CBR
- remove support of layerwise bitrate
- any dynamic layer change request ignored without error for CBR_*FR cases
- layerwise bitrate is mapped to cumulative bitrate
Change-Id: I96c70fabd3c2bf94ce989b9e94620c166892b8e6
Signed-off-by: Ashish Patil <quic_ashpat@quicinc.com>
Added changes to support generic power domain and opp table.
This is an alternative for downstream regulator framework.
power domain can be enabled using below dtsi entries.
power-domains =
<&videocc MVS0C_GDSC>,
<&videocc MVS0_GDSC>,
<&rpmhpd SM8450_MXC>,
<&rpmhpd SM8450_MMCX>
power-domain-names =
"iris-ctl", "vcodec", "mx", "mmcx";
Power domain handles willbe parsed at driver side using below api's.
- dev_pm_domain_attach_by_name()
- devm_pm_opp_attach_genpd()
devm_pm_opp_attach_genpd() provides consumer virtual device handles
and i.e linked to core->dev using device_link_add().
MXC, MMCX rails wilbe powered up by scaling desired rate using
dev_pm_opp_set_rate().
Change-Id: I3d73434cb772078f031aec7cadc2d42ab930edd0
Signed-off-by: Govindaraj Rajagopal <quic_grajagop@quicinc.com>
Use reset control acquire/release api's with kernel version >= 6
as they were not exposed in previous kernels.
Change-Id: I2968fc50d77948c7f1a6f55be31360ad03971415
Signed-off-by: Maheshwar Ajja <quic_majja@quicinc.com>
update copyright markings to 2023 in all files.
Change-Id: I6842d56c4a8fff6a7a93d0c1d4bc049041297b02
Signed-off-by: Darshana Patil <quic_darshana@quicinc.com>
Use devm_reset_control_get_exclusive_released() instead of
devm_reset_control_get() to get the reset control of video_xo_reset
clock as it is shared reset clock between eva and video drivers.
Use reset_control_acquire() before assert and reset_control_release()
after de-assert video_xo_reset clock to avoid eva driver operating on
it in parallel.
Change-Id: I4936ed7a4556bb56d4b28546084fc877080308ef
Signed-off-by: Deepa Guthyappa Madivalara <quic_dmadival@quicinc.com>
Signed-off-by: Darshana Patil <quic_darshana@quicinc.com>
Makefile changes to include upstream driver specific files
for successful compilation of upstream driver.
Change-Id: I18b7d3324d49360b79104546df56b2d4f1fcbcd9
Signed-off-by: Dikshita Agarwal <quic_dikshita@quicinc.com>
Signed-off-by: Ankush Mitra <quic_ankumitr@quicinc.com>
Add database file for taro prepared based on upstream.
This file won't be compiled for Android builds.
Change-Id: I6804654b0574f4cc42d90278e4a022482c27ce99
Signed-off-by: Megha Byahatti <quic_mbyahatt@quicinc.com>
Signed-off-by: Dikshita Agarwal <quic_dikshita@quicinc.com>
Add logic to derive clock residency values for each
frequency levels.
Change-Id: Iadad29d2733cb083fce627999a31dd96475b73c1
Signed-off-by: Govindaraj Rajagopal <quic_grajagop@quicinc.com>
Fix the issue in pineapple CAP Database for
SLICE_DECODE.
Change-Id: I1b4dc51bbb23634aa372eba35b18ca9b6caada2d
Signed-off-by: Ankush Mitra <quic_ankumitr@quicinc.com>
Set mvs0c clock flags (force mem and pheripheral on).
Change-Id: I52380a30a4c74d9658f989377b5c77209cd8a33e
Signed-off-by: Maheshwar Ajja <quic_majja@quicinc.com>
- Implement upstream specific memory_alloc/map and
memory_unmap/free API based on standard dma_alloc_attr()
and dma_free_attr() APIs which allocates and map dma buffer.
- Combine alloc and map, unmap and free.
Change-Id: Ie85914beb72c3976febdc9e6a11c9199f2ea4192
Signed-off-by: Dikshita Agarwal <quic_dikshita@quicinc.com>
introduced core error state and added changes
to refine core state machine.
Change-Id: Ib3b94fd3798e902b7a6cfc5de45820558c89806e
Signed-off-by: Govindaraj Rajagopal <quic_grajagop@quicinc.com>
Introduced MSM_VIDC_CORE_ERROR state in core. It supports
CPU_WATCHDOG and VIDEO_UNRESPONSIVE core substates.
Change-Id: I6aa700c37782d64d64cd132ea13009dda22cc8d1
Signed-off-by: Govindaraj Rajagopal <quic_grajagop@quicinc.com>
Poll for AON spare register BIT(0) to become zero before
asserting XO reset from video driver to ensure CVP/EVA driver
is not asserting XO reset around the same time. Asserting
XO reset by both driver at the same time may result in
unpredictable behavior.
Change-Id: I71a0bd0175ef7701c9a855abbf3c2e741d937dfb
Signed-off-by: Maheshwar Ajja <quic_majja@quicinc.com>
For super buffer usecase, All the ETB's gets queued with updated
timestamp in hfi_buffer, therefore all the fbd's being recieved
are of different timestamp. And only the last EBD is considered
for dequeued flag and hence for remove_buffer_stat.
Therefore when first FBD arrives which has the matched TS to
the stat's TS will get skipped since last EBD in the batch has
not arrived yet and rest all FBDs are with updated TS, hence
the buffer stat doesn't get's removed from the list.
Modified the logic to add stats during hfi_buffer queue and
add stats for all sub-frames in super buffer usecase.
Modified the logic for Multi-In single-Out usecase as well.
Change-Id: I0643e6f64bdfc3cbfa67baeb1cf9157de92ce569
Signed-off-by: Vedang Nagar <quic_vnagar@quicinc.com>
This is change 2 of the Prepare dependency list without
parent change.
In this change we remove all parent information from
the CAP database.
Change-Id: Ie0b878050ae2d24e3c1a41cbd579ef0f19d42250
Signed-off-by: Ankush Mitra <quic_ankumitr@quicinc.com>
Prepare dependency list only using children.
Change-Id: Id79487825fed1f121821126589594b64820c85d3
Signed-off-by: Ankush Mitra <quic_ankumitr@quicinc.com>
Remove addtional mvs0c clock reset which is not
required from power off sequence
Change-Id: I2077cb0ceee6451cd2d2af067ac8a7be3335dd16
Signed-off-by: Deepa Guthyappa Madivalara <quic_dmadival@quicinc.com>
