Changes include support to correct the version
check for DP PHY changes for 4nm target.
Change-Id: Ib891d43bd5db10edc4b49a70f7a3b8af073167cd
Signed-off-by: Soutrik Mukhopadhyay <quic_mukhopad@quicinc.com>
Changes include support for 4nm DP PHY and DP PLL.
Added dp_pll_4nm.c file with register programming
sequences for DP PHY and PLL.
Change-Id: I104cf69964904c9a47a17e75a84df011d7994c9f
Signed-off-by: Soutrik Mukhopadhyay <quic_mukhopad@quicinc.com>
Changes include support for specific DP PHY
registers and related code changes for 4nm
target.
Change-Id: I9b349e47ff057421fa465a59e1206fd09f7e367a
Signed-off-by: Soutrik Mukhopadhyay <quic_mukhopad@quicinc.com>
If there are any uncleared DP interrupts before deinitialing
and turning off the clocks, the interrupt might get stuck at
the MDP level and can't be cleared without turning the DP
clocks back on. To avoid this situation, this change clears
all the interrupts before turning off the clocks.
Change-Id: Id13b102fa81c85f92ae8c1d11ffaf7d5bad5fd12
Signed-off-by: Rajkumar Subbiah <quic_rsubbia@quicinc.com>
HDCP authentication has strict timing requirements and if the
display is on static screen during this time, it is possible
that SDE removes the QOS vote when it detects static display,
thereby affecting the hdcp authentication process.
This change adds qos support in dp driver to vote exclusively
for DP. If valid QOS settings are provided in dtsi, then the
driver adds the vote when it starts authentication and removes
the vote when authentication is completed.
Change-Id: I1d8bc098d0857b13fdf1ca089b6dd2d3f381bdb8
Signed-off-by: Rajkumar Subbiah <quic_rsubbia@quicinc.com>
During an HPD, HDCP IRQ handler prints error log and exit
if HDCP state is inactive or authentication failure.
Inactive state is a benign error and auth failure will be
reported by hdcp kernel module. This change will downgrade
this error log to debug log.
Change-Id: I2a64e3c94a6661db70e93d07f5e3608202fe8871
Signed-off-by: Sandeep Gangadharaiah <sandgang@codeaurora.org>
During a probable race condition where usermode is triggering
a delayed cleanup, this instance would be empty leading to a null
pointer dereference. This change will add protection around this
pointer.
Change-Id: I8e90a1ba3ca925f08678e5fa67616420204edae7
Signed-off-by: Sandeep Gangadharaiah <sandgang@codeaurora.org>
If MST is enabled, the controller needs MST ACT to be
completed to successfully transition to 'Ready for Video'
state. The driver is sending ACT during the normal flow
when transitioning from link training to stream enable.
But it is not sending ACT, if a link maintenance is
triggered after stream enable. This change adds the ACT
update to the link maintenance call flow.
Change-Id: I7aea53a1e54202f1d9059a8eb59f01fa97fe9eb9
Signed-off-by: Sandeep Gangadharaiah <sandgang@codeaurora.org>
This change checks "dp_hdcp2p2" thread's parked state, before
attempting to park the thread. This would avoid a warning
message from the kernel module, in case if the thread is already
parked.
Change-Id: I3133da7159c9806981e4760be275c0a54036958b
Signed-off-by: Sandeep Gangadharaiah <sandgang@codeaurora.org>
When switching between 2 dongles/adapters it is possible
to have the same resolution with different link configuration.
Even though the pixel clock could be the same on replug, the
vco clock could be different depending on the link
configuration. Since the dp driver only exposes limited clocks
to the clock framework, in this specific scenario, the clock
driver is unable to recognize the change in source clock rate
and ends up skipping the clock reconfiguration.
This change adds support to park the pixel clocks on disable,
thereby forcing a reconfiguration on subsequent replug even
if the pixel clocks are the same.
Change-Id: If90b37d6285f6cad23cf1c11a7d6ccd6b4cf850c
Signed-off-by: Rajkumar Subbiah <quic_rsubbia@quicinc.com>
The divider value for vco clock is only dependent on the link rate
and is known during pll configure. Instead of depending on the
clock framework to program this divider as part of stream clock
enable, this change moves the configuration to pll configuration
and removes the set rate call on the vco clock.
Change-Id: If687a8ab057fdfd6c3b3ad2bd1c51663d9182ff4
Signed-off-by: Rajkumar Subbiah <quic_rsubbia@quicinc.com>
On an MST unplug, the MST topology manager state needs to be cleared
so it can properly destroy the current topology. But since the mst
active state is cleared prematurely in the driver, this call is
skipped and on a subsequent plug-in, the topology manager ends up
using stale topology from previous configuration. Incorrect RAD
values are used for sideband, causing them to fail.
This change fixes the order of operations, so the topology manager
state is properly updated on unplug. It also removes a duplicate
hpd notification to usermode.
Change-Id: Idcff17be113a361a0b58e54d85957f30d1d4e2d6
Signed-off-by: Sandeep Gangadharaiah <sandgang@codeaurora.org>
The parser is throwing warning for missing properties in device
tree, which might not be present in all variants. This warning
can be ignored and is downgraded as a debug log.
Change-Id: I1b3f6e9e3d21a0a84585ace4eba15710464d7b51
Signed-off-by: Sandeep Gangadharaiah <sandgang@codeaurora.org>
Commit Ie972a2e140adfd81c4e68df8e7bc69feaaca22e1 updated the dp
driver to extract the drm mode clock from timing parameters
instead of using the clock value provided by EDID to align the
behavior with DSI driver. But this results in incorrect clock
value if the refresh rate is not an integer value. For rates
such as 59.94 or 29.97, the calculated mode clock value would
be different from what is stipulated by EDID. This change
reverts the mode clock calculation to use the clock value
from EDID.
Change-Id: I3e192ef09d2456fbb1d22a0bf9474ac25ba86c72
Signed-off-by: Sandeep Gangadharaiah <sandgang@codeaurora.org>
Power on reset value of DPTX_CONFIGURATION_CTRL.ASSR (alternate scrambler
seed reset) is high. Which will cause link training 2 to fail with TPS4 pattern.
Change disables this before link training starts.
Change-Id: Iee95de04625658254b242afdcbba6db24a52606d
Signed-off-by: Vara Reddy <varar@codeaurora.org>
DP driver is requesting USB to release SS lanes very early
during bootup even before USB has fully initialized. As a
result USB driver is returning -11 which will abort DP state
machine. This change will allow DP driver to retry USB request
whenever this error code is received.
Change-Id: I144d16ef4b07016569ba9c04df15610fe3b5e6fc
Signed-off-by: Sandeep Gangadharaiah <sandgang@codeaurora.org>
In sim mode, the dp driver is not checking for the aux state before
processing an aux request. This ends up causing the drm framework to
unnecessarily wait for 4 seconds while destroying a stream.
This change adds the check for aux state to align with the behavior
of a real sink.
Change-Id: I81900018ac1b403bb1e03fe26206e145694fefbd
Signed-off-by: Rajkumar Subbiah <rsubbia@codeaurora.org>
This change adds support for reading the byte at specific DPCD
addresses for physical monitors, similar to the way it is already done in
sim mode.
The read address is taken to be the last written address. Reads return a
single byte unless the address is 0, in which case 20 bytes are returned
to preserve the original functionality.
Change-Id: I43c44d81758c156257bd5dba6bb8f9c08ac948eb
Signed-off-by: Alex Danila <eadanila@codeaurora.org>
Verify if DP stream is still active before accessing dp audio
registers. This would prevent a scenario where audio teardown
flow is trying to access dp audio config registers after dp
has completed the deinit process.
Change-Id: Icbcaa19529fc2fb34e079231c9ef24e15aa7e4f2
Signed-off-by: Sandeep Gangadharaiah <sandgang@codeaurora.org>
Handle host_ready failures and try to initialize host if not already.
Sometimes customizations for customers causes NOC error as host_ready
doesn't return early upon failure and the customer customization
tries to access aux register to reconfig upon aux failure while
reading EDID. Adding fix will make driver more robust to handle such
cases.
Change-Id: Ifa5c56daa32c4ef366a0e05718495ffcb40b96b3
Signed-off-by: Rajat Gupta <rajatgu@codeaurora.org>
Signed-off-by: Sandeep Gangadharaiah <sandgang@codeaurora.org>
DP driver, at probe time, checks for fsa probe completion by
registering a notifier callback. The fsa driver performs some
I2C operations at this time. But occasionally, it takes multiple
attempts to complete these I2C transactions,adding huge delays
to display driver probing.If this delay is long enough, then
display usermode services start before display driver probe completes
and as a result, it fails to enumerate any displays.
Since the fsa switch is needed only after an external display is hot
plugged,this change moves the fsa probe check to dp hotplug handler.
Change-Id: I1b592ec3921a0b406ca23142d07e1a7e8b72090e
Signed-off-by: Vara Reddy <varar@codeaurora.org>
Add safety checks to check for dp link and core clocks before accessing
the main control registers during dp teardown or dp setup.
Change-Id: Ic80050b7c1cec59d7fc27a1c5f12fa1b244f86fb
Signed-off-by: Vara Reddy <varar@codeaurora.org>
The mode validation logic in DP checks for 3dmux only if DSC is
not supported by the sink. It does not cover the case where the
sink supports DSC but there are not enough DSC blocks available.
In this case, it filters out all the modes even though some of
the modes can be realized with 3dmux or without 3dmux or DSC.
This change updates the logic to check for DSC first and if
that fails, disable DSC for the panel and look for other modes
that can be supported with or without 3dmux alone.
Change-Id: Ie0497333c77d8de30d126e701b5458f354897b8c
Signed-off-by: Rajkumar Subbiah <rsubbia@codeaurora.org>
Currently the DP driver always uses a compression ratio of 3, if
DSC is enabled. So if the sink supports 30bpp, the compressed
output is set to 10bpp. But since the hardware supports
compressing this to 8bpp, it would require less link bandwidth
than 10bpp compressed output. For compliance testing, the
test equipment limits the link bandwidth based on the most
efficient compression ratio and for some resolutions there
is not enough link bandwidth for 3:1 compression.
This change always sets the compression output to 8bpp to
minimize the link bandwidth utilization.
Change-Id: Ifa6129444c2bab4e9c357ddfe49f76efa5b04be0
Signed-off-by: Rajkumar Subbiah <rsubbia@codeaurora.org>
Updating the TU calculator to fix the formulas for the following
two use cases:
* 3.75:1 DSC compression
* Modes with RB2 (reduced blanking) timing.
Change-Id: I295e3fc252691a7fb42b610101da32c9f31d1855
Signed-off-by: Rajkumar Subbiah <rsubbia@codeaurora.org>
Currently edid cache is cleared only in the mst attention callback
flow i.e. if a monitor is plugged in/out of a mst dongle. If mst
dongle is plugged out directly, the edid cache is not cleared.
This change clears the edid cache also during the
connect/disconnect callback.
Change-Id: Icc4b4ca6a59f1ee32f7fe062831a3a19f4ab9f00
Signed-off-by: Sudarsan Ramesh <sudarame@codeaurora.org>
Signed-off-by: Sandeep Gangadharaiah <sandgang@codeaurora.org>
When calculating the maximum bpp that can be supported for the
link configuration and mode, currently the driver is not
accounting for the FEC overhead. When FEC is enabled, the
link bandwidth available for the video stream is reduced and
therefore it needs to be included in the calculation.
Change-Id: I41a664d739f369b17cff2ced7f88f5e90ee196f4
Signed-off-by: Rajkumar Subbiah <rsubbia@codeaurora.org>
FEC is a link specific configuration and should be configured before
the MST streams are enabled. Currently, the driver is configuring FEC
for each stream and in a case where the first stream is compressed and
the second stream is uncompressed, it enables FEC before the first
stream is enabled but ends up disabling FEC when the second stream is
enabled.
This change splits FEC/DSC configuration into separate functions and
skips FEC configuration for the second stream.
Change-Id: Ic1bab321dc77da7ec5c0253c93bb69735a217fd6
Signed-off-by: Rajkumar Subbiah <rsubbia@codeaurora.org>
The connector detect function is currently implemented as a
callback from the framework, and creates a context before
calling the detect_port_ctx MST callback. This change updates
the callflow so that the framework calls the new detect_ctx
function in the MST case. This removes the need for creating a
new context before calling further downstream functions.
In addition, references to the mst_connector_get_info
function were replaced by connector_get_info to avoid
redundancy.
Change-Id: I224d09e77fad4b6925a42b1bc912a05e3e4d060a
Signed-off-by: Sudarsan Ramesh <sudarame@codeaurora.org>
Logging connector id will help debug the issues related to
DP MST stability and pre-merge tests. This change will log
the DP MST connector IDs modified during stability tests.
Change-Id: Ifaf8e319697a809b02c24c473acec8da521286e2
Signed-off-by: Sankeerth Billakanti <sbillaka@codeaurora.org>
Check for pixel1 rcg only for mst supported platforms. On sst only
devices bind gets failed.
Change-Id: I73cc4a572d4d0791205c342f57618b226eb91fef
Signed-off-by: Rajat Gupta <rajatgu@codeaurora.org>
Currently, the max voltage swing supported is level 2. This change
adds support for voltage swing level 3 in the dp driver.
Change-Id: Idf1dbb4e74edff924067130a5edea869f392bf38
Signed-off-by: Sudarsan Ramesh <sudarame@codeaurora.org>
This change adds logic to determine dsc switch based on
the connector property "CONNECTOR_PROP_DSC_MODE" and
performs seamless DSC switch if there is any change in
DSC configuration. The connector property is populated
in msm_sub_mode based on which suitable mode is selected.
Change-Id: Ifc4931f16dfb814781bc1d72b103e09103e6bfee
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
In dumping display registers, physical address will be appended after
each block name. This is to support register compare between kernel
and UEFI.
Change-Id: Ic20d3e2bd4c95aa7c71c4b646a149f7e83ad731a
Signed-off-by: Yu Wu <zwy@codeaurora.org>
This change fixes a regression related to resetting the edid
segment and address when reading port edid introduced by
896cf4fd01 (disp: msm: dp: reset
edid segment and address when reading port edid).
Change-Id: Ie39fb9558d9f3206e4ded17b97018a966aab3a7c
Signed-off-by: Sudarsan Ramesh <sudarame@codeaurora.org>
