After freeing MST sim context memory the pointer isn't set
to NULL leading to unauthorized memory access. Along with
this fix, this change also defers checking sim device ports
pointer at a more appropriate place in the function call.
Change-Id: I20c09edbd454c9d491060815dc73bae34aab6b08
Signed-off-by: Sandeep Gangadharaiah <quic_sandgang@quicinc.com>
Fix the max crtc count based on the number of real layer mixers
available. Usermode can use the crtc count to derive the number
of layer mixers. This will be used in usermode to check if a new
DP/IWE/WB session can be supported by the HW, based on the existing
displays at that point. This will avoid atomic_check validation
failures in driver.
Change-Id: I63b033604ac549fc01bccef2a9320e0befab5926
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
Add changes to get drm object reference for connector and
remove out fb in dual display recovery case.
Change-Id: I1fd0c4818575b3f532d51ad41285031e8320c5fe
Signed-off-by: Raviteja Tamatam <quic_travitej@quicinc.com>
When encoder is disabled, demura is disabled since pipes
are disabled internally.
Change marks the features which were active and disabled
by driver as dirty so that it can be applied in the next commit.
Change-Id: I805d17d673a8ff41f9bdb18ba7f2fd185b5ccb5a
Signed-off-by: Gopikrishnaiah Anandan <quic_agopik@quicinc.com>
Expose the number of cdm blocks available through the connector
capabilities. Add CDM to the topology_control table, so usermode
can use the property to reserve the CDM block during modeset.
Additionally, fix a error code return during CDM block reservation
failure in sde resource manager.
Change-Id: Ib42ca4e8614076a8e5df77d8abc77a9e73674390
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
There is little sense in reading interrupt statuses and right after that
going after the array of statuses to dispatch them. Merge both loops
into single function doing read and dispatch.
Change-Id: I1259476549bcaf9f9f4e12591a7e182796e150dd
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Git-commit: 0abdba47dc1df708c365421d481734d3f7fecb01
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
Currently when disconnecting a secondary monitor, RSC will
transition to solver mode. If the bandwidth remains the same
for primary display, SW will not update BW indication register
causing stale TCS wait values.
This change forces a register update when RSC mode is
changed to solver mode.
Change-Id: I99d2332621bad75a7b6abdb64d6aedd35c30ca63
Signed-off-by: Amine Najahi <quic_anajahi@quicinc.com>
This change adds robustness to hpd notification by resending
it if there was no action in 2 seconds, just in case, the
first notification didn't make it to the usermode.
Change-Id: Iaf00669ec77e8c50618ee5618735a98518ad7f1a
Signed-off-by: Rajkumar Subbiah <quic_rsubbia@quicinc.com>
With real DP over Type-C sinks, DP driver requests access to USB
combo PHY from USB driver. But in DP SIM mode, there is no real
sink and PD management, so the combo PHY is managed by USB driver
and DP driver uses it without actually claiming it. If the USB
cable is unplugged in this scenario, USB driver notifies the
disconnection through an atomic notifier call. It does not expect
the handler to go into sleep, but the disconnect handler inside
DP driver has multiple wait for events and also sleeps to wait for
HW state updates.
This change passes a skip_wait flag to all the disable functions
to complete disconnect processing by skipping all processor sleeps
and event waits.
Change-Id: Ia98de0e7fa6b0573e644615ee59015914a93f4cf
Signed-off-by: Rajkumar Subbiah <quic_rsubbia@quicinc.com>
DP sim ports created during DP sim enable aren't cleared
during disable path. This would retain the last status of
the DP sim port or the connector. This would impact the
next iteration of DP sim test, if done without device
reset. This change will set the port number to 0 during
DP sim disable and clear the memory allocated for these
ports.
Change-Id: I386a62e87fcaf006db8dd18e5751b33bbe70fc9b
Signed-off-by: Sandeep Gangadharaiah <quic_sandgang@quicinc.com>
This reverts commit 14e7e9b409346aa77fd08cca6eab85252d9ccabe.
Reverting this for now until we properly understand the reason
for command transfer timeouts that we are hitting for 5k panel.
Change-Id: I0390af66f9ca06abc1ebb81996bb683dea35beac
Signed-off-by: Vara Reddy <quic_varar@quicinc.com>
This change adds a debug node named 'crc' to drm_dp to read
the frame CRC values for DP controller and DP Sink. In order
to facilitate the immediate read of the CRC values when
accessed, it enables the CRC calculation on the controller
and sink automatically when the stream is enabled. In addition
to the frame CRC values it also reads the MISR values from
controller and PHY to validate the data flow from controller
to PHY.
Change-Id: I1acee2dba931e4635caf4a400e336a72c86e88bf
Signed-off-by: Rajkumar Subbiah <quic_rsubbia@quicinc.com>
Use with the new connector state during validation phase for
checking the 3d-merge topology, since this is the state that
needs to be validated.
Change-Id: Ie212f948affa4dc439ef508363bac6713e560006
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
MDSS 9.0.0 supports 10 pipes, so modify the max_planes
accordingly. This is used for the frame_data transfer
between user/kernel and since its a new feature added
there is no backward compatibility that needs to be handled
for this uapi change. Add corresponding bound check during
the usage.
Change-Id: I0853fcc55395855d798f2c1b03cf9bf7b4bd3c96
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
This change skips msm_lastclose, when splash enabled builtin-displays
equals number of actual displays and are stuck in continuous splash.
It fixes the issue seen with change commit 548b17185e95
("disp: msm: send power_on event in dual display composer kill scenario").
Change-Id: I1f5417d8945db621dc20ab0a9cc0146eabae5e22
Signed-off-by: Jayaprakash Madisetty <quic_jmadiset@quicinc.com>
This patch cancels all the delayed_off_works if scheduled and flushes
the display threads for completion during msm_lastclose. The commit
from msm_lastclose client modeset to disable any crtcs if enabled is
always scheduled on primary crtc_commit thread. In the current issue,
delayed_off_work is scheduled on secondary display crtc_commit thread
and primary crtc_commit thread is scheduled to turn off active crtcs
from msm_lastclose leading to null dereference access of sde_enc's
cur_master. This race is avoided by serializing the operations in
msm_lastclose.
Change-Id: I30cc95b925c8134f0064816ebe2cfdb86a49fb36
Signed-off-by: Jayaprakash Madisetty <quic_jmadiset@quicinc.com>
Currently, driver is determining the amount of memory to allocate
based on the event log object indexes (first, last). The last index
can change if there is additional logging done during the coredump
phase and potentially cause an out-of-bound memory access during
buffer traversal.
This change restrict the event log object traversal to a maximum
of the output buffer size.
Change-Id: I91e5734362d2d7a796129fce85e27611bab2245f
Signed-off-by: Amine Najahi <quic_anajahi@quicinc.com>
Add validation during crtc_atomic_check to have crtc width as
multiple of 4 when dualpipe 3d-mux is enabled and multiple of 8
when quadpipe 3d-mux is enabled. This ensures each layer mixer
is having an even width.
Change-Id: I5dc173c1b0349430a8e12a7b1c9440c7854e7ecd
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
Avoid shutting down DSI PHY and lanes before entering into
idle collapse.
Change-Id: I62fb40c2398e544b08b8cb8788ac2dc1143a82ce
Signed-off-by: Shashank Babu Chinta Venkata <quic_schintav@quicinc.com>
DSI PHY has various resets defined to reset analog, PLL and digital
portions. In current sequence, these resets happen after PLL is locked
which can result in introduction of jitter on PHY lanes.Reordering these
resets to happen before PLL is programmed to have intended clean start
of DSI PHY.
Change-Id: I4eb5c05ea0e6015a5447728b2845b49817411c50
Signed-off-by: Shashank Babu Chinta Venkata <quic_schintav@quicinc.com>
Change increases cmd dma timeout to 1200 milliseconds from 200 milliseconds.
There are video mode panels which can support one frame per second, if pixel
data transfer is active, then our command transfer timeout should be atleast
1000 msec.
Change-Id: I3e8269febe3ed6e55ac9381a8de35e7d19fa3160
Signed-off-by: Vara Reddy <quic_varar@quicinc.com>
This change converts the ubwc stats roi into a blob property. This
allows for the roi data structure to be passed into kernel.
Change-Id: I4b30dcc16bcbd152428861444ff321add860942f
Signed-off-by: Nilaan Gunabalachandran <quic_ngunabal@quicinc.com>
Currently, dnsc_blur hardware block is not updated when the connector
dnsc_blur property is set to NULL or when dnsc_blur_count is 0. Update
the dnsc_blur hw block configs to avoid stale configs affecting the
current frame.
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
Change-Id: If64dc5548b03edba401fb7f40edf3419dbe57ca3
Change the debug message to error during the writeback
encoder validate for wb output buffer. The output buffer
can be NULL only during disable frame and all other frames
need to have a valid output buffer.
Change-Id: I4d6fecfeaf863e56fe25e17ab1200849003b3309
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
Currently regdump framework for all the DP domains are registered during
init. But, unlike other modules in DP each SWI module is controlled by
its own clock and cannot be read without turning on the corresponding
clocks. Trying to do so might lead to unexpected behavior. This change
removes registering these nodes.
Change-Id: Ib20d7212bde24f3858558009e1679661731d16df
Signed-off-by: Sandeep Gangadharaiah <quic_sandgang@quicinc.com>
When spr and demura init config function pointers are not null,
then only enable those features. For secondary panel in dual display
for trusted ui, these features will be disabled.
Change-Id: Idcbc672d9da62664bdbaa9489dbfac9f6ab80ec1
Signed-off-by: Alisha Thapaliya <quic_athapali@quicinc.com>
During MST scenario, plugging out all the downstream monitors connected
to the MST hub would trigger a disconnect handler which would cleanup
display structure. This isn't required since MST hub is still connected
and the display cleanup would be taken care during the actual MST hub
disconnect. Also, handling the disconnect immediately on port status
notification leaves the usermode in an invalid state where it assumes
the display is still enabled and results in commit errors.
Change-Id: Ia9a58fadd89bd05746da25f142b54b31e8567258
Signed-off-by: Sandeep Gangadharaiah <quic_sandgang@quicinc.com>
* origin/display-kernel.lnx.5.15:
disp: msm: dp: fix aux state during individual plug out/in
disp: msm: sde: Add scaler offset for de lpf
disp: msm: dsi: Enable TPG functionality
disp: msm: dsi: Avoid re-initializing PLL registers during dyn clk switch
disp: msm: sde: reset wb output crop during cwb disable
disp: msm: dp: destroy audio workqueue outside session_lock
disp: msm: sde: disable hw-fencing for commit before vm transition
disp: msm: dp: set DSC capabilities in mode only if panel supports DSC
disp: msm: dp: update DP aux state with correct status
disp: msm: dp: update debug message for mst conn id debug node
disp: msm: sde: fix cwb output res with DS & demura tap point
disp: msm: sde: fix UBWC stat error log format
disp: msm: sde: avoid PM suspend/resume if display has splash enabled
disp: msm: sde: add ctx_id to debug message in sde_fence_signal
disp: msm: sde: correct the sde vm release sequence
disp: msm: sde: add additional WB roi checks
disp: msm: sde: add check for layer-mixer width
disp: msm: sde: set connector lm_mask for dp display
disp: msm: sde: fix cwb lm allocation failures in RM
disp: msm: sde: proper allocation of dcwb for LMs
disp: msm: sde: fix dcwb idx selection for pp_dither and CTL blocks
disp: added environment variable for build.sh techpack display_tp
disp: msm: sde: update atomic check for VM_ACQUIRE state
disp: msm: sde: avoid null pointer dereference
drm/msm: don't allocate pages from the MOVABLE zone
disp: msm: sde: add wait on spec fences for hwfencing
disp: msm: sde: add tx wait for WB display during modeset
disp: msm: avoid cwb on esd recovery commit
disp: msm: sde: update uidle ctl register only for master encoder
disp: msm: sde: Fix data width calculation when widebus is enabled
disp: msm: sde: update encoder wait event timeout condition
disp: msm: sde: avoid clear_pending_flush on hw_ctl during power_on commit
disp: msm: sde: update atomic check for VM_REQ_ACQUIRE state
disp: msm: sde: force RC mask revalidation during mode switch
disp: msm: dp: get DSC enable status from mode instead of panel
disp: msm: sde: avoid ctl switch allocation in RM
disp: msm: change log level from error to debug for smmu cb not found
disp: msm: dsi: change hs timer control to fix timeout issue
disp: msm: sde: wait for active region only on DSI panel
disp: msm: sde: handle vsync wait status check during timeout
disp: msm: dp: add debug logs to ipc logging
disp: msm: sde: avoid demura layers validation against crtc w/h
drm: msm: update lfc config for demura
disp: msm: dsi: avoid DSI pll codes parsing in TVM
disp: msm: sde: add out of bounds check for dnsc_blur & wb cache
disp: add support to compile out display kernel module
disp: msm: sde: add support for display emulation on RUMI.
disp: msm: avoid crtc seamless check if active_changed is set
disp: msm: sde: override tearcheck rd_ptr_val when qsync is enabled
disp: msm: dsi: move warn to info if secondary panel is not assigned
disp: msm: dsi: turn on the PLL before switching RCG parent during clk on
drm: msm: allow opr_en in spr bypass mode
disp: msm: dsi: add missing dsi ctrl mutex lock in host timing update
disp: msm: sde: add missing validations for dnsc_blur
disp: msm: sde: add support for LUTDMA VBIF clock split
disp: msm: sde: log vblank timestamp in eventlogs
disp: msm: send power_on event in dual display composer kill scenario
disp: msm: dp: change display status log level
disp: msm: sde: add support for hwfence profiling
disp: msm: dp: update DSC resource book keeping for mst
disp: msm: dsi: pass DRM_BRIDGE_ATTACH_NO_CONNECTOR during bride attach
disp: msm: sde: add hw fence support for prog line count
disp: msm: sde: hw_fence update autorefresh disable sequence
disp: msm: sde: disable hw_fence for cmd/vid mode switch
disp: msm: sde: add fence ready in event log
disp: msm: sde: adds mem mapping for hwfence ipcc reg
disp: config: add hw fence configuration files for Kalama
disp: msm: sde: add support for hw-fence feature
disp: enable the msm_drm packing for auto builds
disp: msm: remove parsing deep color modes in sde parser
disp: msm: sde: add custom event to notify OPR, MISR value change
disp: msm: sde: toggle LLCC SCID for consecutive LLCC write
disp: msm: sde: add reg dma support for vig DE lpf
disp: msm: sde: update vsync soure as part of post modeset
disp: msm: Address static analysis issues
disp: msm: add augen3 configuration
disp: msm: dsi: Don't clear status interrupts while error interrupts toggle
disp: msm: dp: improve accuracy of mvid/nvid calculation
disp: msm: sde: fix precise vsync feature check
disp: msm: sde: add support for LLCC_DISP_1 SCID
disp: msm: sde: convert system cache boolean to feature bit
disp: msm: sde: log SCID during LLCC activation
disp: msm: merge flag of register and dbgbus
disp: msm: sde: enable vsync irq during sys cache read work
disp: msm: sde: change ubwc revision
disp: msm: dp: add ability to select pattern for tpg
disp: config: enable HDCP config for kalama
disp: msm: link HDCP sec-module as a dependency
Revert "disp: msm: dp: avoid duplicate read of link status"
disp: msm: dp: set drm device pointer in dp aux object
disp: msm: dp: update pll params with latest HPG values
disp: msm: sde: reset plane cache state on plane disable
disp: msm: sde: use LLCC_DISP for static display usecase with cwb
disp: msm: sde: enable LLCC_DISP_WB for kalama target
disp: msm: avoid rotator code compilation
disp: msm: sde: fix GEM object inactive list locking
disp: msm: sde: handle SSPP system cache for multi-plane scenario
disp: msm: dsi: parse panel ack disabled property for sim panels
disp: msm: sde: add line insertion support for sspp
disp: msm: add mmrm configs for Kalama
disp: msm: link mmrm module as a dependency
disp: msm: sde: fix sde_vbif_get_xin_status return value
disp: msm: sde: consider max of actual and default prefill lines
disp: msm: sde: disable autorefresh on encoder disable
disp: msm: hdcp: set default topology as DOWN_REQUEST_TOPOLOGY
disp: msm: dsi: Remove backlight operation during poms process
disp: msm: sde: address static analysis issues
disp: msm: sde: enable llcc in AOD mode
disp: msm: remove unused code snippet
disp: msm: sde: remove hardcoding of LLCC use case id
disp: msm: add capability to dynamically update the transfer time
disp: msm: sde: shorter idle-pc duration in doze mode
disp: msm: sde: add the DE lpf flag setting
disp: msm: sde: refactor _sde_encoder_phys_wb_update_cwb_flush function
disp: msm: dsi: add MISR support for ctl 2.2 version
disp: msm: sde: install default value for panel_mode property
disp: msm: sde: remove WB output buffer pitch alignment check
disp: config: conditional import of msm-ext-display symbols
disp: msm: sde: avoid null pointer dereference
disp: msm: optimize devcoredump read operation duration
disp: msm: sde: enable tui flag in catalog for kalama
disp: msm: sde: SID programming for new MDSS
disp: msm: sde: update HFC layer checks
disp: msm: sde: program master intf register for single intf
disp: msm: dp: add pll params table for 4nm PHY pll settings
disp: msm: sde: avoid null pointer dereference
disp: msm: sde: refactor dsi_display_get_modes function
disp: msm: dsi: mitigate errors on non-parsed regulator nodes
disp: msm: sde: use INTF mdp_vsync timestamp only for video-mode
disp: msm: sde: avoid slave encoder wait with ctl-done
disp: msm: fix WD timer load value calculation
drm: msm: add spr by pass support
disp: msm: dp: set the rates for clocks provided by DP PLL
update source and include paths for LE
disp: msm: dp: calculate mvid and nvid dividers with in DP driver
disp: msm: dp: PHY config update to align with kalama HPG
disp: config: enable msm_ext_display config for kailua
disp: config: enable dp compilation for kailua
disp: msm: link msm-ext-disp module as a dependency
disp: msm: dp: Add support for USB3 GDSC vote from displayport driver
disp: msm: sde: add check to avoid multiple active CWB
disp: msm: sde: fix the wd-timer-ctrl config for WD TE
disp: msm: add support for INTF WD jitter
disp: msm: display error log signature alignment
disp: msm: sde: set NOAUTOEN for sde irq to match with power event
disp: msm: sde: move sde power event call into kms post init
disp: msm: sde: update alignment check for dest WB fb
disp: msm: update sde rsc register offsets based on drv version
disp: msm: avoid BW_INDICATION write if BW does not change
disp: msm: sde: release splash memory using memblock_free
disp: msm: sde: drop suspend state if commit is skipped
disp: msm: sde: Enable demura tap point capability in cwb
disp: msm: sde: avoid error during fal10_veto override enablement
disp: msm: sde: update sde debugbus logging for vbif & dsi
disp: msm: sde: add uidle fill level scaling
disp: msm: update copyright description
disp: msm: sde: configure dest_scaler op_mode for two independent displays
disp: msm: dp: updated copyright set for 4nm target
disp: msm: sde: add support for DS2 and DS3
Revert "disp: msm: sde: consider max of actual and default prefill lines"
disp: msm: sde: Reset backlight scale when HWC is stopped
disp: config: correct the copyright markers
disp: msm: sde: fix UBWC decoder version support for Kalama
disp: msm: dp: avoid duplicate read of link status
disp: msm: sde: fix dnsc_blur mux setting for cwb
disp: msm: dsi: update vreg_ctrl settings for cape
disp: msm: fail commit if drm_gem_obj was found attached to a sec CB
disp: msm: dp: updated register values for 4nm target
disp: msm: sde: avoid ALIGN check on sde_dbg_reg_register_dump_range
disp: msm: dp: avoid dp sw reset on disconnect path
disp: msm: dp: use link clk khz when initializing mst mgr
disp: msm: dp: avoid duplicate read of link status
disp: msm: dp: fix configuration of aux switches and HPD sources
disp: msm: sde: Add a new major version of sixzone in Kalama for SB LUTDMA
disp: msm: dp: init DP catalog for kalama
disp: msm: dp: avoid return value check for certain debugfs functions
disp: msm: dp: remove unused header declaration
disp: msm: sde: update framedata event handling
disp: msm: dsi: Add new phy comaptible string for cape
disp: msm: sde: add DE LPF blend support
disp: msm: sde: Split PA sixzone lutdma implementation
msm: drm: uapi: Add uapi support for sixzone saturation adjustment
disp: msm: sde: software override for fal10 in cwb enable
disp: msm: sde: Update LTM merge mode setting for kailua
disp: msm: sde: Add support for LTM2/3 for kailua
disp: msm: update cleanup during bind failure in msm_drm_component_init
disp: msm: avoid using #ifdef for configurations
disp: msm: sde: parametrize RC minimum region width
disp: config: add kalama TUI configuration files
disp: msm: dp: remove dead code of "qcom,dp-mst-sim"
disp: msm: sde: update worst case time to execute one tcs vote for rsc
disp: msm: avoid use macro as vendor module guideline
disp: msm: sde: dump user input_fence info on spec fence timeout
disp: msm: dsi: optimize the display error log print
disp: msm: sde: add null pointer check for encoder current master
disp: msm: dsi: enable DMA start window scheduling for broadcast commands
disp: msm: add devcoredump support for sde_dbg
disp: msm: sde/dsi: reduce display cyclomatic complexity
disp: msm: sde: add debugfs for FAL1 and FAL10 config
disp: msm: sde: remove unsupported NV16 and NV61 YUV format
disp: msm: sde: avoid alignment checks for linear formats
disp: msm: reset thread priority work on every new run
disp: msm: sde: remove rgb/cursor pipe related code
disp: msm: dsi: add API for handling PHY programming during 0p9 collapse
disp: msm: dsi: add new PHY and PLL version files
disp: msm: sde: send power on event for cont. splash
disp: msm: use pm_runtime_resume_and_get instead of pm_runtime_get_sync
disp: msm: sde: update cwb block offset for kalama target
disp: msm: sde: add line-based QoS calculation support
disp: msm: sde: add offline WB QoS support
disp: msm: sde: update DT parsing for VBIF QoS remap levels
disp: msm: sde: update danger/safe QoS LUTs for landscape panels
disp: msm: sde: disable ot limit for cwb
disp: msm: sde: allow CDM access for all WB blocks
disp: msm: sde: always set CTL_x_UIDLE_ACTIVE register to "1"
disp: msm: use vzalloc for large allocations
disp: msm: sde: Add support to limit DSC size to 10k
disp: msm: sde: add tx wait during DMS for sim panel
disp: msm: dsi: add check for any queued DSI CMDs before clock force update
disp: msm: sde: correct pp block allocation during dcwb dither programming
disp: msm: sde: avoid setting of max vblank count
disp: msm: sde: add cached lut flag in sde plane
disp: msm: sde: avoid use after free in msm_lastclose
disp: msm: sde: update TEAR_SYNC_WRCOUNT register before vsync counter
disp: msm: dsi: Support uncompressed rgb101010 format
disp: msm: sde: update idle_pc_enabled flag for all encoders
display: driver: default post start if SBLUA DMA exist
disp: msm: sde: flush esd work before disabling the encoder
disp: msm: sde: allow qsync update along with modeset
disp: msm: dp: avoid dp sw reset on disconnect path
disp: msm: sde: consider max of actual and default prefill lines
disp: msm: ensure vbif debugbus not in use is disabled
disp: msm: sde: update cached encoder mask if required
disp: msm: sde: while timing engine enabling poll for active region
disp: msm: enable cache flag for dumb buffer
disp: msm: sde: disable ot limit for cwb
disp: msm: sde: avoid race condition at vm release
disp: msm: dsi: set qsync min fps list length to zero
disp: msm: sde: reset mixers in crtc when ctl datapath switches
disp: msm: sde: update vm state atomic check for non-primary usecases
disp: msm: sde: reset CTL_UIDLE_ACTIVE register only if uidle is disabled
Change-Id: I85622b3c2d491140558842b7640e918015d4edd4
Signed-off-by: Ashwin Pillai <quic_ashwpill@quicinc.com>
