Currently, changing panel configuration from firmware approach is present
for single display. This change adds support for secondary display using
firmware approach.
Change-Id: I8095dceed1567d8582c7473c0ac7f59c4666a200
Signed-off-by: Lipsa Rout <lrout@codeaurora.org>
This change adds support to program both qsync and variable
refresh rate in the same atomic commit. During vrr
usecase, if qsync is enabled, avr ctrl gets programmed
during prepare phase as well as after configuring timing
engine. This change also handles such scenarios to prevent
double programming of avr ctrl.
Change-Id: I19461423b0ae08c8204b5edeb98e3d73ce16a21b
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
Currently vblank enable/disable events are processed based
on the vm ownership check. Use the vblank helper functions
instead, during the transitions to avoid processing the
vblank from DRM framework level.
Change-Id: Icb2bd569e73d9206a234489a288320fecf631845
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
Add changes to extend the current evtlogs for ease
of debug purposes.
Change-Id: Ibe136afbf25b8b8decfc06ef3868e3f628df4dcb
Signed-off-by: Jayaprakash <jmadiset@codeaurora.org>
This change adds support to have same panel names for dual displays.
Without this change, the secondary panel bind will fail if it has the
same panel name as primary since the primary panel debugfs directory
would have been created during its display bind and when display bind
for secondary panel is initiated with the same name it will try to
create a debugfs directory with the same name resulting in bind failure.
This change appends a string as secondary in the panel name and creates the
debugfs directory.
Change-Id: I2bd25672ce0105a3b8225bbf17e13d4e373ad10b
Signed-off-by: Harigovindan P <harigovi@codeaurora.org>
Avoid crtc_state active_changed flag and explicitly check new/old
crtc_state active to decide if trusted vm transition checks are
required. As the active_changed might not be set at this point
in atomic_check sequence.
Change-Id: I142befad68359ae5ee862a1306bdc75531d63e70
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
Currently, in firmware approach, the panel node is null
for secondary display. As a result, the number of display
remains one, in case of dual display also. This change
updates the number of displays.
Change-Id: I4b945b8b94d931e0dedf7ca7b27cb1a288b9d6ab
Signed-off-by: Lipsa Rout <lrout@codeaurora.org>
The lane_count used for validating the display mode
to be set is wrongly taken from the initial panel
capability. So, when lane count is reduced during
link training, the reduced lane count will not be
considered for validating supported modes. Hence
reporting incorrect display modes.
This change will use the correct lane count which
is obtained after the link training sequence.
Change-Id: Iab6239280c29961f7bc6f945ff3ecee9954b0b73
Signed-off-by: Sankeerth Billakanti <sbillaka@codeaurora.org>
Upon receiving a CP_IRQ, the current implementation waits for up to 200
milliseconds for the link polling to be enabled, before reading the
message from the sink. This wait is currently done in the DP HDCP
module's main event thread. However, polling mode is also enabled in the
same event thread upon a wakeup triggered by the HDCP engine. This can
be problematic if the CP_IRQ comes before link has been transitioned to
the polling mode. Such a sequence of event is easily seen when executing
HDCP 2.3 CTS test 1B-09 using Unigraf UCD-400 test equipment.
To address this, wait for the polling mode to be enabled from the CP_IRQ
handler context directly and invoke the event thread only for reading
the CP_IRQ message after the link has transitioned to polling mode.
In addition to the above change, increase the wait time for link to
transition to polling mode to 300ms. This is needed because, in the
current implementation there is a fixed delay of 200ms as part of the
call to the QSEECOM API to enable encryption after the authentication is
successful.
Change-Id: I0bdd4893bf63e6ae0fcda5dfb61f23e901061207
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
Reinitialize video_comp completion variable before using it again
to wait for interrupt.
Change-Id: Ifc105eaa758d85ef604a440b3be7adfdafe7fc0f
Signed-off-by: Rajat Gupta <rajatgu@codeaurora.org>
We add support for Trusted UI (TUI) transitions and address the
following use cases:
1. Display was active before TUI start
- Power off on TUI start, power off on TUI stop
- Register access not allowed after TUI start (skip all
events except disconnect)
2. Hotplug while TUI is active
- Connect: skip sending connect uevent
- Disconnect: send disconnect uevent and skip any controller
programming
3. TUI start while processing HPD High
- Complete all connect work (and therefore any register access)
then send connect uevent
4. Audio
- Disable audio at TUI start and skip audio programming if TUI
is active
Change-Id: I553e5fa9f3b8265dd0410bf2d616a9accf90605f
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
Current implementation waits for 10ms prior to sending the connection
notification to user mode. This delay is to check for any potential
IRQ HPD event from the sink which may require a link maintenance.
However, this delay may not be sufficient for certain use cases.
Increase this delay to 150ms and modify the implementation to exit
the wait whenever an IRQ HPD is received. This ensures that we can
process the IRQ HPD in a timely manner as per the specification. To
further improve debug ability, add the support to configure this delay
though debugfs:
echo [delay_ms] > /sys/kernel/debug/drm_dp/connect_notification_delay_ms
Certain cables are unable to handle back-to-back HPD notifications and
may end up skipping some events. To improve interoperability, delay the
handling of disconnect notification. Sinks would typically issue an HPD
high following an HPD low only after they sense that the mainlink has
been torn down. Delaying the handling of HPD low would in turn delay the
issuing of the subsequent HPD high from the sink. Here again, make this
delay configurable through debugfs to improve debug ability of these
interop issues:
echo [delay_ms] > /sys/kernel/debug/drm_dp/disconnect_delay_ms
Change-Id: Ie29198af4dcda6d392798a3a93ebb3ddaa6746c8
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
Change decreases logs during a mode set in dsi_display and adds the
info to event logs.
Change-Id: I3bbe328f942008004c15b39230dd8be3e4cb64b5
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
Decrease the log level for messages that are typically printed from a
real time thread execution environment (such as the display commit
thread). This can help with cases where a console lock held during the
execution of these real time threads can result in RT throttling issues.
Change-Id: I41e1e4f171b5eee9966d8a7d26d64430a81bc6fc
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
This change enables system cache support for shima
target which allows sde to read image from system
cache instead of DDR memory during static display
for video mode panels.
Change-Id: I2d7e17c4a6f6b477acf84fd2914c8db2d83df286
Signed-off-by: Krishna Manikandan <mkrishn@codeaurora.org>
Current implementation checks for loss of channel equilization
or clock recovery only if the sink sets the link status updated
bit in the DPCD. However, it is possible that the sink can issue
an IRQ HPD to notify a link loss without setting the link status
updated field. Update the implementation to perform a link
maintenance whenever clock recovery or channel equalization is not
ok irrespective of whether the link status updated bit is set.
Change-Id: I2d765236b1e8ddae3c410087406546d0422cdf07
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
This reverts commit 9ce6a2fbb3.
Revert the change for sde_encoder.c, and keep the change for
sde_connector.c.
Change-Id: I19ff26e4543b9b338ccaf363c99c5eb2c115f99b
Signed-off-by: Zhao, Yuan <yzhao@codeaurora.org>
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
The file operation write expects a non zero return value for a
successful exit from the file op.
Change-Id: I5e956333f39c33708ba24e2722713484c613f0ee
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
Commit Ifa100424733 ("disp: msm: sde: delay
encoder disable for clone mode") delays the CWB
encoder disable but it is also skipping the CWB
disable flush. That can cause the underrun on dp
display if it uses the same 3d_merge HW block. This
change reverts the portion of original code and
only delays the last cwb frame done wait. It still
keep the last CWB frame done wait as it is if crtc
is also moving to inactive state.
Change-Id: I3461188a35197f2925899ceea7ef705adf00a398
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
Enure that ESD check doesn't result in a false negative while
booting up with a simulation panel or if TE based check is enabled
and panel switches it operating mode to video.
Change-Id: I62ff088f513d28d2883ce5a6d22f8bac1783fcd2
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
