Commit Graph

1582 Commits

Author SHA1 Message Date
Yashwanth
35b948550d disp: msm: sde: add null pointer check for encoder current master
During virt enable call, sde_enc master will be removed and
re-assigned. If an underrun is observed during this
scenario, it results in crash due to uninitialized access.
This change handles the above scenario.

Change-Id: Iec9e4a0bc4b763e44933334dacf82f1439eacc17
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
2020-09-08 10:00:31 +05:30
Chandan Uddaraju
7ef5f60e6b disp: msm: sde: release splash memory using memblock_free
The splash memory initialized by the bootloader needs
to be released after the first frame update. Add
memblock_free() call to release this memory that was
reserved during the kernel boot.

Change-Id: I2633305528b1767b87273d027b8a939da0cedfc4
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
2020-09-07 18:05:01 -07:00
Raviteja Tamatam
e3f6420cee disp: msm: add support to notify retire frame event
Added sysfs entry on crtc to notify a retire frame event
which indicates start of new frame. It is added at same
time of signaling retire fence.

Change-Id: Ie60aae96bd6e6bfb3cfe9db482cb59053f22383f
Signed-off-by: Raviteja Tamatam <travitej@codeaurora.org>
2020-09-08 02:12:28 +05:30
qctecmdr
8510269a39 Merge "disp: msm: sde: fix race condition in scheduler idle function" 2020-09-05 15:20:24 -07:00
qctecmdr
40bbd26775 Merge "disp: msm: sde: modify dsc blocks reservation check in RM" 2020-09-05 11:48:07 -07:00
Satya Rama Aditya Pinapala
03f9c40e7d disp: msm: add allowed_mode_switch blob property
The change adds a new mode property allowed_mode_switch. The new
property is a 32bit bitmask that indicates the modes each mode
can switch to. This change is required to pass the driver mode
switching capabilities, so that user mode can reject any mode switch
that is not supported by the driver.

Change-Id: I76d1733a07a6d57487ba9f461055270d7e60e060
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-09-04 17:58:46 -07:00
qctecmdr
5a5f61466b Merge "disp: msm: sde: add vote for trusted vm splash handoff" 2020-09-04 08:52:18 -07:00
qctecmdr
cdd14239fd Merge "disp: msm: sde: disable idle notification" 2020-09-03 21:41:46 -07:00
qctecmdr
09d24eeb43 Merge "disp: msm: assert nrt vbif halt req as part of rscc mode2 sequence" 2020-09-03 17:54:37 -07:00
Amine Najahi
ec1b93751c disp: msm: sde: fix race condition in scheduler idle function
Currently driver reads CTL status register before checking
pending kickoff counter. This can lead to a register access
violation when there is a race condition between the ESD and
commit thread.

This change checks pending kickoff counter before reading
CTL status register.

Change-Id: I5828b580c16d075df19eb349ee88d8b7da47941e
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
2020-09-03 20:45:47 -04:00
Abhijit Kulkarni
4f2c4ac27e disp: msm: sde: disable idle notification
This change disables sending idle notification if system
cache is already enabled. If system cache is enabled it
establishes that driver has already send prior
notification and no configuration change was requested.

Change-Id: I1aee002ab3c8c3d4193a8e7a4890d8e4f24da804
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
2020-09-03 15:11:19 -07:00
Abhijit Kulkarni
3db847b7bf disp: msm: sde: fix vblank wait after cache read mode update
This change fixes the vblank wait after system cache read mode
update. Without this change the wait does not happen since there is
no pending kickoff. This change uses encoder api to flush the
configuration and explicitly waits for vblank.

Change-Id: I8942f9b638e784c8fd9b5df33a9ccc7087a5eaef
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
2020-09-03 13:33:27 -07:00
qctecmdr
87f48f06fa Merge "disp: msm: sde: add event to event_list after register is successful" 2020-09-03 02:15:47 -07:00
Dhaval Patel
28826f09cf disp: msm: sde: delay encoder disable for clone mode
Clone WB encoder disable before posted start commit
trigger adds wb_wait delay in current frame trigger
sequence. This adds 1 frame jank if CWB enable/disable
path exercised periodically like 100ms or 200ms. This
change delays CWB encoder disable after frame trigger
and vsync/wr_ptr wait to avoid jank issue.

Change-Id: Ifa10042473397b37396d217d2410e7cf5a1e32a1
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
2020-09-02 13:24:16 -07:00
qctecmdr
352ce36959 Merge "disp: msm: sde: do DRM encoder NULL check before waking up display" 2020-09-02 10:29:20 -07:00
qctecmdr
153926f999 Merge "drm: msm: add dspp caps blob to crtc" 2020-09-01 14:10:14 -07:00
Lei Chen
ad0b79b8d7 disp: msm: sde: do DRM encoder NULL check before waking up display
DRM encoder can be NULL during modeset concurrency, so add this
change to check drm encoder and only wake up display when drm encoder
is available.

Change-Id: I50dd85eb39567aba4895dc19801020d7ead841b8
Signed-off-by: Lei Chen <chenlei@codeaurora.org>
2020-09-01 00:58:45 -07:00
Ping Li
9450155b4f disp: msm: sde: add event to event_list after register is successful
Add event to event_list after msm_register_event is successful to avoid
use-after-free vulnerability.

Change-Id: I144ae82c657c1e2cf16608c0e8768b12a7d27974
Signed-off-by: Ping Li <pingli@codeaurora.org>
2020-08-31 16:23:27 -07:00
Gopikrishnaiah Anandan
10e00393d8 drm: msm: add dspp caps blob to crtc
All sde crtc's are virtual when they are created. Resources for the crtc
is allocated when crtc is enabled. All crtc's will not have same
capabilities because some of the dspp blocks have additional hardware
blocks. Change exposes additional dspp capabilities dynamically when
crtc is allocated the dspp hardware block.

Change-Id: I93e76a1335574e4ca30d9419ef6cc6e8149e2c3c
Signed-off-by: Gopikrishnaiah Anandan <agopik@codeaurora.org>
2020-08-31 14:37:30 -07:00
Yashwanth
45d0998b96 disp: msm: sde: update misr check to configure misr in secure UI
This change updates misr checks so that misr can be
configured during secure display session. In the current
code, misr_reconfigure flag is set only when accessing
through debugfs node.

Change-Id: Ic3a8316a4881551da3f0f340f6ef5ae3fbe4913f
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
2020-08-31 19:38:51 +05:30
qctecmdr
6f85b051af Merge "disp: msm: dp: enhance trace and logging for mst" 2020-08-28 14:11:38 -07:00
qctecmdr
e2f4c767b9 Merge "disp: msm: dp: avoid use of mst_lock in hpd callbacks" 2020-08-28 11:49:24 -07:00
Rajkumar Subbiah
6ffa470809 disp: msm: dp: enhance trace and logging for mst
Enhance logging in dp mst functions by adding connector ids to
better identify operations for different streams and add more
trace logs.

Change-Id: Iaf5c67105c7af82fc5118674ddde5aef2319a611
Signed-off-by: Rajkumar Subbiah <rsubbia@codeaurora.org>
2020-08-27 17:50:28 -04:00
Raviteja Tamatam
2211a5dac3 disp: msm: sde: avoid registering vblank callback during CWB
During cases where vblank callback registration happens during
CWB is enabled and deregistered at point of no CWB, WB encoder
is left with dangling vblank_cb. Added changes to avoid registering
vblank callback on the clone mode encoder.

Change-Id: I62aa12ef453166d2f5558852d924f87841872f37
Signed-off-by: Raviteja Tamatam <travitej@codeaurora.org>
2020-08-27 13:41:41 -07:00
qctecmdr
e499ddf040 Merge "disp: msm: sde: Allow for overriding CP features flush mechanism" 2020-08-27 10:09:42 -07:00
qctecmdr
18aab79fa2 Merge "disp: msm: sde: fix check for uneven split with dest-scaler" 2020-08-27 10:09:42 -07:00
Amine Najahi
deae97dd0d disp: msm: sde: Allow for overriding CP features flush mechanism
Allow for overriding color processing features that normally uses
DSPP flush to use LM flush instead. This is required on targets
where some of the DSPP features have been tied to LM flush bits.

This changes adds a field in color processing node to track if the
override is needed and enables LM flush override for rounded corner
on target requiring it.

Change-Id: I584bd7b20dfc9fc7795b1b3b10e2f17a82945ce4
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
2020-08-26 22:20:05 -07:00
Jeykumar Sankaran
cbaca0039b disp: msm: sde: add vote for trusted vm splash handoff
Trusted VM adapts splash handoff path to acquire the same
set of HW blocks the tui display was using in the primary VM
before switching out.

To use the splash handoff path, Trusted VM should add an
additional vote to the PM so that refcounts will be remain
balanced after the splash path cleanup at the completion
of the first valid commit.

This change adds the needed vote and as a result cleans up
explicit voting from trusted vm commit paths.

Change-Id: I9eb33c364f1dfb4205547a8353f57b73c68b8af3
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
2020-08-26 12:31:22 -07:00
Sankeerth Billakanti
766b43bd13 disp: msm: dp: remove link probe from dp display driver
When resuming the video session from a source initiated power down, the
dp_display driver is doing a link probe again to override the previous
link information parameters. The link_probe is not accurately capturing
all the sink capabilities resulting in the link getting trained at a
different rate when resuming from a PM suspend or a secure display
session. The HBR3 support is indicated in the extended capabilities
DPCD registers which is not considered in the upstream link probe
implementation.

This change will remove the drm_dp_link_probe function from the DP
driver because it is not capturing the accurate DP sink capabilities.

Change-Id: I3c225cf825c826edd73592b18fae74c8b5b8236c
Signed-off-by: Sankeerth Billakanti <sbillaka@codeaurora.org>
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-08-25 22:33:28 -04:00
Harigovindan P
a976e8c7fa disp: msm: dsi: dual dsi constant fps porch calculation
This change adds porch calculation support to maintain
constant fps during clock switch for dual DSI controller.

Change-Id: I9a7e6d1f6d028355dba30aafe0234fc30c153059
Signed-off-by: Harigovindan P <harigovi@codeaurora.org>
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-08-25 22:23:45 -04:00
Ray Zhang
e380b315c6 disp: msm: do not print error when crtc state is empty
Sometimes committed state doesn't contain any crtcs. For example,
fbdev emulation is still pushing null commits to DRM even if the
cable has been plugged out. Avoid flooding the logs in this case.

Change-Id: I6b7f049b80409c4a2ae057839ede6dd8af10d03b
Signed-off-by: Ray Zhang <rayz@codeaurora.org>
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-08-25 22:20:43 -04:00
qctecmdr
4d3912297a Merge "disp: msm: sde: Add event logs for lutdma kickoff programming" 2020-08-25 17:46:17 -07:00
Ray Zhang
9fc2eec97a disp: msm: dsi: initialize display before request_firmware
dsi_display_init has to be called after dsi_display has valid
device info, so initialize it before calling request_firmware
in dsi firmware case.

Change-Id: Iec59882c776eb4bd19ce68d3ded052629c344d17
Signed-off-by: Ray Zhang <rayz@codeaurora.org>
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-08-25 19:15:37 -04:00
Ritesh Kumar
269ead80c7 disp: msm: dsi: Add support to keep display reset pin high
This change adds support to keep display reset pin high during
suspend state.

Change-Id: I8fab43d8f7b30fce72cc95277d016b72b914aa99
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-08-25 19:14:56 -04:00
Harigovindan P
25b6a3e7d1 disp: msm: dsi: Mask overflow error for Broadcast command
Currently, for Dual DSI Broadcast command, Overflow error
is masked only for master controller. This changes add
support to mask overflow error for slave controller as well.

Change-Id: Ida73c4166e996fcf2c8c936d0c76d0a89a220d89
Signed-off-by: Harigovindan P <harigovi@codeaurora.org>
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-08-25 19:14:29 -04:00
Harigovindan P
4a86b80a50 disp: msm: dsi: cphy constant fps porch calculation
This change adds porch calculation support to maintain
constant fps during clock switch for CPhy.

Change-Id: I74b2f0e064441fba7f452b06438ece7fe3b373eb
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
Signed-off-by: Harigovindan P <harigovi@codeaurora.org>
2020-08-25 19:13:56 -04:00
Harigovindan P
662ac3ab89 disp: msm: dsi: Add support for C-PHY dynamic clock switch
This change adds support for C-PHY dynamic clock switch feature.
Also add support for phy ver 4.0 C-PHY timing parameters calculation
to be used for clock switch.

Change-Id: I8292860fd8c93a7ba7988ec8c44ea9683f45b6e6
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
Signed-off-by: Harigovindan P <harigovi@codeaurora.org>
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-08-25 19:13:56 -04:00
Ritesh Kumar
998dec67d8 disp: msm: dsi: Skip soft reset during display disable
As per DSI HPG, Soft reset is not required to disable
video mode operation for version 1.3.0 and later. So,
add check to skip it during display disable.

Change-Id: If6d263bdf22f8a6fbef76d78d04bb9d11be05945
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-08-25 19:12:33 -04:00
Ritesh Kumar
fc571a94aa disp: msm: dsi: Update pll delay calculation as per latest DSI HPG
As per DSI HPG, pll delay should be 25usec for phy ver 4.0 and
100usec for phy ver 2.0 and 3.0. This change updates pll delay
calculation during dynamic DSI clock switch accordingly.

Change-Id: Ief5cbdc9304cf5ad025fe3bbe689b93834a1f710
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
2020-08-25 19:10:11 -04:00
Ritesh Kumar
a81e6a55fe disp: msm: dsi: Fix pll delay calculation during clock switch
During clock switch, Pll delay is calculated considering escape
clock to be in KHz. But escape clock is in Hz. This leads to wrong
pll delay calculation.

Change-Id: I616d16cc3d775a37e77c7c35bb860c23b1f9e37a
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
2020-08-25 19:10:11 -04:00
Rajat Gupta
9ea7fca99f disp: msm: dp: add support for diff values of pre-emp and swing levels
Update the DP controller and PHY programming to support different
values for pre-emp and voltage swing levels at different link rates.

Change-Id: I974c47cd1bf71b76dea4f270031a9cdfe320725e
Signed-off-by: Rajat Gupta <rajatgu@codeaurora.org>
2020-08-25 19:08:07 -04:00
qctecmdr
61234de0c5 Merge "disp: msm: sde: use the correct get_status op for all INTFs" 2020-08-25 15:26:37 -07:00
qctecmdr
d8ffbf3d39 Merge "disp: msm: dp: fix simulated hpd_irq handling for real monitors" 2020-08-25 12:01:32 -07:00
qctecmdr
f1b667341c Merge "disp: msm: add connector API to disable cont_splash resource votes" 2020-08-25 09:23:14 -07:00
Yashwanth
8a72802e89 disp: msm: sde: add rev check for scuba target
Add required sde revision checks for scuba target.

Change-Id: Ic3f0f8e2b182d0d68b2f5342043d3e12f0f35557
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-08-25 01:07:34 -04:00
Jayaprakash
d0d8918487 disp: msm: sde: add rev check for Lagoon target
Add required sde revision checks for lagoon target.
Also, update rscc branch offset for lagoon.

Change-Id: Id445caf6b584a6a35a4d9797e6d85aa9af9ee0bf
Signed-off-by: Jayaprakash <jmadiset@codeaurora.org>
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-08-25 01:07:29 -04:00
Jayaprakash
940830690a disp: msm: sde: modify dsc blocks reservation check in RM
Add changes to reserve dsc blocks by routing even numbered
dsc encoders to even pingpong blks and odd numbered dsc encoders
to odd numbered pingpong blks.

Change-Id: I9242b3f7a2784194f9e4a7d30eff6ae3ec16b196
Signed-off-by: Jayaprakash <jmadiset@codeaurora.org>
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-08-25 00:21:55 -04:00
Vara Reddy
f206b420c0 disp: msm: dsi: do NULL check before accessing controller node
Add NULL pointer checks, before accessing the controller node.

Change-Id: If24c4fd4352ef5ab7642c817ddaa61a80b725c99
Signed-off-by: Vara Reddy <varar@codeaurora.org>
2020-08-24 16:49:36 -07:00
qctecmdr
d90419b707 Merge "disp: msm: sde: fix index variable used in CP pu check phase" 2020-08-24 09:12:58 -07:00
qctecmdr
cc3f133167 Merge "disp: msm: sde: update rotator sid value in continuous splash case" 2020-08-24 04:01:01 -07:00