Commit Graph

70 Commits

Author SHA1 Message Date
Meng Wang
a8bd9abc48 asoc: lpass-cdc: add put_autosuspend to pair with pm_runtime_get_sync
When reading/writing lpass codec registers, pm_runtime_put_autosuspend
is missed when vote fails and it causes device fails suspending after
ssr. Add pm_runtime_put_autosuspend to pair with pm_runtime_get_sync.
When LPASS_CDC_MACRO_EVT_PRE_SSR_UP comes, core vote is needed before
resetting GFMUX reg and dev_up is not set to true yet. Add pre_dev_up
flag to indicate PRE_SSR_UP and be used in lpass_cdc_check_core_votes
to avoid false alarm.

Change-Id: Ic12ecd9645f291078e32f4921f9f77c2d85e4b8c
Signed-off-by: Meng Wang <mengw@codeaurora.org>
2021-08-08 19:49:27 -07:00
qctecmdr
043966829b Merge "asoc: lpass-cdc: Disable clk when core vote fails." 2021-08-06 21:14:44 -07:00
Aditya Bavanari
a415d7381d asoc: Return the correct clk_div value
Incorrect check for return value of clk_div_get
causes CLK_DIV2 setting being missed. Fix the
return value check to address this.

Change-Id: Ic1b6761ab836a38c657ac7e43efda0e2f23c5fee
Signed-off-by: Aditya Bavanari <abavanar@codeaurora.org>
2021-08-04 20:34:18 -07:00
Deepali Jindal
a7de3376f2 asoc: lpass-cdc: Disable clk when core vote fails.
During ssr, when powering down audio path and core vote fails, 
it directly exits without disabling clock. After adsp is up, 
it will enable both RX_MCLk and RX_TX_MCLK which causes
glitch on headset output.

Change-Id: I98d3cdbffa0a5ae1ac4064579a52a29b02d4ae3e
Signed-off-by: Deepali Jindal <deepjind@codeaurora.org>
2021-08-04 20:29:47 -07:00
qctecmdr
e28a044a67 Merge "asoc: lpass-cdc: update logic for va clk switch" 2021-08-02 20:56:04 -07:00
Meng Wang
f55dedc581 asoc: lpass-cdc: update logic for va clk switch
SVA switch is not retain at VA_CLK when switch
between handset and headset mic sva. Update the
clock release logic during swr power event.

Change-Id: I52c5f7576426af2ff385a862da872e8d86959ecb
Signed-off-by: Meng Wang <mengw@codeaurora.org>
2021-07-22 15:53:20 +08:00
Meng Wang
52aa968296 asoc: lpass-cdc: avoid enabling VA_MCLk when requested clk is not default clk
When requested clk is not default clk, it should not enable
VA_MCLk directly. lpass_cdc_clk_rsc_check_and_update_va_clk
will take care of VA_MCLK switch.

Change-Id: I602be7dcc0228fd2e6ecd7624a96663e89485bd0
Signed-off-by: Meng Wang <mengw@codeaurora.org>
2021-07-20 16:35:51 +08:00
Meng Wang
2344f44b9c asoc: lpass-cdc: add ftrace log for NOC issue
Add ftrace log to debug NOC issues.
When writing/reading lpass codec registers, add vote_lock
to make sure clk is not disabled.

Change-Id: I1df924d6aefee2899f7e5008851c1c324dabf62a
Signed-off-by: Meng Wang <mengw@codeaurora.org>
2021-07-13 23:16:45 -07:00
Meng Wang
aa18085092 asoc: lpass-cdc: remove broadcast for wsa-macro
When multi wsas are connected to wsa-macro and some registers
are written to wsa, swr broadcast mode is used. When closing
one wsa, it will also send the register write to the other wsa
and it should not get updated. The other wsa will be in bad
state.
Remove broadcast for wsa-macro to resolve this issue.

Change-Id: I4c788a213fdcd217861703a13d44c096fd9b632d
Signed-off-by: Meng Wang <mengw@codeaurora.org>
2021-07-13 09:08:55 +08:00
qctecmdr
74848e76fe Merge "asoc: lpass-cdc: call runtime_suspend when vote fails" 2021-07-11 18:50:26 -07:00
Meng Wang
7fea7ac663 asoc: lpass-cdc: call runtime_suspend when vote fails
During adsp SSR, after adsp is down, lpass_cdc_runtime_resume
is called in va-marco and fails. lpass_cdc_runtime_suspend is
not called 100ms later. After adsp is up and va-macro considers
lpass_cdc is resumed and not setting clk which causes wcd not
detected. Call runtime_suspend when vote fails to resolve
the issue.

Change-Id: Ice398d0168c5c67f6c98e3122af507ca74837175
Signed-off-by: Meng Wang <mengw@codeaurora.org>
2021-06-28 13:10:48 +08:00
Junkai Cai
29cda5976d asoc: lpass-cdc: update WSA/WSA2 cooling option policy
cooling of WSA/WSA2 is to reduce the digital gain.
the cooling callback should only be called when the WSA pointer
has not been initialized.
Also the adjusted volume of RX0 and RX1 need to be set separately.

Change-Id: I6aac0e7a3a3219e8b5c24d711a6c7773824827e9
Signed-off-by: Junkai Cai <junkai@codeaurora.org>
2021-06-27 12:18:45 -07:00
Junkai Cai
9107dae9d8 aosc: codecs: set mclk flag false when mclk is disabled
the dapm_mclk_enable flag has not been set back to false
when the actual mclk is disabled.

Change-Id: Ic04756b3dcd074887dd1e93f23cf31873abc1428
Signed-off-by: Junkai Cai <junkai@codeaurora.org>
2021-06-27 12:00:04 -07:00
Meng Wang
99b86b9f62 asoc: lpass-cdc: update DMIC clk when WCD DMIC is selected
When WCD AMIC is used and connected to SWR master port3,
DMIC clk div is updated by mistake. Update logic to update
DMIC clk DIV with new flag.

Change-Id: Iee01acf97f925ec54c8d189c13e63acca7ffc2f4
Signed-off-by: Meng Wang <mengw@codeaurora.org>
2021-06-16 01:51:57 -07:00
Junkai Cai
751d49a88b asoc: lpass-cdc: reduce WSA digital gain when cooling is enabled
The digital gain will be adjusted lower than what userspace set
during playback if the device temperature reach the threshold.

Whenever digital gain is changed from userspace, codec will check the cooling
state and adjust the gain.

Change-Id: I52df0f96cf20b90a9bdad70b9c117eed82145fb2
Signed-off-by: Junkai Cai <junkai@codeaurora.org>
2021-06-07 05:14:17 -07:00
Vidyakumar Athota
6a50edfffc Revert "Revert "asoc: lpass-cdc: Do not update VA clk muxsel register""
This reverts commit a108d5c2bb.

Change-Id: Ie7d2bc6b05c62dff251cd80b2a4e81670e43108d
Signed-off-by: Vidyakumar Athota <vathota@codeaurora.org>
2021-06-02 20:21:04 -07:00
Meng Wang
a108d5c2bb Revert "asoc: lpass-cdc: Do not update VA clk muxsel register"
This reverts commit 57fa62e292.

Change-Id: I1afb0d2f7495d3b30fc99bb4391eda094921fa89
Signed-off-by: Meng Wang <mengw@codeaurora.org>
2021-05-27 09:15:15 +08:00
qctecmdr
798c3db8d9 Merge "asoc: lpass-cdc: Update core voting before gfmux access" 2021-05-25 20:42:48 -07:00
Laxminath Kasam
5a96e4bc5b asoc: lpass-cdc: Update core voting before gfmux access
GFMUX access in va clock supported in lpass-cdc v2p5
onwards. Ensure add core voting before access.

Change-Id: I36c8db86a2e7f265ab293dd6cd1f1ee3ac7722a5
Signed-off-by: Laxminath Kasam <lkasam@codeaurora.org>
2021-05-24 01:45:01 -07:00
Meng Wang
57fa62e292 asoc: lpass-cdc: Do not update VA clk muxsel register
Because of a HW limitation in DSP, while switching
RCG from TX MCLK to VA MCLK for SVA use cases
a glitch is seen on AHB bus leading to data
corruption in registers.
So, while doing a mux switch for VA RCG clock selection,
do not configure the muxsel register in HLOS as it is
taken care in DSP itself as a workaround for HW limitation.

Change-Id: Ie36ff239689e634f5c29ad03b343b95de2d12547
Signed-off-by: Meng Wang <mengw@codeaurora.org>
2021-05-24 09:21:56 +08:00
qctecmdr
43c99c7f0a Merge "asoc: lpass-cdc: disable clk when they are enabled" 2021-05-22 11:31:19 -07:00
Meng Wang
cc0d0bf564 asoc: lpass-cdc: disable clk when they are enabled
Check if clk is enabled before disabling it to avoid
warning log during adsp SSR.

Change-Id: I916af6f9efacfe3d08e0b05dcc0c6023944369d2
Signed-off-by: Meng Wang <mengw@codeaurora.org>
2021-05-18 08:38:24 -07:00
Soumya Managoli
afde3b3eb2 asoc: bolero: Update PCM_RATE based delay for amic
The PCM_RATE bit field in LPASS_TX_CDC_TXn_TX_PATH_CTL
ranges from 0 to 6.
In the current implementation of tx-macro, the value
read is mapped directly to the sample rate instead of
the indices. Change is to correct this.
Add the delay based on pcm_rate in va-macro as well.

Change-Id: I6cb7e58e71f2a25356608611f1dfed83171706f6
Signed-off-by: Soumya Managoli <smanag@codeaurora.org>
2021-05-17 06:03:13 -07:00
Junkai Cai
b5edf3ad18 asoc: lpass-cdc: update sequence of HIFI FIR coeff number
The number of HIFI FIR coeff will not be retained if power collapsed,
need to be written right before FIR_START is kicked off.

Change-Id: I034949eb7748f8b2e5b21445fa10f4f1df66a7bf
2021-05-08 08:48:19 -07:00
Linux Build Service Account
48f26271e5 Merge "asoc: lpass-cdc: Support up to 200 coefficients for HiFi FIR" 2021-05-02 22:55:46 -07:00
Linux Build Service Account
0ad49f6f8a Merge "asoc: bolero: update incorrect bolero register" 2021-05-02 22:55:45 -07:00
Linux Build Service Account
e5940a24c3 Merge "asoc: lpass-cdc: Update default tables as per v2p5" 2021-05-02 22:55:44 -07:00
Linux Build Service Account
03011b6324 Merge "ASoC: update channel map for rx multi codec usecase" 2021-05-02 22:55:39 -07:00
Junkai Cai
2df3cd8d48 asoc: lpass-cdc: Support up to 200 coefficients for HiFi FIR
Previously code will not write coefficients if there are exactly 100 coeffs
in first coeffs write. Or if user update coeffs on the fly with one group
unchanged.

Change-Id: Id4e8af06dec6b247f4a79a797d5b61668fd1e7f4
Signed-off-by: Junkai Cai <junkai@codeaurora.org>
2021-04-29 11:00:33 -07:00
Linux Build Service Account
ccc1bcc38e Merge "lpass-cdc: rx-macro: AUX path has no compander support" 2021-04-29 04:03:23 -07:00
Laxminath Kasam
05e8d4faa8 asoc: lpass-cdc: Update default tables as per v2p5
Update regmap default entries of spk protection
registers as per lpass cdc version 2p5.

Change-Id: I7c966eb3edbe9a9c065c03220ef2b9390b1fc723
Signed-off-by: Laxminath Kasam <lkasam@codeaurora.org>
2021-04-27 14:20:03 +05:30
Junkai Cai
647c4b4898 ASoC: added WSA2 support on targets with more than two spkrs
Add wsa2 backend dai links only in platforms
which has 4 wsa speakers.

add 2 to the device index parsed from hardware device id
of wsa slave to match the dai names in the msm_dailink.h

Change-Id: Iffe43842123526f4925f9d5bcd8dff0317bac7a7
Signed-off-by: Junkai Cai <junkai@codeaurora.org>
2021-04-26 13:29:01 -07:00
Laxminath Kasam
01756036b5 asoc: lpass-cdc: Update swr pdev initialize order
During sound card register init call, if swr pdev
is not initialized yet respective soundwire port
config is not updated to soundwire controller device.
In macro drivers, update swr pdev into macro private
data prior to platform device add.

Change-Id: Ifa67471cfc7a10b102b573df6285e598bb0b5e5e
Signed-off-by: Laxminath Kasam <lkasam@codeaurora.org>
2021-04-26 07:50:25 -07:00
Meng Wang
195771b877 asoc: lpass-cdc: update correct offset for compander and softclip
Update correct offset for compander and softclip.

Change-Id: Ic4071a25911db0c6c57d550e98d63e663354f62d
Signed-off-by: Meng Wang <mengw@codeaurora.org>
2021-04-26 05:47:12 -07:00
Meng Wang
f3aa1cddc4 asoc: bolero: update incorrect bolero register
Update incorrect bolero register for default value.

Change-Id: Ifa14f3b5dd73971e5c6b15ab58f70074b3a74408
Signed-off-by: Meng Wang <mengw@codeaurora.org>
2021-04-26 05:47:04 -07:00
Junkai Cai
b7e259a57b asoc: lpass-cdc: Add support for HiFi FIR filter
Enable HiFi FIR PCM filter on digital codec to support HiFi audio playback on headset.

Change-Id: I5bc03ed45a3fd149c93dc04f33be0a581b519d44
Signed-off-by: Junkai Cai <junkai@codeaurora.org>
2021-04-22 20:22:49 -07:00
Laxminath Kasam
24b73c6fb5 lpass-cdc: rx-macro: AUX path has no compander support
Return from config compander during aux path powerup
as aux path compander is not present.

Change-Id: I5ed1557dddfb64c8712d92c75fd58aa98b96355d
Signed-off-by: Laxminath Kasam <lkasam@codeaurora.org>
2021-04-21 17:07:31 +05:30
Linux Build Service Account
c979dac299 Merge "asoc: lpass-cdc: Update ch_mask for wsa2_macro" 2021-04-21 01:36:12 -07:00
Meng Wang
d5cfb617e3 asoc: lpass-cdc: update correct offset to set IIR1 registers
Update correct offset to set IIR1 registers to make sidetone work.

Change-Id: I94cc7f54c5d68954565d683aee0d3e887eebedb3
Signed-off-by: Meng Wang <mengw@codeaurora.org>
2021-04-21 00:35:23 -07:00
Laxminath Kasam
fefa2893b5 asoc: lpass-cdc: Update ch_mask for wsa2_macro
Update ch_mask of WSA2 macro to return based on
4-channel DMA support.

Change-Id: Iea4800dc85bf6bf1d250dfca214c58925ea328ab
Signed-off-by: Laxminath Kasam <lkasam@codeaurora.org>
2021-04-21 00:35:20 -07:00
Meng Wang
06e614b09f asoc: move some kernel headers to vendor SI
Move some audio kernel headers to vendor SI.

Change-Id: I41df0cdb2789359e1fded84ec0bf6c30eaa4a25f
Signed-off-by: Meng Wang <mengw@codeaurora.org>
2021-03-24 14:10:02 +08:00
Meng Wang
932b967501 asoc: lpass-cdc: remove old lpass cdc version check
lpass-cdc only support new codec after 2.5 version.
Remove old lpass cdc version check.

Change-Id: I54a53edf5bdb92f78b43d96e9413f64b0e06c306
Signed-off-by: Meng Wang <mengw@codeaurora.org>
2021-03-22 18:25:40 -07:00
Laxminath Kasam
c5500dc6dd asoc: lpass-cdc: Add support for ADIE RTC for version 2p5
Add LPASS-CDC version 2p5 for version read.

Change-Id: I2c9fe054d18fb9f2521c0d007c1736ade31ff24b
Signed-off-by: Laxminath Kasam <lkasam@codeaurora.org>
2021-03-22 08:52:39 -07:00
Vatsal Bucha
ea36f4ea68 asoc: codecs: add child devices after completing initialization
In va, rx and wsa macros, move schedule_work call to
add the child devices to the point later to where the parent
initialization gets completed.

Change-Id: I2095f1007beae253534b2ed44f988ce55fad6b75
Signed-off-by: Vatsal Bucha <vbucha@codeaurora.org>
2021-03-22 04:39:59 -07:00
Vatsal Bucha
a5ca4621d9 asoc: bolero: Add core_vote before gfmux access
GFMUX access happen during WSA macro usecase.
Update wsa macro to do core_vote before clock
request.

Change-Id: I8f7eb67b87845016b54c9873a6fc230d207262f7
Signed-off-by: Vatsal Bucha <vbucha@codeaurora.org>
2021-03-22 04:39:40 -07:00
Junkai Cai
fbfd93a2dc asoc: lpass-cdc: allow register write via debugfs
allow QTI regmap debugfs register writes for debugging purpose
on lpass-cdc, wsa and wcd codecs.

Change-Id: Icdedb8f0a5e198bbb6afecb4b6995cc0d1a35833
Signed-off-by: Junkai Cai <junkai@codeaurora.org>
2021-03-20 21:29:06 -07:00
qctecmdr
f2532546f1 Merge "asoc: lpass-cdc: init notifier head for lpass-cdc notifier" 2021-03-18 09:03:58 -07:00
Vatsal Bucha
eb27bf253d asoc: codecs: fix race condition of core vote and reg access
Auto suspend timer for core vote is triggering before read write complete.
Move the auto suspend of core vote to post read write operation.

Change-Id: I619da358c7c42af45ef480ed0dba2c2cc26e9cc1
Signed-off-by: Vatsal Bucha <vbucha@codeaurora.org>
2021-03-18 04:11:56 -07:00
Meng Wang
810d3bb498 asoc: lpass-cdc: init notifier head for lpass-cdc notifier
Call BLOCKING_INIT_NOTIFIER_HEAD for lpass-cdc notifier to
reduce warning log during bootup.

Change-Id: I0aa7fec44e857cf170fcd701986f1fa2db03e170
Signed-off-by: Meng Wang <mengw@codeaurora.org>
2021-03-18 16:54:47 +08:00
Meng Wang
d7859b1bdd asoc: lpass-cdc: add RX4/5 for wsa macro
RX4/5 are added on bolero 2.5 and can be used for wsa1 macro.
Make this change to add RX4/5.

Change-Id: I4fa77fec3cbcb4d01718026cf648e5e7a171ddb2
Signed-off-by: Meng Wang <mengw@codeaurora.org>
2021-03-17 15:00:40 +08:00