Branch address offset for TCS sleep/wake has
changed for lito, add changes to support it.
Change-Id: Id938c4c85df17f6709b9533ff737cf5a0186bc09
Signed-off-by: Animesh Kishore <animeshk@codeaurora.org>
New version of the gamut block has been introduced with changes to
the scale/offset programming. Change updates the minor version for
the feature.
Change-Id: I62597a9d229e13e10e0ac0f1183b2db2b0b2a575
This change adds proper null checks after using
kcalloc and returns early to avoid accessing null ptr.
Change-Id: I948ad37eb120e00c5f6e3ae2e3b967819cbd233b
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
During atomic_check phase the encoder_mask is taken
from old crtc->state leading to wrong validation.
Fix it by taking the encoder_mask from new crtc state.
Change-Id: Ifcfc4bee887168d8208ffdafb1cf5ea4c4473796
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
Existing cwb implementation waits for WB done interrupt in
wait_for_commit_done API call. This serializes the cwb commit
and causes frame trigger delay on primary display. MDSS hw allows
to trigger the cwb frame when previous frame is in-progress. This
change updates driver to allow parallel frame trigger for cwb
enabled display. It releases frame N cwb output buffer in frame
N+1 wait_for_commit done call.
Change-Id: Id4f2a0cc78a3f24a1b5ce96dc907780246768dbf
Signed-off-by: Raviteja Tamatam <travitej@codeaurora.org>
This change ports the missing changes from 4.14 to 4.19
that were missed. It includes changes up until
commit 0f8fb25421ff ("cnss2: Add device version to
SOC info structure").
Change-Id: Idfdfe891f146e389e3c65cc3fc4c98d93220e789
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
Add support for new requirements in 1.4a CTS which need
to try link training 1 on different lane counts and link
rates.
CRs-Fixed: 2458753
Change-Id: I2039822f420a73232df7293afcddd7bee263c7b4
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
Update the link training process along with the AUX
communications during link training as per hardware
recommendations.
Update the pre-emphasis and swing values for active
lanes only instead of all lanes.
During link training, update pre-emphasis and swing
values in hardware first and then update sink.
CRs-Fixed: 2458753
Change-Id: Ie05c9d6508b0c564b194032ae4ebb1bc5550e7b8
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
Fix resource and splash buffer handling in resource manager
and sde_kms to support continuous splash to be enabled/disabled
independently in multiple built-in display usecase.
Change-Id: I446ea9b08a794e2b053c37f55b31e51404bbcf71
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
The open method for the debug fops are supposed to extract
the appropriate register base for the corresponding
hardware blocks, which are later used for the register
read and writes for the associated hardware block. But
the current open method being used points to some random
register base which can lead to fatal issues when performed
reads and writes to registers. Hence implemented a new
open method to extract the appropriate register base of the
various mdp hardware blocks. This patch also fixes
the valid sub range check against the corresponding
hardware blocks instead of checking across all the hardware
blocks.
Change-Id: I2a08fae74b3cbd31f2931c3b89b7308feb4b84e8
Signed-off-by: Lakshmi Narayana Kalavala <lkalaval@codeaurora.org>
Userspace is not supposed to request vblank until crtc is enabled,
because drm framework rejects the request if crtc is not enabled.
Any vblank request prior to that need to be cached in the userspace.
Hence removing the cache logic from the downstream driver.
Change-Id: I78ceee331cba2d691f68fd649bd5cf33f7868e72
Signed-off-by: Lakshmi Narayana Kalavala <lkalaval@codeaurora.org>
The display driver uses ktime_to_us to timestamp the messages
in the sde event log. But the kernel logs use local_clock to
timestamp the messages. Using same timestamp routine in sde event
log helps to correlate the messages from both the logs
for debug purpose.
Change-Id: Id94e03ba21f82e2162e4ef4290c10d2d09110d4c
Signed-off-by: Lakshmi Narayana Kalavala <lkalaval@codeaurora.org>
Current sde driver allows vblank enable and wait requests
even after crtc is disabled which would eventually lead to
enable of irq and timeouts in caller context. This change fixes
it by updating vblank callback status as 'on' during crtc enable
and shutdowns vblank callbacks before crtc disable is complete.
Change-Id: I52b74f685107f4dc8c83305c28f23cdcb4747730
Signed-off-by: Prabhanjan Kandula <pkandula@codeaurora.org>
Signed-off-by: Lakshmi Narayana Kalavala <lkalaval@codeaurora.org>
Currently dynamic mode-switch is allowed only after
the cont-splash handoff is handled during the first
frame. Remove this restriction for cmd-mode alone as
it can handle the use-case.
Change-Id: I5f9dc758f50a91fec0b9f710c74f2ea78c4e75eb
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
Currently there is a race condition in checking the
pending_kickoff_cnt in wr_ptr_irq wait from display-thread
and pp_done_irq from interrupt context. In both places,
pending_kickoff_cnt is read first and modified later. In
partial update cases where the frame-transfer is short,
such a race condition might happen and would lead to both
triggering the frame-done/release fence for the same frame.
Fix it by combining read/modify to one statement in both places.
Change-Id: I9162e7dc3f12af3590514f1ebfd68023aa920181
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
Add 3 properties for queuing LTM histogram buffers to remove the
limitation that we cannot send two buffers back in the same display
commit.
Change-Id: Ia37c6d9e7faa6b5a086a9737e20c44eed865c66d
Signed-off-by: Ping Li <pingli@codeaurora.org>
This change corrects the secure id to hold vaddr
instead of paddr.
Change-Id: I021f5c0c7708eb2a0b166fe3a6c13b11aaf33419
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
Primary and secondary displays should have first priority
when reserving lms. Static reservation can potentially block
higher resolutions for the required displays. This patch gets
the layer mixer requirement for primary or secondary display
if available. It reserves those layer mixers dynamically
for the respective display when connector is registered.
Change-Id: Id69dac4c72d6b20008049f4aeb71c0f97d0a426b
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
For some phy ver 4 chipsets, DSI_PHY_CMN_CTRL_4 needs to be programmed
in normal power up sequence. This change adds support to program the
same based on minor phy version.
Change-Id: I68bed48ca671f540efafd13f8d56c7e90de8b25c
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
Add support for lane count reduction as per the new requirements
for DP 1.4a during link training 2.
CRs-Fixed: 2458753
Change-Id: I58c9b6101338e8a1d1b4e3dec80f8fdf2a25ae5b
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
Update the DP controller and PHY programming according to
the new hardware recommendations.
CRs-Fixed: 2458753
Change-Id: I1bce5915ba6ebbb250cc5c4aac907b0b287eece7
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
Add support to selectively enable clock gating for supported
DSI clocks using a new debugfs node - config_clk_gating. This
new node would be created for every display node. See below
for usage examples:
To enable clock gating only for BYTE clock:
echo 1 > /sys/kernel/debug/<display_name>/config_clock_gating
To enable clock gating only for PIXEL clock:
echo 2 > /sys/kernel/debug/<display_name>/config_clock_gating
To enable clock gating only for PHY clock:
echo 4 > /sys/kernel/debug/<display_name>/config_clock_gating
To enable clock gating only for all clock:
echo 7 > /sys/kernel/debug/<display_name>/config_clock_gating
To disable clock gating for all clocks:
echo 8 > /sys/kernel/debug/<display_name>/config_clock_gating
To go back to default setting:
echo 0 > /sys/kernel/debug/<display_name>/config_clock_gating
Change-Id: I83713d86eb1b9675d40d51fc20de81cca0aeb1c0
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
