Add support to configure any HAL SRNG descriptor to
be allocated from cached memory area. This is to
optimize of CPU cycles spent on uncached
memory accesses. Also added prefetch of cached
descriptors
Change-Id: I2544e8596d48e2f5549bf687a764c16d73397545
CRs-fixed: 2267945
If there's a HW duplicate rx descriptor from hardware,
it'll cause a NULL pointer issue in
__dma_inv_range in dp_rxdma_err_process.
In this case, skip procssing it as a workaround.
CRs-Fixed: 2398327
Change-Id: I5639e5fc9a3a06e6762448ec7cb2ea58d9ae8160
The following changes are made
-Yield dp_rx_process if poll time exceeds
-Yield dp_tx_comp_handler if poll time exceeds
-Interrupt statistics to track various interrupt contexts and
corresponding interrupt masks
-Add poll times histogram buckets to NAPI stats
Change-Id: I8c7a6bbbb97c7b3dd1dde6ac3a97113c433086a2
CRs-Fixed: 2423879
Observed that when IPA offload is enabled, RX packets
are not routed correctly to IPA ring. Currently only
IX0 of REO_DESTINATION_CTRL_IX registers are remapped,
which only covers 3-bit reo_destination_indication of
range 0 to 7.
Fix is to remap REO_DESTINATION_CTRL_IX2|3 registers
so that reo_destination_indication of range 16 to
31 can also be routed REO2IPA ring when IPA offload
is enabled. Upon IPA offload is disabled, save values
of IX2 and IX3 are reset back to HW.
Change-Id: I3428b450ab10076d27c7628a3729e8cec088bd94
CRs-Fixed: 2434331
Some of the print messages in HAL module come very excessively.
Use hal_verbose_debug() API to print them.
CRs-fixed: 2405028
Change-Id: I4b4754af65c00edb571de898527026b6183ef15f
Host SW should not update the cached TP pointer to HW register before
current cached TP REO entry finishes processing, otherwise there is
risk if HW HP catches up to this cached TP, but HW TP value has been
updated to (cached TP + one entry size) now, this TP REO entry might
be overwritten.
Refine it and only update TP pointer to HW when entry processing has done.
Change-Id: I54df3247745717855a67649f440c606c518efd61
CRs-Fixed: 2391658
once in a while the HW is sending a descriptor which
is already processed by host. This can be a potential HW
issue, as a WAR we are not processing such duplicate descriptors
instead increment a counter and continue with next descriptor.
Change-Id: I6c9bc6a9fb4705b42284171a32855411aa5dd73f
CRs-Fixed: 2338543
- Support to pass IPA enabled(disabled) flag from ini to DP layer
- Use ioremap call to translate tx_comp_doorbell_paddr obtained from
calling ipa_setup api to tx_comp_doorbell_vaddr. This is needed to
write the initial value of HP at the doorbell address.
- Change REO_DST_RING_SIZE and WLAN_CFG_TX_RING_SIZE to 1023
for napier/hastings if IPA is enabled. This is needed because,
ipa_setup API can handle only 16-bit values for the size param(bytes)
of the ring.
- Disable hash based flow steering for SAP peers in case IPA is enabled
and set default reo_dest_ring_4 as default RX ring. Since IPA will be
reaping RX packets from reo_dest_ring_4 only, flow steering is not
needed for SAP peers.
- Unmap pre-allocated TX buffers for IPA in the TX completion ring.
- Donot execute IPA functionality if IPA is disabled from ini.
Change-Id: I6855bfe293a457ccc0abd1ad5567f5c95232a9d2
CRs-Fixed: 2183519
Do null check before servicing the ring. When dp_service_srngs()
is common API which gets called when interrupt gets fired for
any ring. Within this API, driver goes one by one to each ring
and service the rings as it is not obvious from interrupt line that
which particular service ring needs to be served.
So race happens when rings are getting initialized and packet has been
arrived to one of the rings. Due to dp_service_srngs() API's
implementation, driver goes to one by one each ring without checking
if all rings are initialized.
CRs-Fixed: 2310496
Change-Id: I3c8f668756c8d266abe082e8473d54cb4df9065e
Some of the macro names defined in qca8074v1, are defined with
a slightly different name in qca8074v2, and few macros have the
same name in both headers but are defined with different values.
Fixed the same.
Change-Id: I5e948baf5326d1d8fdfa2bd7ee8aa072c710d17c
1. Allocate and Initialize host and target copy engine configuration
for QCA6390 based products.
2. Setup Copy engine service map for QCA6390.
3. Add conditional compilation flag QCA_WIFI_QCA6390 to support
QCA6390 based products.
Change-Id: Ia4dd4d436b8ecae0e9f91faa0c1fe7dbd14f001f
CRs-Fixed: 2259312
Create separate individual hal_srng_table and hal register
offset in target specific source files. Create separate
functions for qca6290 and qca8074 for few hal rx tx
functions as the macro value differs between the chipsets.
Assign target specific hal tx, rx ops as part of hal_attach
and call respective hal tx, rx ops through callbacks.
Change-Id: Ibbf490c678c39fdd9d54191aad7aaec786db30ec
For QCA6390 PCI address space is reduced to 1MB.
Change bitmask to map it to appropriate range.
Change-Id: I70385df91855b7e7ddbedf7f0c6bf6e364b7d78c
CRs-Fixed: 2259194
Address the following issues in the hal folder:
CHECK: 'completly' may be misspelled - perhaps 'completely'?
CHECK: 'Initalize' may be misspelled - perhaps 'Initialize'?
CHECK: 'refered' may be misspelled - perhaps 'referred'?
CHECK: 'Retreive' may be misspelled - perhaps 'Retrieve'?
CHECK: 'settting' may be misspelled - perhaps 'setting'?
Change-Id: I98368830eeef7942c20380dbe6c638319a9860d9
CRs-Fixed: 2241575
When delete peer, host will try to flush all frames in REO queue
by sending a cmd through reo ring, but sometimes encounted failure to
send this cmd, dump ring status if ecountered above failure.
Change-Id: I3ea4e96e5999f85398b531ddf4f350e91e798d70
CRs-Fixed: 2167419
To release/flush buffers from source SRNGs which have not been reaped yet,
add a new HAL API to get next descriptor which is pending reap
Change-Id: Ibe490d8f8667ed046beb98fe19bfd7feb31aa286
CRs-Fixed: 2165595
Direct Buffer Receive provides the driver with a mechanism by which target
can transfer information directly into host memory via DMA.
DMA rings must be initialized and configured before they can be shared
to the target for transfer ot data. Host driver will use the HAL SRNG
APIs to create, initialize and configure the DMA rings.
Change-Id: I43cd39ccbb5f5069c9a14092459d5c88ea514dca
CRs-Fixed: 2157986
Add feature to obtain position of head and tail pointer of all rings.
Change code to include 'iwpriv athx txrx_stats 263' that gives the entries
pointed to by head and tail pointer.
Change-Id: Ib125db8982362c50a415058fd29f07f326991a50
CRs-fixed: 2098806
Add support for hash based steering in RX path, also
considered cases where a particular radio or both radios
are handled by NSS offload.
CRs-Fixed: 2092357
Change-Id: Ib0e88c28eecd7bfdb52c7337d4485ac41371be68
SRNG loop count is not restored after LMAC resets, and hence can't
be used to reap entries from destination rings. Modify the SRNG API
to use head pointer instead.
Change-Id: I3b05948d531cc3d1a5ccb7f01e38f8f36ae69da9
CRs-Fixed: 2091809
Program additional registers to enable the WBM scatter ring
support for providing link desc to HW.
Change-Id: I0d240150f81a333758a311af35c97e1f93ef4ed2
CRs-Fixed: 2068757
assign msi vectors to srng rings based on the ext_group they will be
serviced in.
provide support for ext_groups in hif_pci.
Change-Id: If313fdb43b939871c0d73dea9a05f757427b5b16
CRs-Fixed: 2051911
HAL modification to provide additional information to
support lithium nss offload configuration.
A new API added to extract addtional information from HAL
Few additional parameter added in get_param function.
Change-Id: I2fb0ed89c2d3cb3ee253b158f7982e1a00ab4353
The register write apis for the srng rings pass the
srng structure as their context. Add a pointer to
the hal to enable windowing.
Change-Id: Ib3bda2d49d5c2d327cc1b986dcf825a216a004ef
CRs-Fixed: 2032131
Use windowing for register read/write. This allows
for pci based devices to reduce the mapped bar size.
Required for QCA6290.
Change-Id: Ifb173095c135e9eca454f2ba6132b5c54ea8fc4b
CRs-Fixed: 2032131
This change is for supporting monitor mode VAP. All the monitor mode ring
is configured. The related monitor mode ring includes:
-monitor mode buffer ring
-monitor mode destination ring
-monitor mode status ring
-monitor mode link descriptor ring
The packet is not sent to monitor mode ring unless the monitor mode VAP is
configured. This release support Multiple VAP - AP/STA VAP plus Monitor
VAP configuration. The status ring is not used in this release. However,
the ring is tested and the ring is moving and there are TLV's in the ring.
Change-Id: I782ee0c3b998d8b3bbac79b5e7fdecdbff15fa93
CRs-Fixed: 2013049
This change includes:
- Adding the hooks to send LRO and hash configuration to the firmware
- Configuring the REO remap registers
Change-Id: I6d83e2a2365647f2c7a6440bd1d4b42fa7df7eff
CRs-Fixed: 1094775
1. Increased the sizes of following SRNGs used by WBM and also added max size
check in SRNG setup:
-idle link descriptor ring
-Tx completion ring
-Rx release ing
2. As per HW team, TP_ADDR and HP_ADDR for Idle link ring should remain 0 to avoid
some WBM stability issues. Remote head/tail pointers are not required since
this ring is completly managed by WBM HW
Change-Id: I93d70a287329dfeb08fcfb6b04306d65776b4834
In this change, hif requests hal construct the shadow register
configuration for all the necessary datapath rings. Then hif
requests hal append the configuration for the srng rings used
by the host copy engine module. When constructing the shadow
register configuration, the hal makes note to use the shadow
register addresses instead of the actual addresses.
Change-Id: Ide8f523dece0d1dc6eb05f4c86739ece7909c25a
CRs-Fixed: 1113131
Add hal_srng unlock API to be used in completions reap funtion (CE) in
which HW head pointer/tail pointers need not be updated
CRs-Fixed: 1088985
Change-Id: Ia54b144e5dfd0b37bbabf992c764697928ddf76d
Change that allows configuration of max buffer
size for SRNG rings in the receive direction
Change-Id: Ib857f1fdf43c849078f9470ec029fe627379fcb4
CRs-Fixed: 1089874
Wifi 3.0 compile against cdp apis.
Make compilable against mobile code base.
selective hw common header include.
Change-Id: I051f917001c0d13c762d9cb5a3ec141cd278d0e7
CRs-fixed: 1075736
Add support for replenishing the rx buffers using the host to
firmware buffer ring.
This includes adding a flag QCA_HOST2FW_RXBUF_RING:
When QCA_HOST2FW_RXBUF_RING is enabled the host will do the following:
- Allocate the refill buffer ring (HTT_HOST1_TO_FW_RXBUF_RING) and
populate it with
rx buffers
- Send the refill buffer ring configuration to the firmware
- Allocate the rx DMA ring (HTT_RXDMA_HOST_BUF_RING), leave it empty.
- Send the rx DMA ring configuration to the firmware
When QCA_HOST2FW_RXBUF_RING is disabled, the host will do the following:
- Allocate the rx DMA ring (HTT_RXDMA_HOST_BUF_RING), and populate it with
rx buffers
- Send the rx DMA ring configuration to the firmware
CRs-Fixed: 1074199
Change-Id: Iec05a973cd9d628c742e3aaa16b8dabc7797625d
