Sometimes, userland may release the csiphy but doesn't
stop the csiphy, then the csiphy can't be stopped since
the state isn't in start state. We can't recovery to
normal state even shutdown the csiphy.
This change also checks the start count during shutdown
and stop the csiphy if the start count isn't zero. Then
we can make sure the state can be recovered after shutdown.
CRs-Fixed: 3261846
Change-Id: I5eef839e84125785e17c5f11f4118a8627b1fb63
Signed-off-by: Depeng Shao <quic_depengs@quicinc.com>
On customer side, the main and backup sensor who share a same
dtsi slot, may have different power voltage for VDIG/VIO/VANA
and so on, use sensor driver xml file power configValue on
powerUpSequence to enable regulator for both main and backup
sensor.
CRs-Fixed: 3254166
Change-Id: Ica54eb66ec9c5050aa3ee70f44fb6dfd3b7c4103
Signed-off-by: chengxue <quic_chengxue@quicinc.com>
When generic blobs are added to process debugging information
from userspace, these blobs are sent as separate packets
from the packets which carry actual configuration settings.
However, both are sent as the same packet opcode of
CAM_SENSOR_PACKET_OPCODE_SENSOR_CONFIG, where they differ is
a level below, within the meta_data type of the command buffer.
Further downstream after parsing the packets, packets with
config opcodes get applied. With this new change, we want to
add an exception for those sent as generic blobs. This change
introduces the fix for it.
CRs-Fixed: 3266290
Change-Id: Iee2ea186e594479d61dbe30dd1d0399352986028
Signed-off-by: Li Sha Lim <quic_lishlim@quicinc.com>
This change adds domain-id support for new
targets. This change involves adding information
to the SCM call currently in use such that it is
a superset, and the additional fields needed are
the IFE and CDM number being used, and VC mask.
These are in addition to existing PHY mask selection,
and lane/trio mask selection.
All the information above will be sent over from CSID
to the PHY driver, and the PHY driver will pack the
information in a generic format before sending it
over in an SCM call. Where previously, this information
is packed in format that matches the register, this
will be sent generically moving forward.
Given that there are multiple instances per physical
PHY hardware, and that the usual dev_handle used by
userspace to identify them are not accessible CSID
side, the lane_assign/lane_cfg parameter is used to find
the specific PHY instance used in conjunction with the
CSID instance in a session. lane_assign from PHY driver
and lane_cfg from CSID have the same values.
CRs-Fixed: 3259706
Change-Id: Ie050b1b9e742c6a63812eb38db7eca76db24667f
Signed-off-by: Li Sha Lim <quic_lishlim@quicinc.com>
Variable fps usecase needs to get valid req with init packet
flag after flush, this change adds a flag to detect if we
get a valid req before resuming HW. This change also stops
the sensors during flush if useland already request to stop
dev.
CRs-Fixed: 3256139
Change-Id: Ieabd327a3b5cf380ca60548c85714c96635a272d
Signed-off-by: Depeng Shao <quic_depengs@quicinc.com>
Resolution index settings for a sensor can be set
in three ways, during initial configuration,
an acquire when switching between sensors during a
session, and dynamically while the sensor itself is
running. To aid debugging efforts, this information
about the resolution index, along with other helpful
properties, whenenever they're changed, is
passed over from UMD and stored in KMD.
CRs-Fixed: 3214150
Change-Id: I2a83177966a4ccecad0a9d19ec7d2ba11dc10d45
Signed-off-by: Li Sha Lim <quic_lishlim@quicinc.com>
Remove data rate settings from common register array.
This change is to avoind re-programming same registers,
with different values.
CRs-Fixed: 3247785
Change-Id: Ic6790b006b32911e06f2abc1fefa2f44b3820ee6
Signed-off-by: Karthik Anantha Ram <quic_kartanan@quicinc.com>
Do correct length check for cmd_buf in command
CAMERA_SENSOR_CMD_TYPE_WAIT, we need to make sure the
length of cmd_buf is effective for each generic_op_code.
CRs-Fixed: 3241357
Change-Id: I6894c98a2dcf6569c7127fde12d4c94b080dca3c
Signed-off-by: mingpan <quic_mingpan@quicinc.com>
Remove unnecessary memsets of the structure variables
whose fields are assigned prior to their usage or they
are dynamically allocated with calls that set the memory
to 0. This memset usage optimization is to improve
performance.
CRs-Fixed: 3228092
Change-Id: Iec68c6d072863627959ce603cff28afd26a1c408
Signed-off-by: Sokchetra Eung <quic_eung@quicinc.com>
Sensor remains power-up status even if unlocking or locking sensor fails
while probe, now we will power down sensor in case of that.
CRs-Fixed: 3228473
Change-Id: Iab6edf0a824c61132211c3ea5c46cc0fff0247c4
Signed-off-by: Stark Lin <quic_starlin@quicinc.com>
Only unregister the i3c driver if there is i3c node
in dtsi.
CRs-Fixed: 3234792
Change-Id: I01e99406a08648aab90147d1287d3d8b6ab04e89
Signed-off-by: Depeng Shao <quic_depengs@quicinc.com>
If we set burst write method to write sensor word data type
register data, some 32 bits data queue cannot be filled full,
and invalid data will be injected into data queue, then cci
burst write will fail.
CRs-Fixed: 3221426
Change-Id: I20ff1e7f508e4bbc79826db7faa13fcc80eaaf96
Signed-off-by: chengxue <quic_chengxue@quicinc.com>
To achieve sync state, platform probe needs to happen for i3c-i2c
nodes since platform devices are created for them due to topology.
Return success in component bind for i3c-i2c based sensor nodes.
CRs-Fixed: 3227008
Change-Id: I6604fac1ef605f7d3cef69954238ac62bee77dae
Signed-off-by: Mukund Madhusudan Atre <quic_matre@quicinc.com>
Do not call register with owner when device id table is empty.
CRs-Fixed: 3227008
Change-Id: Ibb86154c4c4f0b0e3d81867eb1ed049eefbc1a85
Signed-off-by: ridhshah <quic_ridhshah@quicinc.com>
Currently during csiphy component bind, we are allocating memory for
csiphy register info structure, which is not required, since the
structure in statically defined in headers. This causes panic during
unbind calls, since we are supplying address to statically allocated
memory that we previously pointed to, during bind. Remove dynamic
memory alloc and free to fix this issue.
CRs-Fixed: 3223335
Change-Id: If5d029dae4660b4a57b007c895956baceac9e4b5
Signed-off-by: Mukund Madhusudan Atre <quic_matre@quicinc.com>
Move CSI_3PHASE_CTRL registers from common to data rate
specific config.
CRs-Fixed: 3226880
Change-Id: Id39c2f4fe436cdbed99cfc407c79ae3cd7fccdbe
Signed-off-by: Karthik Anantha Ram <quic_kartanan@quicinc.com>
Add support for 32 bits wide sensor ID for CCI hw during sensor
match ID operation.
CRs-Fixed: 3210196
Change-Id: Idef7f5cd3d7199198d0c6aa06ce54415a409d147
Signed-off-by: Jigar Agrawal <quic_jigar@quicinc.com>
Add support for RF channel based the csiphy 3 phase datarate settings.
CRs-Fixed: 3201451
Change-Id: Ic06531a577c6513d40ccf6cae163a482f2e9c9ae
Signed-off-by: Jigar Agrawal <quic_jigar@quicinc.com>
The change adds support to handle new cmd buffer blobs.
Add support for CDR sweep. Also add support to read/write
data rate aux mask for a given phy from a provided output buffer.
CRs-Fixed: 3186732
Change-Id: Id18715c6778dfb1a1586e7297da70f36587f13d9
Signed-off-by: Karthik Anantha Ram <quic_kartanan@quicinc.com>
Fix the sensor code failure for i3cdev_to_dev API
which is missing the symbol in the kernel allow list.
CRs-Fixed: 3200508
Change-Id: I2ffc28d20e5e0e1e454e187299f61c983801d05c
Signed-off-by: Jigar Agrawal <quic_jigar@quicinc.com>
Signed-off-by: Wasim Khan <quic_wasikhan@quicinc.com>
Fix the sensor code failure for i3cdev_to_dev API
which is missing the symbol in the kernel allow list.
CRs-Fixed: 3200508
Change-Id: I99f1ae98e322ae4116cccb9cc7ba42fcc7b8a89a
Signed-off-by: Jigar Agrawal <quic_jigar@quicinc.com>
Signed-off-by: Depeng Shao <quic_depengs@quicinc.com>
Signed-off-by: Abhijit Trivedi <quic_abhijitt@quicinc.com>
This change adds supoort for variable fps feature, this
feature needs to stream off the sensor at EOF. So, this
change sends an EOF event to sensor to do the streamimg
off. Since sensor only outputs one frame every round, so
we need to apply the IFE packet to HW immediately, then
the every frame will be valid frame.
CRs-Fixed: 3178221
Change-Id: Ifc57987aac11c9655edd979734e5568c19262571
Signed-off-by: Wang Kan <quic_wkan@quicinc.com>
Signed-off-by: Depeng Shao <quic_depengs@quicinc.com>
Add i3c bus support for qup i3c based
I3C target.
CRs-Fixed: 3169593
Change-Id: I0209f799d800daf9afe7a846310a3d4f4f2ee420
Signed-off-by: Jigarkumar Zala <quic_jzala@quicinc.com>
Signed-off-by: Jigar Agrawal <quic_jigar@quicinc.com>
Add new type for CDR register settings for 2.1.2/2.2 header.
CRs-Fixed: 3186732
Change-Id: I7bb4feef3da9365b2a1723b0c8d0a318fd1b5b9c
Signed-off-by: Karthik Anantha Ram <quic_kartanan@quicinc.com>
Shared memory is initialized by CRM and used by
other drivers; with CRM not active other drivers
would fail to access the shared memory if
memory manager is deinit. Reader Writer locks can
prevent the open/close/ioctl calls from other drivers
if CRM open/close is already being processed.
Issue observed with the below sequence if drivers
are opened from UMD directly without this change.
CRM Open successful,ICP open successful,
CRM close in progress, ICP open successful,
mem mgr deinit and CRM close successful,
ICP tries to access HFI memory and result in crash.
This change helps to serialze the calls and prevents
issue.
CRs-Fixed: 3019488
Change-Id: I84d50918713686a067c0e3deb64c9c6ae9edfcb5
Signed-off-by: Tejas Prajapati <quic_tpraja@quicinc.com>
Select the clock corner of tpg source clock based on the input clock
received in the globalconfig command.
CRs-Fixed: 3164948
Change-Id: Ib945e0f82790d3a33ac5028850ef55a806c84784
Signed-off-by: Rishab Garg <quic_rishabg@quicinc.com>
Add bring up sequence header and driver support
for SM8650.
CRs-Fixed: 3149299
Change-Id: I072f3dd57f99c1625f58e90711e6908e6e97efe9
Signed-off-by: Jigar Agrawal <quic_jigar@quicinc.com>
Add support for more than one AON cameras for SM8650 target.
CRs-Fixed: 3149294
Change-Id: I842317ab59812109785a026fd0f728baf837b27f
Signed-off-by: Jigar Agrawal <quic_jigar@quicinc.com>
Fix error log in cci core so arguments match formatter.
CRs-Fixed: 3127448
Change-Id: I0af1121349868fc9b543a48d95429d267ab2cf26
Signed-off-by: Joshua Florez <quic_jflorez@quicinc.com>
Few sensors needs to unlock register bank for reading
sensor ID from sensor register for probe. And this change
adds support to write sensor registers in probe cmd just
after power on and before reading the sensor ID.
CRs-Fixed: 3111822
Change-Id: Iee2e6bd0ba896a0a2d0c4cc23fe272ba4aae3ab2
Signed-off-by: Stark Lin <quic_starlin@quicinc.com>
Since the CCI error isn't fatal error during probing sensor,
so we can just print an info log for the CCI error.
CRs-Fixed: 3118450
Change-Id: Ie980c9eb37e410b07c434a7a304ab1c18925319b
Signed-off-by: Depeng Shao <quic_depengs@quicinc.com>
On CSID encountering a fatal rx error, notify phy to update it's
aux settings for the given data rate when it streams on the
next time. The phy device will book keep all the data
rates that need updated aux settings and on all the
occasions they are streamed on the updated aux settings will
be configured. This is supported for all data rates
from 1.2 - 2.35 GSpS. The change also adds a debugfs in phy driver
to disable aux settings update altogether.
CRs-Fixed: 3120043
Change-Id: Ia1ea3b9278c2eb918a527ee3d7b1ecfe53c4f2c2
Signed-off-by: Jigar Agrawal <quic_jigar@quicinc.com>
Signed-off-by: Karthik Anantha Ram <quic_kartanan@quicinc.com>
Fix the CPAS Start and CPAS stop call sequence
for the Sensor power up. Also, only start and stop
the CPAS when we really want to write to the
AON-Main Camera Mux register.
CRs-Fixed: 3134267
Change-Id: If73ddc838d59a71f0e6cd21d390c7e603c42b2d6
Signed-off-by: Jigar Agrawal <quic_jigar@quicinc.com>
Without this, tpg is keeping refCount on titan top gdsc and
thus causing qchannel handshake side effects.
Sequence:
1. TPG calls cpas_start, increments refCount on gdsc with
soc_enable_resources
2. run usecase
3. TPG missing disable_soc_resource
4. TPG calling cpas_stop : which shuts down qchannel
5. When next iteration starts, because gdsc is still on from
previous session, cpas top is not getting reset state
registers - thus keeping qchannel still in shut down state.
qchannel goes to good state if gdsc is actually turned off
and then turned on.
CRs-Fixed: 3131613
Change-Id: Iacb837f7ee3fd7d6b094d0271d0f2d9c15f0b306
Signed-off-by: Pavan Kumar Chilamkurthi <quic_pchilamk@quicinc.com>
Currently main/aon control operation is getting trigger explicitly
from probe control with the reason that Probe IOCTL is exclusive to
sensor core. This operation is required for making sure to get the
control to hlos before reading slave id. Further post probe operation
main/aon control selection is managed by csiphy driver at the time of
acquire and release ioctl call. This will block the main camera
operation after probe ioctl successful and before csiphy acquire ioctl
call. There are some usecase where sensor needs to perform several
operation independently. To add this support moving the main/aon
selection call from probe only ioctl operation to power_up/down call
flow. This call is made upon when it is required to operate on sensor.
This change will help to give AON sensor more flexibility to perform
independently. Further CSIPHY also have the same selection process
in it's acquire ioctl operation which can help to make the hlos end
selection in combo mode scenario.
CRs-Fixed: 3084672
Change-Id: Ic1c6ad41e35605a2291e7e50ff0fe94a0ab30624
Signed-off-by: Jigarkumar Zala <quic_jzala@quicinc.com>
Signed-off-by: Jigar Agrawal <quic_jigar@quicinc.com>
Update the csiphy header 2.1.2 with the new bring up
sequence revision 11.
CRs-Fixed: 3127494
Change-Id: I9a3579ecd2fc2274cf9913af0ef054cc62343b0e
Signed-off-by: Jigar Agrawal <quic_jigar@quicinc.com>
Currently lane specific general register programming is structured
with lane index basis. This is not required as general register
needs to program without any condition. This change updates structure
of this programming register. Also, array size calculation is replace
with more intutive way rather to manually enter the size everytime.
CRs-Fixed: 3117726
Change-Id: I5e57f37bf2025b37f23c10b835fd31ddfe986cee
Signed-off-by: Jigarkumar Zala <quic_jzala@quicinc.com>
Signed-off-by: Jigar Agrawal <quic_jigar@quicinc.com>
Add and handle lane enable register offset programming independent
than common control register array.
CRs-Fixed: 3117726
Change-Id: I7a9cfe41cb425143bf2be6c48de47dfb5e117aae
Signed-off-by: Jigarkumar Zala <quic_jzala@quicinc.com>
Signed-off-by: Jigar Agrawal <quic_jigar@quicinc.com>
To configure CP mask correct version check needs to be
used against CPAS hw version. Currently csiphy driver
is checking platform version to make the decision.
This change update this check with CPAS hw version check.
CRs-Fixed: 3048249
Change-Id: Id023f5cc0252b47c274dfed9d93e7f49a3d0ab49
Signed-off-by: Jigarkumar Zala <quic_jzala@quicinc.com>
Signed-off-by: Jigar Agrawal <quic_jigar@quicinc.com>
After flushed, KMD reports ERR including isp, actuator, sensor, flash.
However many CRs don't have fatal KMD error log, but participant is KMD.
Remove the non-fatal KMD error log.
CRs-Fixed: 3095401
Change-Id: I0e5e370c0c4d1daceb72d9eed8d0c45baad5179e
Signed-off-by: Wang Kan <quic_wkan@quicinc.com>
Kailua tpg has some extra register for ir/xcfa/shdr overlapped.
These register data support is added as part of this change.
CRs-Fixed: 3086082
Change-Id: If044b336a87de931f6d512c52895e65c85d10863
Signed-off-by: Rishab Garg <quic_rishabg@quicinc.com>
Add interleaving format to support 2PD for tpg0.
CRs-Fixed: 3100297
Change-Id: Ic59c4cec0990faa3d70f45aa34baebaa33e08b2b
Signed-off-by: Rishab Garg <quic_rishabg@quicinc.com>
Create common root folder under debugfs root named camera at probe. Add
utility functions to create subdirectories under the common camera root.
CRs-Fixed: 3093049
Change-Id: Ia4cefb5d2263ecabf1b9d70deefa1ee624b04f07
Signed-off-by: Anand Ravi <quic_ananravi@quicinc.com>
