Fix dlkm compilation errors that are due to the use of -Werror
flags used by the build system.
Change-Id: I5e1e9bc63c1361d73e4930aab123212717872ecb
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
This change provides support to have per target configuration
of the maximum value for fal1 threshold & updates value for waipio
as per qos recommendation.
Change-Id: I48df0d1c58a8de80f40200b35e406d07621a3f68
Signed-off-by: Prabhanjan Kandula <pkandula@codeaurora.org>
Calculate line_time once during modeset and allow
each plane to use it instead of calculating for each frame.
It also simplifies the line_time calculation for
command mode display.
Change-Id: I94ce29eec94bfdbee9016fbf93378661ebf79c03
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
Rotator llcc is no longer supported. This change removes the
unused code.
Change-Id: Ia1d95e3f4386d25e0d2e06a87802b3f5b694998d
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
HFC feature of demura needs a skip blend plane to be set. If skip blend
plane is not set and HFC feature is requested to be enabled, driver
should skip turning on HFC demura feature. Change adds checks to ensure
that HFC is always enabled with skip blend plane staged.
Change-Id: I923359c7cb143867660b4c1e667f56ed42fa51c9
Panel height and width should be passed for partial update offset
calculation. Change passes the offsets to demura partial update
function.
Change-Id: Ic4113d46e8c1643a855f672e7a2bdd848ef99adc
Continuous splash setup checks the CTL configuration to determine and
log all planes that have been enabled for continuous splash boot.
This logic currently only checks the planes mapped to each LM on
a given control path, resulting in data planes being missed.
Update the boot plane enumeration logic to additionally check the CTL
fetch active registers to detect and log missed planes. This logic
checks against all planes found through the original enumeration path
to avoid logging the same plane twice. Note that planes found via the
fetch registers are assumed to be used across both rectangles due to
hardware logging limitations.
Change-Id: Ic1f4aaba94111fe096ba9764eeaef242beb6adf5
Signed-off-by: Christopher Braga <cbraga@codeaurora.org>
Declare the continuous splash pipeline setup to userspace by filling
in the DRM states for all plane, crtc, encoder, and connector objects
in use. This information will be treated as an 'informative' state,
and will be cleared at the start of the first commit to maintain
the DRM methodology of DRM clients being the only controller of
the pipeline. This ensures any configuration provided by userspace
is accepted and applied, even if it may already align with the setup
done by continuous splash.
This DRM state configuration is done via manual modification of the
DRM object states. Modification via the exposed DRM UAPI functions
is not possible due to no drm_atomic_state object linking the DRM
pipeline objects together.
Change-Id: I67650e05aafbb4e799cf60939f0595bc3786fc6e
Signed-off-by: Christopher Braga <cbraga@codeaurora.org>
Introduce support for the FP16 format and FP16 color processing
blocks. This includes support for FP16, FP16 UBWC, and inline
rotation on tiled FP16 pixel data.
Change-Id: I06a70cab5447140598682f687129d4f8662524b2
Signed-off-by: Christopher Braga <cbraga@codeaurora.org>
This change adds support for error checking ubwc and meta error status
based off whether REC0 or RECT1 is used.
Change-Id: I7c39755da99a9d6c0d02b4ef16fa93b8ec7458a9
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
Generalize the demura pipe index capability on sde_plane objects to
instead provide the relative pipe index for all plane types. This
information can be used by clients to fully determine a plane type
and its position.
Change-Id: I597da0dab92c249b16934b9327353e4937635606
Signed-off-by: Christopher Braga <cbraga@codeaurora.org>
Use of drm_display_mode vrefresh is being deprecated in
upstream DRM framework. Downstream driver need to use
drm_mode_vrefresh API from now on.
This change removes dependency on drm_display_mode vrefresh
and replaces it with drm_mode_vrefresh API in SDE, DSI and
DP driver. In addition, it also modifies drm_display_mode clock
to align with upstream approach where an uncompressed mode clock
is required to match drm_mode_vrefresh API.
Change-Id: Ie972a2e140adfd81c4e68df8e7bc69feaaca22e1
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
In few cases, even though input fence is freed, it might
get accessed through debugfs node while dumping fence list.
This change updates input fence to NULL in plane state
destroy once it is freed to prevent accessing it further.
Change-Id: I1a3799249e6a177af87653e17d014d1dad7ca638
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
Plane update will call system cache update, and by default,
will clear any cache programming. This clear is only necessary
after returning from a cached state. This change will reduce
unnecessary programming and event logs if the sys cache
was previously disabled and remains disabled.
Change-Id: I7f560ff24990a8c7ad785e560873193b7bf3a491
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
UIDLE and QoS LUT configurationis might be different between
different frame rates.
Add this change to update UIDLE and QoS LUT according to frame
rate when DRM mode is changed.
Change-Id: Ia16a963e185b911b7dd11e81a26cab732c2b185c
Signed-off-by: Lei Chen <chenlei@codeaurora.org>
This change fixes the issue in selecting the correct
perf index for the 90Hz refresh rate, before this change
values corresponding to 60Hz were getting applied for this
refresh rate.
Change-Id: Id4f8af4da95f0d13d30f6316dc26dd65b61d7f79
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
For existing HW, in-line rotation is only supported on master
planes. Remove publishing support for rotate-90 and rotate-270
on all virtual planes. Also, fixup the published support for
180 degree rotation which can be performed on all pipes that
have both X & Y axes reflections.
Change-Id: Iff248abeefeb2a100ffd833d94b429b47b6d407b
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
Update the uidle wd timer load value to 18. This change will allow
a 15us wd timer per hardware recommendation.
Update fal1 threshold value to take the minimum of 15 or the
current setting which takes line time and target idle time into
consideration. The target idle time is also being updated from 10us to
40us.
Change-Id: Ia8d9c2070813beef18fdf342526d82cf8f82989b
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
Current SDE driver allows staging of rect1 only configuration. When a
real plane is disabled sspp multi rect configuration is not updated.
This can lead to iommu faults and ping pong timeouts as framebuffer of
disabled plane is unmapped. This change fixes it by updating multi rect
config accordingly when a plane is disabled.
Change-Id: I67ae45ad0e607184c7fc49f4b220220ba1d8a2ae
Signed-off-by: Prabhanjan Kandula <pkandula@codeaurora.org>
Allow caller to specify the default value of the enum
property while installing with msm prop layer. It is
not always the case that the default value to be the
first entry.
Change-Id: Ie0bb1ad7479e3e07810b3d817fdf618b1935858c
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
QSEED scalar block HW revision is constant for a given MDSS revision.
Both SSPP and DS HW files invoke this API to read the revision register
at various points of time. Expose this revision information through
DT binding and maintain in the catalog to avoid repeated register
reads.
Change-Id: I95c0a5242cfda0aaa4ec5c2ff5c7cc0bed191b59
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
SDE driver started supporting multirect mode with rect_1 only
configuration. In such case, master plane can not trigger
pipe fetch halt independently. This change removes the pipe
fetch halt check completely because it was only done for
master plane without buffer flip usecase. AXI fetch halt
provides similar functionality during idle power collapse
and suspend-resume.
Change-Id: I79d9d0eac2de95f1bb88561c7cc259e0cc4b2ca4
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
In targets where ubwc is not supported, atomic check
should fail and return a error value if the input format
is ubwc.
Change-Id: I21a40f510cc852e64fbcc05a5fb4848da4b4faaa
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
This change addresses out of range and null checks in
sde driver.
Change-Id: I4ee82760ce3ee7053c336e49ec9eaae8b4c31b1e
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
In current driver if client did not reset system cache
crtc property, system cache write state is on forever and
breaks the system cache feature. This change restricts
entering into cache write state only if it's commit right
after idle notify. This change also adds event logs to
capture system cache feature state changes.
Change-Id: Ie46fc9113f752ed8989dab99301690a13003b00b
Signed-off-by: Prabhanjan Kandula <pkandula@codeaurora.org>
Add smmu cache hint at during the msm gem prime import
to ensure memory is cacheable. Ensure sys cache feature
is added to all sspp, not just vig.
Change-Id: Icc10468ad8d3e7c6aabd437776cde99eb627375a
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
Add plane buffer flag to get the correct aspace during
TUI VM usecase. FB_NON_SEC_DIR_TRANS plane flag is set
by user-mode to indicate S2-only non-secure buffer in
TUI VM. Return the default drm device when SMMU is not
available during get_aspace_device to make the working
seamless with/without SMMU.
Change-Id: I158dc17ba51ff4b2f302d3e7017db8ab3cfe2b84
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
Add SID setup function to help programming
the SIDs for all the pipes and lutdma xin clients
based on the VM.
Change-Id: Iea598303b480b33de8750e0988129dd5cdfe7572
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
When a 4LM topology is used each plane attached to a CRTC
is tagged with a L/R layout value and an offset value
depending on where destination X coordinate lands on the display.
The layout information is used to determine SSPP to LM
pair mapping and local coordinate space.
This change also handles source-split and Z-order
validation checks for planes staged on different mixer
pairs.
Change-Id: I1b20223388e65fc36a8b379ad9df23a277fcd1a5
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
Currently, the value for predownscale_x_0 is being set based
on source height and destination height. This value should only
be set if userspace has not set a value for it already or if
default scale is enabled through debugfs.
Change-Id: Icf13ac33ae4a1a40bff90cd639428e9a11f96241
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
Store full or partial static image in system cache (L3 cache)
for video mode primary display. Added additional commit to
crtc commit thread to transition to read cache state.
The change also updates llcc APIs to support generic functionality.
Change-Id: I6b2a45da946d7e0e0b326da9d214be3f01a9420e
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
Lower the cyclomatic complexity for this function by splitting the
work into helper functions.
Change-Id: I07d399e455ca2f73a14875b45c30f123c39fa501
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
Add scaling linewidth variable and logic changes to get
valid max linewidth values for inline rotation and scaling.
Modify linewidth check to compare with scaler source width.
Change-Id: I7c63175e568ecb524f9cdf8ada1d7c6fdc999236
Signed-off-by: Thomas Dedinsky <tdedinsk@codeaurora.org>
Updating qos remap updates requires reading registers to update values,
this adds additional CPU processing when in reality this update
is only needed once.
Bug: 142504774
Change-Id: Iec8d4dfd858b0602db7d2275b6b716dbcffe0d2f
(cherry picked from commit dbd1cfbc21db4b9bd4f1a4fc234cedc314fa1265)
Signed-off-by: Adrian Salido <salidoa@google.com>
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
This change introduces pre-downscaling values to the path where
these values are not provided by userspace. Currently, pre-downscaling
is only allowed by a factor of 2.2 in the x direction. With this
change pre-downscaling will support >2.2 up to 4 in the x direction.
Change-Id: I04d1b07243a5973e9338ea2a212280985b31b6a3
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
