Break the host initialization and de-initialization to
create late initialization and early de-initialization.
Call host init/deinit on physical connect/disconnect only
As attention messages from sink doesn't change the physical
cable configurations, call only late init/early deinit in
this case to avoid unnecessary hardware resources
re-initialization.
CRs-Fixed: 2490128
Change-Id: Ib930d250724ab3ea811a7388c7ad0aeae1164e21
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
This GPIO is a input signal, so need to set it
to input mode, or it will lead leakage in RBC.
This change is only to fix the power issue.
Change-Id: I87716f646c75dac2f1350a2ea55188829a4ccc9e
Signed-off-by: Yuan Zhao <yzhao@codeaurora.org>
This pin is a output pin from panel. Panel can
output signal of internal VSYNC and ERR_FLAG.
Change-Id: Ib8e661ca1fdb33bb7060935edb9bc1f1a858c4b3
Signed-off-by: Yuan Zhao <yzhao@codeaurora.org>
Change calculates and updates correct pclk that is being
used to drm modes in kilo hertz.
Change-Id: I7aab10c08689697120d4d7c152f30993defd36d3
Signed-off-by: Vara Reddy <varar@codeaurora.org>
Partial update commands are using static memory. For dual dsi,
both dsi's can manipulate on same memory, if partial update is enabled
on both of them. Change removes the static configuration.
Change-Id: I0ca16324a27427d13deaa9d18e3ab4f47fe1cc21
Signed-off-by: Vara Reddy <varar@codeaurora.org>
CWB, DP and WB displays tear down sequence must reset
3d_merge, ctl, pingpong_binding, etc. MDP HW
blocks. This change fixes the tear down
sequence register programming. It also moves flush
sw reset before encoder_disable call. That allows
CWB tear down to update the flush configuration
on primary ctl path.
Change-Id: I21c521b39456af4144cf836c65d46a25c985f51d
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
This change updates the DSI PHY sequence for Kona target as
per latest HW team recommendation.
Change-Id: I20f6a81bb1112e9e976acae595b985dad7ad4b7a
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
This change updates the DSI PHY PLL programming for kona target
as per the hardware recommendation.
Change-Id: I706169fb635e72bd0ccd3057107ea749408733d0
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
Currently trace always shows up on same process as caller, add
an additional function to allow attaching trace to any process.
Change-Id: I8fc124f9d1cfae28d1868a9a3067d0e92eda934e
Signed-off-by: Adrian Salido <salidoa@google.com>
(cherry picked from commit 52ba2d3585eb49c5d5b90b3cd75e0abe5c984dad)
Signed-off-by: Christopher Braga <cbraga@codeaurora.org>
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
Trace counter is not properly showing up on trace as is. Replace it with
proper format by refactoring existing trace to be more generic.
Bug: 119295905
Change-Id: I50abb593cd67c10ceed115380ac0e9d2177f0963
Signed-off-by: Adrian Salido <salidoa@google.com>
(cherry picked from commit 89ac1949eaa1524e4e2bbd2ad8c8b6513ae594dd)
Signed-off-by: Christopher Braga <cbraga@codeaurora.org>
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
Unpaired trace "sde_power_resource_enable" caused tracer parse
incorrect trace points and display weird state on Chrome. Make
trace "sde_power_resource_enable" pair to fix it.
Bug: 122510119
Test: Checked sde trace can be displayed correctly on Chrome
Change-Id: I938b5648a09e00eaea59070af31a2e6469763087
Signed-off-by: Midas Chien <midaschieh@google.com>
(cherry picked from commit 3a335059bf7a200977e8f4e0a4aa5c6ceca3863a)
Signed-off-by: Christopher Braga <cbraga@codeaurora.org>
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
Change updates connector edid node with proper panel physical
dimensions based on panel device tree file.
Change-Id: I36db9c3e5b5aee926a0d029ae742166fc8c7591c
Signed-off-by: Vara Reddy <varar@codeaurora.org>
Change batches max packet size and read command together, so that
for each esd read, there will not be two independent command transfers.
Without batching sometimes esd thread can hold the panel mutex for
longer time, which can cause framedrops as crtc thread can be blocked on
panel lock to send partial update command and kickoff next frame.
Change-Id: I101283a2559b616911f4312421acb00a8f154dba
Signed-off-by: Vara Reddy <varar@codeaurora.org>
Add checks for LTM sw fuse value to only install the LTM properties
when the LTM sw fuse is set to enable.
Change-Id: I6876bfcf12ddb912e7b7a80e07c33108fd4b85b9
Signed-off-by: Ping Li <pingli@codeaurora.org>
Since other driver module could not use msm_drm function,
then the notify function was moved to drm_panel. So used
the new drm_panel notify API instead of the old one.
Change-Id: I053992d74125807ccbf8991e3ac771dfc3eef732
Signed-off-by: Yuan Zhao <yzhao@codeaurora.org>
Highest bank bit property is read from device-tree, else set
to default value based on DDR type.
Change-Id: I8b31d957e29071b599a7f983cbf8300e293e9e36
Signed-off-by: Prashant Singh <prasin@codeaurora.org>
Set drm_panel to drm_connector. It can get drm_panel
from connector for other usage.
Change-Id: I68430be8aa05f140b88592c38db8e79aa96dafe6
Signed-off-by: Yuan Zhao <yzhao@codeaurora.org>
A new API to get drm_panel from dsi_display.
The drm_panel was defined as a member of drm_connector.
When doing connector initialize, can set drm_panel to
drm_connector. So this API is needed to get drm_panel
from dsi_dsiplay.
Change-Id: I0ec9de5a9407085048a8fef421b7b28d466085ed
Signed-off-by: Yuan Zhao <yzhao@codeaurora.org>
When there is a change in resolution or FPS, a new clock rate is
calculated. During such a Dynamic Mode Switch, the clock rate
change pending flag needs to be set after it has been calculated.
This flag is later checked before kickoff and the clocks are updated
accordingly.
Change-Id: Iec102796d5c61d01c567f0b6676e9a6d4ed94268
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
When secondary display preference is determined and 2 layer
mixers are required, the preference must check LM pair mask
to meet hw restrictions.
Change-Id: I22845be84f95659a58be98ff11afa4e652fb16e3
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
Update the PLL and PHY power on and clock set sequence as per
the hardware recommendations. Move the post link clock phy enable
part to the catalog so that it can be programmed after enabling
link clock.
Change-Id: I9b3b49e5a9ac93bebcb1cb7da63b715a8d5ed85c
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
Reset the dp sink power state during panel init.
Sinks may still be in old power states from
previous sessions, so reset the power to allow
for a clean start to the dp session.
CRs-Fixed: 2453351
Change-Id: I7e2a4c9bcdb8f69d2562ba098d80a1c7e8f9f620
Signed-off-by: Fuad Hossain <fhossain@codeaurora.org>
This change is a snapshot of dsi files taken of 4.14
as of commit 764f7c2 (Merge remote-tracking branch
'quic/dev/msm-4.14-display' into msm-4.14)
Change-Id: I8361a844c35a4450f7800964a8da2741676fd6c7
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
The drm_panel defined in sde_connector was not used, so
removed it.
Change-Id: I70a94f11ebd60362d25e37a256f46d3d4942089d
Signed-off-by: Yuan Zhao <yzhao@codeaurora.org>
SDE fence driver avoids duplicate fence creation if
fence timeline is not increased. This may lead to issue
if client closes the fence with failure ATOMIC_COMMIT.
SDE fence driver provides the closed fd node to subsequent
valid commit and leads to invalid state. This patch avoids
duplicate fence creation from crtc and connector object
instead of sde_fence.
Change-Id: Ic7b43762f0ad251fb20e42edb5f4d5f401790e14
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
