Support different safe, danger and creq qos lut
configuration based on display fps. It also removes
the fill level calculations from sspp and wb block
because mdss hw supports simple configuration.
Change-Id: I203e4300c9eab27d3632c890bedd6383cca0e5a8
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
This change updates the block offsets for concurrent writeback
blocks and fixes the register dumping logic.
Change-Id: I41b540773fea60e66cab5d476dff1a19b4f4b3db
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
CWB, DP and WB displays tear down sequence must reset
3d_merge, ctl, pingpong_binding, etc. MDP HW
blocks. This change fixes the tear down
sequence register programming. It also moves flush
sw reset before encoder_disable call. That allows
CWB tear down to update the flush configuration
on primary ctl path.
Change-Id: I21c521b39456af4144cf836c65d46a25c985f51d
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
This snapshot ports changes from 4.14 to 4.19 into
the msm and sde layer. Snapshot was taken as of
commit 0f8fb25421ff ("cnss2: Add device version to
SOC info structure").
Change-Id: I59b799a78319c2db6930a2a10bc38976f8c09898
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
This change brings msm display driver including sde,
dp, dsi, rotator, dsi pll and dp pll from base 4.19 kernel
project. It is first source code snapshot from base kernel project.
Change-Id: Iec864c064ce5ea04e170f24414c728684002f284
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
