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Gráfico de cometimentos

2596 Cometimentos

Autor(a) SHA1 Mensagem Data
Veera Sundaram Sankaran
76e7c6acd3 disp: msm: sde: use crtc_width instead of hdisplay for crtc/lm
The interface resolution can be different from crtc/layer-mixer WxH
when certain features like destination scaler are enabled. Use the
sde_crtc_get_width/sde_crtc_get_mixer_width functions throughout
to get the correct crtc/lm size based on different features enabled.
This will help in validating/configuring lm & plane correctly.

Change-Id: I45de5844bf7465a3389cf723479c5449a835fb0a
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2021-11-17 14:56:19 -08:00
Veera Sundaram Sankaran
e1c71c86e5 disp: msm: sde: add ubwc error status for writeback
Add support to read and clear the ubwc error status for wirteback.
Log the status during writeback timeout cases to help in debugging.

Change-Id: I11f3827d4a88565b81b21b651971cec55ba06298
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2021-11-17 14:56:11 -08:00
Veera Sundaram Sankaran
762252400d disp: msm: sde: expose early-wb-fence option for 2-pass composition
Add a writeback connector property EARLY-FENCE-LINE to give usermode
the control on when to trigger the retire fence. This option is useful
in 2-pass composition, where the writeback triggers the retire-fence
early based on the prog-line which allows primary to start the fetch
before wb transaction is fully completed. This helps to keep the clks
and bw low. WB hardware generates the line-ptr-irq when wb output reaches
the configured prog-line. Retire fence is triggered based on the irq by
default and wb-done handles for cases where line-ptr-irq is missed.

Change-Id: I20867979693dc3447f77da24cd7e88305947fb6d
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2021-11-17 14:56:03 -08:00
Veera Sundaram Sankaran
95300ca3df disp: msm: sde: add programmable lineptr support for writeback
From MDSS 9.0, writeback supports a programmable lineptr support, which
generates an interrupt when the configured writeback output height is
reached. Add software support to configure the prog_line and to process
the interrupt.

Change-Id: I3293ad2984c51417e4691c5b11e9c9a010067e1c
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2021-11-17 14:55:46 -08:00
Veera Sundaram Sankaran
0cf7ba9a4a disp: msm: sde: add all frame-trigger modes support for writeback
Currently, writeback frame-triggers are serialized by default. Add
logic to support the different frame-trigger modes which can be set
through the connector property or encoder debugfs node.

- default: waits for frame(N-1) completion (wb-done-irq) before
  configuring current frame(N) and releases the commit-thread on
  frame-start (ctl-start-irq)
- posted-start: no previous frame(N-1) completion wait. Configures
  frame(N) and releases the commit-thread on frame-start (ctl-start-irq)
- serialize: no previous frame(N-1) completion wait. Configures frame(N)
  and releases the commit-thread on frame(N) completion (wb-done-irq)
  (wb-done-irq) before configuring the next frame.

Restrict wb posted-start support only for MDSS 9.x+ targets, with older
targets defaulted to default-mode.

Change-Id: Id441378fd79ecbfcfb820da1ff23b14ccfd8e798
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2021-11-17 14:54:41 -08:00
Veera Sundaram Sankaran
5a1c44d2e2 disp: msm: sde: add ctl-start interrupt support for writeback
Add ctl-start-irq support which serves as an indication the
HW read the current frame's configuration and software is free
to program the next frame.

Change-Id: I9f6b180cf9e47894ca81d2d4b6ac724827d1368c
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2021-11-17 14:54:33 -08:00
Veera Sundaram Sankaran
eeb66b8516 disp: msm: sde: wait for tx-done during cwb disable
Currently, cwb disable path issues a cleanup flush & waits for the
commit-done. Wait for the tx-done to ensure the transfer is complete.

Change-Id: I509711c157f1d6646646ad96ed140d6bc76d2dba
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2021-11-17 14:54:25 -08:00
Veera Sundaram Sankaran
30d5ac5184 disp: msm: sde: remove vblank support for writeback
Avoid drm vblank on/off for virtual displays to allow drm framework to
ignore the vblank requests. Vblanks are unnecessary for writeback as it
is triggered based on the frame-updates and not on any defined interval.
In addition, avoid vblank callback registration for concurrent writeback
encoder.

Change-Id: I205734e2e3076469dc7f775566cf5e104bac4082
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2021-11-17 14:54:18 -08:00
Veera Sundaram Sankaran
1428cbb7d0 disp: msm: sde: remove unnecessary wb feature flags & reg-offset
Remove the hw feature flags that are set by default for writeback as
it does not add any value. As part of the change, remove the unused
wb register offsets.

Change-Id: I04376242e764d8d0a1edb763c9f799d7ae5447ac
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2021-11-17 14:54:10 -08:00
Veera Sundaram Sankaran
f57c003810 disp: msm: sde: remove wb kickoff/frame count & bypass_irqreg logic
Remove the writeback kickoff_count/frame_count & start/end time
logging. These are redundant counters used for debug purpose. The
pending_retire_fence_cnt and event-logs timestamp can be used for
this purpose. Remove the bypass_irqreg flag as well as its not used.

Change-Id: I1644325afc214f75c76baad615da90c8114836cc
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2021-11-17 14:54:03 -08:00
Amine Najahi
d36499ca86 disp: msm: sde: add support for DMA 4,5 for Kalama
Expand various SSPP and CTL related data structures
to support DMA 4,5.

Change-Id: I0ce052b6a2f1599a9b6eb82ce8e4f34f4c68333d
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
2021-11-17 17:12:31 -05:00
Amine Najahi
2d3a255c06 disp: msm: sde: enable VBIF clock split feature for Kalama
Enable VBIF clock split feature in catalog for Kalama target.

Change-Id: I84b92764b62012955ae153e228b890bacfe1587e
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
2021-11-17 13:31:05 -05:00
Amine Najahi
c8a4cdc761 disp: msm: sde: add support for WB VBIF clock split
Add support for localized CLK_CTRL access through WB
hardware block.

Change-Id: I408d1bbc798902d1abc7da5bcae9492baa3159c8
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
2021-11-17 13:30:55 -05:00
Amine Najahi
c526f4aefa disp: msm: sde: add support for SSPP VBIF clock split
Add support for localized CLK_CTRL access through SSPP
hardware block.

Change-Id: I86345c94cb12c5584337aa45b562bceaab6cf8e6
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
2021-11-17 13:25:21 -05:00
Amine Najahi
ca4acd5270 disp: msm: sde: add support for split VBIF clock access
From Kalama onwards, the VBIF CLK_CTRL register has been moved from TOP block
to individual hardware block memory range.

This change is adding a backward compatible solution to support
per block VBIF CLK_CTRL access by allowing each HW block to register
set of callback ops. Additionally, it adds DMA and IPCC/MSI VBIF CLK_CTRL
block type.

Change-Id: Ia82ced34cfa1636b57cd1c03b327faf923be482a
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
2021-11-17 13:22:22 -05:00
Jeykumar Sankaran
15342a23fe disp: msm: sde: add kalama mdss version support
Add kalama mdss revision and enable features based
on the hardware capability.

Change-Id: I27dff07b00ba16d313c5c8dc2661a10e522daea5
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
2021-10-26 11:34:59 -07:00
Steve Cohen
d9794d82cd disp: msm: sde: remove sde_hw_blk
The sde_hw_blk was meant to be a generic base object for all
SDE HW blocks, however, it enforces using a common set of ops
which is not practical when blocks have different capabilities.
Since this object was never used as intended and is not doing
anything functional today, remove the dead weight.

Change-Id: If76006c1ae5c62e8d7d77b100837dbaf6c661bd3
Signed-off-by: Steve Cohen <quic_cohens@quicinc.com>
2021-10-26 11:34:59 -07:00
Steve Cohen
5fe7c2f8a0 disp: msm: remove gem functions without callsites
Many upstream files and APIs have been removed in downstream
driver. Some function definintions are left dangling without
any caller. Remove the functions which are not used downstream.

Change-Id: I9f936e7cdac3be6f854b3c67725164fad785f0d4
Signed-off-by: Steve Cohen <quic_cohens@quicinc.com>
2021-10-26 11:34:59 -07:00
Steve Cohen
a683fba2e8 disp: msm: sde: use common naming for version/revision in catalog
Align the HW catalog to use common naming amongst the "revision"
and "version" structure members.

Change-Id: Ib6c81aee6cb49208b0699db4a75b4eb9dc79e800
Signed-off-by: Steve Cohen <quic_cohens@quicinc.com>
2021-10-26 11:34:59 -07:00
Steve Cohen
7f0c843da4 disp: msm: sde: move boolean flags in catalog to a bitmap
Move all the individual boolean flags from HW catalog into a
"features" bitmap. These flags are used to specify support of
various target specific features.

Change-Id: I2334b3b873f3737f91bbae4ef576408247710156
Signed-off-by: Steve Cohen <quic_cohens@quicinc.com>
2021-10-26 11:21:33 -07:00
qctecmdr
5f25adc693 Merge "disp: msm: dsi: add const qualifer for device node in get_named_gpio" 2021-10-20 09:37:40 -07:00
Jeykumar Sankaran
8c1a66d6bd disp: msm: dsi: add const qualifer for device node in get_named_gpio
Add const qualifier for the device_node param in get_named_gpio
function pointer hook to adapt msm-5.15 kernel.

Change-Id: I0129efeff5aeb85b567bf6f2b5d2e45312fab024
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
2021-10-15 17:31:55 -07:00
Ingrid Gallardo
b3d598b926 disp: msm: sde: remove memblock_free api
Remove memblock_free api, since currently is not
part of the ack tree. This prevents modpost compilation
errors for the display driver.

Change-Id: I8f657a123fbecc5d4b029d511b8d08fec2293f0c
Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
2021-10-15 17:31:51 -07:00
Ingrid Gallardo
de3e31a08a disp: msm: sde: adjust list_sort api to adapt kernel 5.15 params
Latest Kernel modified list_sort to receive 'const' parameters in
its function pointer, this change modifies the functions used
by list_sort to add 'const' parameters.

Change-Id: I83212e1e7a749132c90011d0a8933c5eb2990bd2
Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
2021-10-15 17:31:47 -07:00
Ingrid Gallardo
cb20292c2d disp: msm: add build configs for Kalama
Add config files for kalama target and enable compilation.

Change-Id: I4ddd89ef927b32c70b66c54e64a8ae5156cccb29
Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
2021-10-15 17:31:30 -07:00
Bruce Hoo
45160ca04c disp: msm: use linux IRQ interfaces instead of DRM helpers
Update the msm layer to use linux IRQ interfaces as DRM IRQ helpers
are removed in 5.15 kernel.

Change-Id: I9f41032927cddabe8a5a48e5e9339acef6c6f67e
Signed-off-by: Bruce Hoo <bingchua@codeaurora.org>
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
2021-10-15 17:27:48 -07:00
Bruce Hoo
d1d11731f1 disp: msm: update msm_gem ops and remove unused drm_driver callbacks
Update msm_gem and msm_drv to comply with latest 5.15 kernel.
Modify dma_buf_vmap() and dma-buf's vmap callback to use
struct dma_buf_map. Rename dma_resv_get_excl_rcu to _unlocked.
Remove deprecated GEM and PRIME callbacks.

Change-Id: Ifdfc7f872c988d8455f465e7d17dfbcf212bb5f6
Signed-off-by: Bruce Hoo <bingchua@codeaurora.org>
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
2021-10-15 17:27:27 -07:00
Bruce Hoo
283560cb39 disp: msm: dp: use Extended Base Receiver Capability DPCD space
Pass additional parameters to supply maximum lane count and
rate to MST topology manager. In cases where sources have
lower maximum lane count or rate than default MAX_LINK_RATE,
these values will be used instead.

Change-Id: I9278ce6cc9fbacaf3f6d964c5036208c0695a79b
Signed-off-by: Bruce Hoo <bingchua@codeaurora.org>
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
2021-10-15 17:27:11 -07:00
Bruce Hoo
bfb91aa63f disp: msm: Fix a null pointer access in msm_gem_shrinker_count()
This change moves the point at which msm_gem_object is added to
inactive list. Moving this ensures that initialization will be
complete before adding the object to the list. This change also
removes unused functions from msm_gem.c.

Change-Id: Id8fa04cc88a21e04108ae21b18d5acc761ef4c6e
Signed-off-by: Bruce Hoo <bingchua@codeaurora.org>
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
2021-10-15 17:27:01 -07:00
Bruce Hoo
bf0d2209a0 disp: msm: dsi: add _NO_ to MIPI_DSI_* flags disabling features
Update names of DSI flags to follow upstream convention. Purpose of
the name change is to more clearly indicate what is not supported
when the flag is set.

Change-Id: Ifd62610c4dfebcbbccb0fb2046a7c453e39c9107
Signed-off-by: Bruce Hoo <bingchua@codeaurora.org>
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
2021-10-15 17:26:53 -07:00
Bruce Hoo
ddac29b52c disp: msm: Pass the full state to crtc plane and connector atomic functions
Pass full state to crtc, plane, and connector atomic functions and retrieve
drm_crtc/plane/connector_state within the atomic function. Additionally,
the plane atomic update function is used as an upstream hook as well as
locally called in the plane restore path. To ensure both paths are functional,
introduce a plane atomic update version which takes in drm_plane_state
keeping with the previous parameter expectations.

Change-Id: Ia295935dd81ea8680a347eba0929e209d93ae830
Signed-off-by: Bruce Hoo <bingchua@codeaurora.org>
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
2021-10-15 17:26:44 -07:00
Bruce Hoo
1ef7ff26d6 disp: msm: dp: pass drm_dp_aux to drm_dp_link_train* APIs
Pass additional parameter drm_dp_aux to drm_dp_link_train APIs
in order to use drm_dbg_* within those functions.

Change-Id: Icc111ecce78fbbac77eb044ce4200377d3616fc9
Signed-off-by: Bruce Hoo <bingchua@codeaurora.org>
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
2021-10-15 17:26:33 -07:00
Jeykumar Sankaran
095265339d disp: msm: sde: include of_common header for usage
Include of_common header file explicitly to use
of_fdt_get_ddrtype().

Change-Id: Idd814d6188d585b2d0ecd6935f3260a79d15401b
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
2021-10-15 17:26:23 -07:00
Jeykumar Sankaran
3f072ce464 disp: msm: dsi: avoid using devm_pwm_put
API got deprecated in kernel 5.15. Remove the usage.

Change-Id: I10c4fdee1074fcf50ae4fe28124692dae7a31c7c
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
2021-10-15 17:26:09 -07:00
Jeykumar Sankaran
425df29bb6 disp: msm: sde: avoid checking debugfs_create_bool return value
Adapt 5.15 kernel upstream change to return void for debugfs_create_bool.

Change-Id: I9f2ece04dddeba8f43d603fbb62517ea5fb48e7c
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
2021-10-15 17:25:51 -07:00
Jeykumar Sankaran
0192a3616e disp: msm: sde: remove drm_irq header
Remove deprecated/unused header inclusion.

Change-Id: I0b0adc155b154c05f814c02cbff4945484896963
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
2021-10-15 17:25:39 -07:00
Jeykumar Sankaran
83ddc159d0 disp: msm: remove stale ION references
After adapting dma buf api's these references and
paths are unusable. Clean it up.

Change-Id: Id6fa76945132e312e8bacf6e430633b0db9e48a3
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
2021-10-15 17:24:53 -07:00
Lei Chen
8f074719a5 disp: msm: replace msm_smmu_set_attribute with qcom_iommu_enable_s1_translations
Domain attributes has been deprecated on 5.14 kernel, so replace
msm_smmu_set_attribute with qcom_iommu_enable_s1_translations.

Change-Id: I1bf2d5ee089a418eb73605327e82b2e26bd6bada
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
2021-10-15 17:23:25 -07:00
Jeykumar Sankaran
6a3c793980 Revert "disp: avoid display techpack compilation for Kalama QMAA mode"
Reverting the temporary change merged to disable display dlkm compilation.

This reverts commit 87019ed83e.

Change-Id: If4e047aecf3b65e44fb506f084eeee3e65873650
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
2021-10-15 17:22:57 -07:00
Alisha Thapaliya
00fb8baa9d Merge remote-tracking branch 'quic/display-kernel.lnx.5.10' into display-kernel.lnx.1.0
* quic/display-kernel.lnx.5.10:
  disp: msm: sde: disable vsync_in to update tear check
  disp: msm: dsi: flush workers during pre-release
  disp: msm: dsi: swap DSI timing engine programming and ROI cmd tx
  disp: msm: sde: reset dsc mux config in encoder disable
  disp: msm: sde: avoid dsc hw allocation switch for an active display
  disp: msm: dsi: add support for non 1/1 MND dividers

Change-Id: I69491902ce0bf6391303e407d06cc6a4cd3087a2
2021-10-13 15:51:58 -07:00
qctecmdr
b1e561d3f5 Merge "disp: msm: sde: disable vsync_in to update tear check" 2021-10-12 13:00:35 -07:00
qctecmdr
493cb4b048 Merge "disp: msm: dsi: flush workers during pre-release" 2021-10-11 13:32:47 -07:00
qctecmdr
721fee5459 Merge "disp: msm: dsi: swap DSI timing engine programming and ROI cmd tx" 2021-10-08 14:35:59 -07:00
Dhaval Patel
daa4273e02 disp: msm: sde: disable vsync_in to update tear check
Commit b67da33a6307 ("trigger tx_wait if panel
resolution switch") increases the mode switch latency.
Alternatively, single buffer tear check registers can be
updated when vsync_in is disabled. It allows mode switch
frame trigger as posted start frame trigger.

Change-Id: I8068736b2ea01f6e4160e765fc39d7fc2a8590c9
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
2021-10-08 13:29:45 -07:00
qctecmdr
11bda1ae79 Merge "disp: msm: dsi: add support for non 1/1 MND dividers" 2021-10-08 10:40:51 -07:00
qctecmdr
fba8cf7c57 Merge "disp: msm: sde: reset dsc mux config in encoder disable" 2021-10-07 21:23:56 -07:00
Jeykumar Sankaran
754552cfc4 Merge branch 'display-kernel.lnx.5.10' into display-kernel.lnx.1.0
* waipio_base:
  disp: msm: sde: add new support for digital dimming
  disp: msm: sde: trigger tx_wait if panel resolution switch
  disp: msm: reserve core clock rate during display disable
  disp: msm: dsi: reorder DSI registration
  disp: msm: sde: account for pref lm when exposing avail resources
  disp: msm: reset lm blend stages for missing vsync
  disp: msm: dp: set drm mode clock same as clock value from EDID
  disp: msm: sde: set top left coordinates for noise and attenuation layers
  disp: msm: dp: disable ASSR before link training
  disp: msm: dp: retry the request to set USB mode during bootup
  disp: msm: sde: clear intf mux select on slave encoders
  disp: msm: retry dma buf attach on msm_gem_delayed_import error
  disp: msm: dp: check for aux abort in sim mode
  disp: msm: dsi: add qsync min fps val in dsi display mode priv info
  disp: msm: dp: read DPCD registers using debugfs
  disp: msm: dsi: mark signature for stub appropriately
  disp: msm: dp: check for DP stream during audio teardown
  display: msm: sde: reduce dbg mem usage for tui vm

Change-Id: I285e4557ad258f17fc2948b478198b9b81c18276
2021-10-07 16:19:39 -07:00
Steve Cohen
bd01b504a5 disp: msm: dsi: flush workers during pre-release
Wait for asynchronous DSI DCS command transfers to complete
before disabling DSI interrupts during pre-release. This is
required to resolve a race condition where dsi worker threads
can trigger HW access while a VM lend/release is occurring on
the CRTC commit thread.

Change-Id: Ia1f153a2cd008c617dba274473e7678b01a38d29
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2021-10-07 17:24:57 -04:00
Satya Rama Aditya Pinapala
bcd04f60da disp: msm: dsi: swap DSI timing engine programming and ROI cmd tx
The ROI commands are sent with an asynchronous command transfer wait.
If the queued CMD DMA wait for done gets scheduled before the DSI
controller timing engine programming, the later will be blocked waiting
on the ctrl_lock, which was acquired by the queued DMA wait for done work.
This effectively negates any advantage of having the async wait flag for
ROI commands blocking the main commit thread.

The change swaps this order to ensure that such a scenario never happens.

Change-Id: I8a971c0c7733eea3d435b637ca41b34fa60adfc1
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2021-10-07 10:58:32 -07:00
qctecmdr
c460ffbd27 Merge "disp: msm: sde: trigger tx_wait if panel resolution switch" 2021-10-07 01:25:29 -07:00