enable the wsa and wsa2 clk as per sequence.
Change-Id: Ieefa4b6ea7aec535d940d780b0ed923483b4d3ee
Signed-off-by: Ganapathiraju Sarath Varma <quic_ganavarm@quicinc.com>
Unmute WSA after enabling main path for
ADIE loopback cases.
Change-Id: I850aa4dbcf77371811010c1d614c6c7e94736971
Signed-off-by: Eric Rosas <quic_erosas@quicinc.com>
lpass_cdc_register_macro can be called simultaneously by different
macros as bootup resulting in inconsistent value of
num_macros_registered. This will result in one of macro going ahead and
registering lpass-cdc component and other macro failing to register which
will cause probe of other macro to fail. Protect function with mutex lock
so that macros access it sequentially
Change-Id: I9d3811eeceb06b6a7e66d79a1b899b2c4283bb52
Signed-off-by: Yuhui Zhao <quic_yuhuzhao@quicinc.com>
Remove platform_max setting in WSA/WSA2 drivers
to correct the volume range for digital volume.
Change-Id: Ia87c9fbeacc7bbb37b02f707b5c624a4091251d9
Signed-off-by: Sam Rainey <quic_rainey@quicinc.com>
add support to select PDM or PCM path in rx macro with the help
of mixer ctls.
Change-Id: I803e0bf440c1b3546cbda23e49736addb9083d92
Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
Use VA_CORE_CLK without LPI Enable mixer cntl for SVA usecases,
To keep usecase in LPI mode even in corner cases.
Change-Id: I45da244b8a992b1ff043ab4b401903376c5cff90
Signed-off-by: Ganapathiraju Sarath Varma <quic_ganavarm@quicinc.com>
When switching from 16KHz to 48KHz recording, mute issue happens.
Addd TX datapath reset during path teardown to resolve this issue.
Change-Id: I7445b397c20ce4e4968fec2326267f63dcba5a8c
Signed-off-by: Meng Wang <quic_mengw@quicinc.com>
Disable the common pbr clk register only when no one uses
RX0 and RX1 channels.
Change-Id: Ia5fab1d3e4be7d9ecb01ad0b612b9f6ef7406bea
Signed-off-by: Ganapathiraju Sarath Varma <quic_ganavarm@quicinc.com>
During SSR down event,
ensure swr gpios are put to sleep even in error conditions.
Change-Id: I649d088d0bc429c9b7a02304272eaea06774ca51
Signed-off-by: Ganapathiraju Sarath Varma <quic_ganavarm@quicinc.com>
Enable the clk as per sequence.
Change-Id: I54d6981a70b218d4655514bb69ff39a7581264a2
Signed-off-by: Ganapathiraju Sarath Varma <quic_ganavarm@quicinc.com>
updated the out of bound check for comp_mode
if any such occurence happens setting it to default mode.
Change-Id: Ie4a7275d45af6a96f1a2ec4b6ece6dc7a5dca464
Signed-off-by: Ganapathiraju Sarath Varma <quic_ganavarm@quicinc.com>
add pm stay awake before the queue delayed work to avoid the when apps suspend.
Change-Id: Iad4d55d509e800b352ac7cb8afb0824a89c80c40
Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
Enable the VI decimator at the end of Rx and VI enable sequence.
Change-Id: I12045c903b29d4cc830dbbfd242d805a629c0efd
Signed-off-by: Vangala, Amarnath <quic_avangala@quicinc.com>
Update ch_msk and audio path for VI feedback path
in lpass_wsa2 macro.
Change-Id: Ibc96fc1ad82e2e996b11af20522f35e47b94d8f0
Signed-off-by: Ganapathiraju Sarath Varma <quic_ganavarm@quicinc.com>
After ADSP is up during SSR, core_hw_vote may fail and audio_hw_vote
may successed in lpass_cdc_runtime_resume which is caused some timing.
When getting slave device_id, as core_hw_vote is 0, it will skip reading
swr registers and return 0 which causes fail to read correct device_id.
Make this change to avoid calling lpass_cdc_runtime_resume when adsp_up
notification doesn't reach lpass_cdc.
Change-Id: I90a97e5c47bb95180a96ba1c60b462f1fa0124b7
Signed-off-by: Meng Wang <quic_mengw@quicinc.com>
Signed-off-by: Kunlei Zhang <quic_kunleiz@quicinc.com>
Implement backend for CPS soundwire port in Bolero.
Change-Id: Ibbd38d067e46be1a71723de04a83bc83f0ec2925
Signed-off-by: Vangala, Amarnath <quic_avangala@quicinc.com>
Propagate all changes to lpass-cdc-wsa-macro to
lpass-cdc-wsa2-macro. Leave get_channel_map alone
because it is wsa macro specific.
Change-Id: I46733a759490d488f46eda24b4006a1dec63c7cc
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
update check not to exceed the array index for active_ch_mask and active_ch_cnt
Change-Id: Ic6d72d7469edbd004cd34a709384d527e90cd26f
Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
Update digital_cdc_rsc_mgr_hw_vote_enable/disable API with device
info for easy debug. Also, add swrm clock enable checks during SSR.
When SSR happens, swrm->hw_core_clk_en and swrm->aud_core_clk_en will
be reset without resetting audio_vote and core_vote clk. This would
cause clk mismatch in audio driver and adsp and device fails suspending
when there's no audio usecase. Make this change to reset audio_vote
and core_vote clk when receiving SWR_DEVICE_SSR_DOWN.
Change-Id: I9875aac9f6faf8b6481457a70f31b005073369e0
Signed-off-by: Meng Wang <quic_mengw@quicinc.com>
Decrease idle holdoff time from 60 to 29 samples as per updated
documentation.
Change-Id: Ia8786020d6de8320f057f418e743507030c734c8
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
New requirement to update compander_ctl7 again_delay
field to 7.
Change-Id: I4c5ef15c645cabded50203bf92facbe7c8ff8c5b
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
Update from SOC_ENUM to SOC_SINGLE to match rest of driver
implementation. Also remove remaining dev_mode enum references
in wsa884x driver.
Change-Id: I2a477c4fa8c29373ffa1e8e2eb599a0f1c61653d
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
Match datatypes of variables in
lpass_cdc_va_macro_enabl_dmic() with
lpass_cdc_dmic_clk_enable() to prevent CFI issues.
Change-Id: Id378476b1aa6231c8542ca754124716af2b1f50b
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
