This change populates values for per_pipe_bw_high
from the device tree. This value is exposed to userspace
as the bandwidth per pipe available in the no VFE
scenario.
Change-Id: I61346ee55dfd4b6b0736ecf0b96e061f4f3934c3
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
Fix possible out-of-bound access and NULL pointer
dereference in SDE and PLL driver.
Change-Id: Ic5c34b3b4c3e983413a0351c38206cf3f3ab3b1f
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
Log ping-pong current line count during ctl-start
and rd-ptr interrupt. This will help in debugging
ping-pong timeout issues.
Change-Id: I58185330fe9e8a64f48d6da60c974b23a9e68b44
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
Reduce the log level from error to debug for invalid
master encoder in encoder restore path during idle
power-collapse. This would avoid unnecessary logging
when concurrent writeback gets enabled after a
power-collapse event, the restore happens based on
encoder_mask attached in the crtc before the actual
enable call for the cwb encoder.
Change-Id: I54cd7de62f1a9030f68a963c8ed27ff098302e04
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
Perform mst phy operations during suspend/resume
to allow sinks to be in a correct state. A usbpd
api must also be called before and after the phy
operations to allow the system to go into deep
suspend and resume in a timely manner.
CRs-Fixed: 2363921
Change-Id: Ie21ef9b1caf2044e598466373a6059d2a1e5e58c
Signed-off-by: Fuad Hossain <fhossain@codeaurora.org>
Remove the redundant register dump sub range
registration for DSI ctl/phy as it needs only
the base registration, since it is considered
as a single block.
Change-Id: I11546bfcde05d02849c53577c4546dcfa9203539
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
When trying to get the display up on my sdm845 board I noticed that
the display wouldn't probe if I had the dsi1 node marked as "disabled"
even though my board doesn't use dsi1. It looks like the msm code
adds all nodes to its list of components even if they are disabled. I
believe this doesn't work because all registered components need to
come up before we finish probing. Let's do like other DRM code and
only add available components.
Change-Id: I00738a7f9fa572f12067066e86ea7974693b3aab
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Link: https://patchwork.kernel.org/patch/10712329/
Git-commit: d1d9d0e1724d6a7123b4280fdf6630ae70f96c9c
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
Add extra sleep between SST and MST mode if MSTM_CTRL is not cleared
at hpd to make sure dongle exit from previous MST state.
CRs-Fixed: 2411911
Change-Id: I5b1785c71a91df95167bf5083e9d752a275872a8
Signed-off-by: Xiaowen Wu <wxiaowen@codeaurora.org>
Signed-off-by: Fuad Hossain <fhossain@codeaurora.org>
Use the EXTENDED_RECEIVER_CAPABILITY DPCD register fields,
if present, for enabling HBR3 link rate on supported targets.
CRs-Fixed: 2438457
Change-Id: I505d998f31f79162dc290fc47fd9fbba51527982
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
Add a release operation to free the mst port object when
the object refcount becomes zero.
Change-Id: If628e6da7ccf90d334574ed0f627788fb0a1fa2f
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
Add required changes to makefile and enable the configs
for LITO support.
Change-Id: If6da5a5c139220680b0892d0cc8d408a296f1635
Signed-off-by: Jayaprakash <jmadiset@codeaurora.org>
DSI display may support video mode and command mode both and it may
support transition between these two modes.
This change adds seamless transition between these two modes for DSI
display by avoiding crtc enable/disable and panel power on/off
during modeset.
Change-Id: Id7ddaef7d1f0f7cc7d52283755bad53a246adec6
Signed-off-by: Lei Chen <chenlei@codeaurora.org>
The DP HDCP layer fails to wait on and clear its internal thread
upon an HDCP stop or failure. This can result in use after free
failures if a read or write over aux channel operation is already
queued.
Update the DP HDCP layer to stop and wait on kthread completion
upon HDCP failures, and clear the kthread command queue before
resuming kthread execution. Additionally, ensure the SDE HDCP
worker thread correctly starts and stops execution upon HDCP
enablement and disablement respectively.
Change-Id: I4218d7935f89416b5e5d74afd8f5d22e031b9a38
Signed-off-by: Christopher Braga <cbraga@codeaurora.org>
The dma buffer associated with the gem object is already
unmapped during put_iova. Avoid unmapping it again in
put_pages.
Change-Id: Iac57e164dde6f3e5913070acbe74b42691049913
Signed-off-by: Krishna Manikandan <mkrishn@codeaurora.org>
Fix few DSC parameters related to 10 bits-per-component
10 bits-per-pixel configuration according to HW programming
guide.
Change-Id: I3ceb1eb9b1247440ef68800e9b62e9ffb7ec5b57
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
This change updates SSC offset value according to recent
hardware recommendation.
Change-Id: Ie822ed6ae8e383f93ca91615617dad4b4324b8a0
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
The divider clocks in the DSI PLL are 1-based and can accept
a value of 0. Set the flags accordingly in the PLL driver.
CRs-Fixed: 2433864
Change-Id: I82361ae3e2119f9e1922153bd5aba6354e8c5442
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
