Regulator_get is being moved with probe time for opertional
performance improvement. With this change regualtor phandle can
only be derive at power cycle. In case of power_on/down failure case
currently regulator phandle is set with NULL which can cause
failure in power related operation in all future sessions. This change
removes NULL setting to regulator phandle in failure case.
CRs-Fixed: 3052638
Change-Id: I4abec311416e852bbe1922024b05755e2b3a3d25
Signed-off-by: Jigarkumar Zala <jzala@codeaurora.org>
Currently in combo mode csiphy preamable enable is determined with
premalbe flag set previously and current sensor configuration setting.
In case of non combo mode usecase if config packet is coming back to
back current condition check misinterpret it as combo mode and fails
with incorrect operation. This change adds the combo_mode condition
check along with other to correctly detemine combo mode and non combo
mode usecase and behaves accordingly.
CRs-Fixed: 3054225
Change-Id: I59532405230ab23dfd42425f20bd1a108cc8ce14
Signed-off-by: Jigarkumar Zala <jzala@codeaurora.org>
Update 1.2Gsps datarate specific sequence to improve the
csiphy response and add margin for the boards with larger
insertion loss. New setting adds robustness to the csiphy
operation.
CRs-Fixed: 3042875
Change-Id: I6e93d35a6a026613eb6879f07759acef05e31794
Signed-off-by: Jigar Agrawal <jigar@codeaurora.org>
Enable PN9 infinite loop for test. Also move the PN9 status
check from polling to one time read at streamoff.
CRs-Fixed: 3054225
Change-Id: Ia4d8ff17e3c78f37adb68ad9a4afb076fe2bda45
Signed-off-by: Jigarkumar Zala <jzala@codeaurora.org>
The current implementation allows to pass uint_32 as
argument in the message callback. Changing it to (void *)
type so that any type of data can be passed in the future
implementations.
CRs-Fixed: 2847155
Change-Id: Ic52a5ccfe13efdba37bbcfdb7154ed789b1943fd
Signed-off-by: Shardul Bankar <sharbank@codeaurora.org>
Increase CSIPHY hw block support 8 for v780 and future
platforms.
CRs-Fixed: 3042539
Change-Id: Ib8c3c2bdde583ff5dc5ddb0a7b818dc8723b270f
Signed-off-by: Jigarkumar Zala <jzala@codeaurora.org>
Update 4Gsps data specific AFE tuning paramenters for CPHY
sensors. Also remove the CPHY specific only common parameter
from common configuration.
CRs-Fixed: 3042875
Change-Id: Icf8c0d49fdbb7da247dadb5c95cff6c984ce6850
Signed-off-by: Jigarkumar Zala <jzala@codeaurora.org>
Signed-off-by: Jigar Agrawal <jigar@codeaurora.org>
Increase hw block support for CCI to 3 for v780 and
onwards.
CRs-Fixed: 3042539
Change-Id: I4a6b594a22373047e243bfefa22d304eab969e71
Signed-off-by: Jigarkumar Zala <jzala@codeaurora.org>
CSIPHY version 2_1_0, secure phy mask is different for csiphy
hw 0/1/2/3 and hw 4/5. This needs to be configure before enabling
secure lanes. This change adds the appropriate version check to
perform this operation.
CRs-Fixed: 3039500
Change-Id: I8e856757886e880a6bf57ed4083ddf99cd325a7a
Signed-off-by: Jigarkumar Zala <jzala@codeaurora.org>
CPAS stops during shutdown needs to be done only for the TPGs which has
done the cpas start. This change add the state checks while tpg reset.
CRs-Fixed: 2998830
Change-Id: I4cdd9ec74daa65999ed5094a3c4a4c165b9a1569
Signed-off-by: Tony Lijo Jose <tjose@codeaurora.org>
Add more datarate specific setting ranges to cover the
finer gsps ranges. Dump all the common status registers
on the error rather than just the irq status registers.
CRs-Fixed: 3022770
Change-Id: I6dc5e8d695a40c1633c054e5420084f1ec771485
Signed-off-by: Jigar Agrawal <jigar@codeaurora.org>
Move the flag which decides whether to program the common
registers for csiphy for all the phy devices to dtsi file.
Common registers sequence should not be programmed for all
the Csiphys during stream on for SM8450 v2 device.
CRs-Fixed: 3020245
Change-Id: I91e6bb786868c1aae165c97751663593e46b8c5b
Signed-off-by: Jigar Agrawal <jigar@codeaurora.org>
CCI logging improvement to print the runnning
master and queue.
CRs-Fixed: 3014893
Change-Id: I65a0e2797956a66fe50660290a4f2ccb74c60cbe
Signed-off-by: Wang Kan <wkan@codeaurora.org>
Rearrange the CSIPHY sequence to move the on the go registers
right before csiphy release. Improve the logic for update lane
to spend lesser time in the routine. Change the AFE Settings and
move them to datarate specific field.
CRs-Fixed: 3015111
Change-Id: I6a355035b226d575b2fff33c885e9a3ea30a1256
Signed-off-by: Jigar Agrawal <jigar@codeaurora.org>
Signed-off-by: Jigarkumar Zala <jzala@codeaurora.org>
Currently early init pcr with torch mode is returning fatal error
with warning message. The operation still can be perform from the
flash hw prospective. This change removes the code break with
warning message and perform the on/off operation. Also, convert
streamon/streamoff specific ioctl call from debug to info log
for better operation trace.
CRs-Fixed: 2939386
Change-Id: Ib0b049231e9fba3956668a0aaca92b58599e358f
Signed-off-by: Jigarkumar Zala <jzala@codeaurora.org>
This changes is to detect workqueue and tasklet
scheduling and execution delay.
CRs-Fixed: 2977775
Change-Id: Ia4b4845a067c22bd1f24bd63a971d103fcfc049c
Signed-off-by: Ayush Kumar <ayushkr@codeaurora.org>
Register read writes are expected to go through wrapper
functions in presil so that they can be overridden by presil
code. Change register read during tpg start to use this wrapper.
CRs-Fixed: 2932495
Change-Id: Ib72f2de381e096bde146e4fb1ff8f5187eaa5717
Signed-off-by: Mukund Madhusudan Atre <matre@codeaurora.org>
In burst read flow, we need to wait CCI irq
once one set data is read, but the fifo may has
new data what can be read immediately and don't
need to wait the irq. This change also optimize
the irq processing, we can reset irq mask first,
then process the irq status, it can avoids some
timing issue, e.g. the read context runs too
quickly, then read context enable the read
threshold bit in irq mask1, but irq context runs
late, then irq context clear the read threshold,
then we can't receive read threshold again.
CRs-Fixed: 2995920
Change-Id: I8acfadf07b95782725bf4bf8b05b88789874c1da
Signed-off-by: Depeng Shao <depengs@codeaurora.org>
Append workq name in workq delay detect API to identify
which workq is scheduled late. Create workq name macros for
cci and cpas to pass to workq delay detect API.
CRs-Fixed: 2994927
Change-Id: Iebc14520b918272e92b59c900de5fe17f38a2406
Signed-off-by: Sokchetra Eung <eung@codeaurora.org>
Enhance csiphy reg dump to make them more readable
and allow them to be parsed by creating a parser.
CRs-fixed: 2992807
Change-Id: Idc5cfa6aa14c90adfeeaf398fa89ded51aeea350
Signed-off-by: Jigar Agrawal <jigar@codeaurora.org>
Currently all the csiphy debugfs entries are
populated in the same camera-csiphy folder.
This has make searching for a desired debugfs
for desired csiphy a little difficult. Move
all those debugfs entries to the respective
csiphy index directory for easy access.
CRs-fixed: 2992807
Change-Id: Ia48df672669c88a0dd72f051a7be3d8e043c7e7c
Signed-off-by: Jigar Agrawal <jigar@codeaurora.org>
Use Kernel time to obtain the current time when IFE is acquired
/released and when sensor is streamed on/off. Convert the Ktime
to a timestamp format and log it in existing info prints. This
will help to co-relate timestamp between user-space and kernel
logs. The change also replaces the current usage of direct calls
to ktime_get_real_ts64 with macro across all drivers.
CRs-Fixed: 2987320
Change-Id: I87c4790164d222fc1ed6ff41ad00eeb1ed8c8867
Signed-off-by: Sokchetra Eung <eung@codeaurora.org>
Update csiphy2.1.0 reset sequence to not relese the reset
during the reset sequence. Add support to read cphy lane
status register after programming the csiphy. Program
datarate specific settings before programming the lane
registers. Add a delay of 100us before and 1ms after
releasing the csiphy reset respectively for cphy.
CRs-fixed: 2947752
Change-Id: I4befa03bab85779749efd33908ab5a02c96c0cb4
Signed-off-by: Jigar Agrawal <jigar@codeaurora.org>
During the common control register programming across csiphy hws,
there can be chance that number of CSIPHY hw supported is differnt
than max csiphy hw supported among various targets. This change
make sure to continue to next available hardware index in case of
unavailibility of csiphy hw soc index.
CRs-Fixed: 2991847
Change-Id: I1572974226701dcd3aadeb3d9cf95924e05520a9
Signed-off-by: Jigarkumar Zala <jzala@codeaurora.org>
