If we are not getting QACCEPT from NOC LPI status for
~2s then will crash the target. No need to go further
and unload the FW.
Change-Id: I29b30ca2e4c0a98ce180df094bc8d12cf20735bf
Signed-off-by: Palak Joshi <quic_palakash@quicinc.com>
Acquire XO_RESET before accessing INTER_STATUS and H2ASOFTINT.
Reducing sleep time to acquire XO_RESET.
Change-Id: Iffbe5e8ec0ff920a31805b80f8a64a890776669f
Signed-off-by: Palak Joshi <quic_palakash@quicinc.com>
When printing buffer info for smmu fault debugging.
Change-Id: Icf23db20e69e9c54e0405a4ea58e0a3dc0dce59d
Signed-off-by: George Shen <quic_sqiao@quicinc.com>
Added fixes to release DSP buffers only if the ref count
is zero and checking the fd is also matching or not while
freeing the DSP buffers.
Change-Id: I8d3475a0c50c7240142420d02a0444f718f883c2
Signed-off-by: Gopireddy Arunteja Reddy <quic_garuntej@quicinc.com>
Acquire XO_RESET before turning on/off the controller/core gdscs.
This is to enasure that XO_RESET can not be asserted by video while
EVA is turning on/off the gdsc.
Make sure to acquire XO_RESET before set operation on gdsc as well.
Wait at least 90ms for acquiring the XO_RESET.
Change-Id: I851297b1b6b48a903fbd5ce6d680e4d8727ebcc0
Signed-off-by: Aniruddh Sharma <quic_anirshar@quicinc.com>
During CPU NoC LPI sequence. Print more debugging registers
in case LPI QACCEPT is not set after 20ms. It indicates a pending
transaction lingering around. Adding dump for NOC registers.
Change-Id: Ied58e52e30572074be77b4d51a03fb4194d78caa
Signed-off-by: George Shen <quic_sqiao@quicinc.com>
Revert back 200us sleep to 80us before XO de-assert.
Change-Id: I8446aa2eb5cfac32fdc5fc971ddd37b999623bf8
Signed-off-by: George Shen <quic_sqiao@quicinc.com>
Waiting for 1sec to acquire xo reset else BUG_ON.
Change-Id: I26bcc27d02b4104f36b1bcdac97cb784c1daca44
Signed-off-by: Palak Joshi <quic_palakash@quicinc.com>
Changes made to accommodate difference in QOS & NOC
base registers offsets between pineapple and cliffs.
Change-Id: If8c631480d1f09bac21de52d0f27f0c29cdf594e
Signed-off-by: Palak Joshi <quic_palakash@quicinc.com>
Retrying the mutex lock, if it is not successful
in cvp_fence-wait function instead returning false.
Change-Id: I8dfb24b92eef50218d4d9a73f76c5533352a31fc
Signed-off-by: VIVEK VARDHAN JOSHI <quic_vivekvar@quicinc.com>
Returning false if mutex lock is not successful
in cvp_fence-wait function instead of sleep.
Change-Id: Ieddfb6e16c72d571646a39a63c073a1b9912b3bc
Signed-off-by: VIVEK VARDHAN JOSHI <quic_vivekvar@quicinc.com>
This change helps to read firmware elf name from device tree.
Change-Id: Idc5779063d386ceb0ed8435090a4a70c9651f19d
Signed-off-by: Gopireddy Arunteja Reddy <quic_garuntej@quicinc.com>
Extracts DSP buffer information for log printing upon SMMU faults
Change-Id: I36b1900ea84a85cdfdb2dec8ad62b67a5ff57119
Signed-off-by: Jingyu Su <quic_jingyus@quicinc.com>
Instead of returning from validate session failure with SSR,
doing other required clean up.
Change-Id: I5a2baa7039bc4e23758c541af31648d58a58823c
Signed-off-by: Palak Joshi <quic_palakash@quicinc.com>
Cliffs common and platform data structures are added.
Change-Id: I16156da7f1a801fca74fc5e2daff3d317031aaaa
Signed-off-by: Gopireddy Arunteja Reddy <quic_garuntej@quicinc.com>
Use dma_alloc_coherent to allocate 4MB dsp hfi queues and map
them in non-io-coherent way.
Change-Id: I6d8adb58ebcddae569259862a83e3aeffa3d2304
Signed-off-by: George Shen <quic_sqiao@quicinc.com>
From original 2s. It enables CPU and DSP communication timeout
to 1.5s.
Change-Id: I33cba756e95cd2cc535927960610c1dab26d4242
Signed-off-by: George Shen <quic_sqiao@quicinc.com>
The order of MPU and OD is wrong, which will cause confusion
when logcat to debug.
Change-Id: Iff298350bde322a03dda28e78a3737996d5a2965
Signed-off-by: Jingjing Guo <quic_jig@quicinc.com>
To avoid confusion in code reading and prepare for
future compatibility changes.
Change-Id: I43d61e18d2e2d75d1fd46ceb2e763511329ee32d
Signed-off-by: George Shen <quic_sqiao@quicinc.com>
Avoid delete non-existing session and power on check before
register write.
Change-Id: I0b7d5045d68fd18e5a9a041d3ad3e37f4dac16ad
Signed-off-by: George Shen <quic_sqiao@quicinc.com>
In case clients passing larger size than the actual dma-buf size.
It may avoid DSP caused SMMU fault.
Change-Id: I1f87d203f65a2d18d1a35e9e0b8dec281020150b
Signed-off-by: George Shen <quic_sqiao@quicinc.com>
when SSR is releasing core and some clients voting for bus.
Change-Id: I8575d747c17f234bbce216c346843ab07ea6b340
Signed-off-by: George Shen <quic_sqiao@quicinc.com>
Avoid kernel crash due to unbalance refcount operations.
Change-Id: I280682ec3352164b62ecf3469303371f2af24a7d
Signed-off-by: George Shen <quic_sqiao@quicinc.com>
