Move prealloc DP descriptor types to QDF so that
the macros can be used in HIF layer.
Change-Id: I3de60876735e5aa37d80e9e698a86503b18574c1
CRs-Fixed: 3502615
Add vdev stats support for DP MLO Unified
and Hybrid Mode.
Add new CDP API for getting vdev stats for
NON_MLD interface.
Add support to get vdev stats for specific
vdev which is a part of MLO.
Change-Id: I72c8b25958649d473e1b65cee21810cd86951187
CRs-Fixed: 3455607
Free the tx descriptors borrowed by direct switch
back to regulartx desc pools.
Change-Id: I2898e57ce5eff54c1787dbebd166482d9fbfc585
CRs-Fixed: 3444334
1. Add an API to process trigger_umac_recovery T2H message.
2. Synchronize do_pre_reset, do_post_reset_start, do_post_reset_complete
messages for all the SOCs and then process these messages in the host.
3. Synchronize pre_reset_done, post_reset_start_done,
post_reset_complete_done for all the SOCs before sending it to FW.
4. Add a new state in host for trigger_umac_recovery message.
Ignore back to back trigger_umac_recovery messages received from FW.
Change-Id: Id45d326d63e122834090844e83ad6cc7240f96af
CRs-Fixed: 3425833
Add support to enable/disable MLO Link Peer stats through
ini and cfg80211tool enable_ol stats command
Change-Id: Id1229a149befa416d060e1b07eee150e6b295abf
CRs-Fixed: 3397721
Reuse the tx descriptors released in tx completions
without releasing the associated skbs to reduce
the cpu utilization in direct switch mode.
Change-Id: I4ab3ac58977a626344877b8a818a4dbc4864aaf3
CRs-Fixed: 3393968
1. Maintain and fetch PPEDS profile from be_soc instead of be_vdev
2. Enable WDS EXT mode for Direct Switch
3. Provide cdp API's and structures to interact with osif
layer to get PPEDS profile info
Change-Id: I997126e3b5ae85dabdcd6053115927122b8681da
CRs-Fixed: 3404778
The kernel-doc script identified a large number of documentation
issues in dp/wifi3.0/be, so fix those issues. In addition, there are a
number of instances where public functions have their implementation
documented instead of having their interface documented, so move that
documentation.
Change-Id: I15c8570aa1832ed053fa38f536fa36b2ca0aa56b
CRs-Fixed: 3373157
change allocation location for reo qref table.
per probe allocation results in mem alloc failure when
frame is fragmented
Change-Id: I5922bddebcd0577ba38734ae7d4194d726d825aa
CRs-Fixed: 3326520
In STA mode ast idx override approach is used. In DSc to use ast idx
Need to configure a search idx register with ast idx and cache set number.
Added needed logic to instantiate search index register and
use it for STA mode in DSC path.
Change-Id: I6b3fb7c01a39b16ff1d473381c6155436fe2b27a
CRs-Fixed: 3375219
1. Change the names of parameters and functions related
to direct switch feature from ppe to ppeds
2. Remove the unused ppe_release_ring
Change-Id: I5a95b1273e338f354903af98158578ac65758a8a
CRs-Fixed: 3345097
Enable and register PPE2TCL and REO2PPE ring interrupts
for direct switch
Set interrupt timer threshold for ppe2tcl ring as 30 us.
Change-Id: Ida1ff6c3c2000f16f07960f7eae0d10edc337dc0
CRs-Fixed: 3341790
Add support for GET MLO Multicast API to check
if the vdev is primary multicast vdev.
Enhanced SET MLO Multicast API to reset primary
multicast flag for all partner vdevs.
Change-Id: Ic88949ce922bb1d0fd34349058d254de0d1f563c
CRs-Fixed: 3322523
Add support for:-
1. PPE VP entry attach and detach.
2. Per VAP PRI2TID Support
3. Dump the PPE VP HW entries.
4. Add tx completion handling for ppeds descriptors
Change-Id: I2a6d0be5bb556663a39a24d17b703877f3b5ad00
CRs-Fixed: 3276981
bank id is newly added in TX descriptor for BE chipsets. As such,
with IPA Offload enabled, IPA needs the bank id information to do
offload WLAN TX.
From WLAN perspective, bank id is designed to be used on a per-vdev
role basis. E.g. STA vdev and SAP vdev have separate and different
bank profiles.
However from IPA perspective, bank id needs to be on a per TX ring
basis, because IPA GSI FW is not able to identify STA or SAP vdev
role on a per-packet basis.
Hence initialize last HOST owned bank id profile for IPA usage.
Change-Id: I0cf71b638f5999905069aff0551d8ebeb5477e17
CRs-Fixed: 3289558
Compilation is failing when Monitor support is disabled
Moved monitor related API and structure to monitor header files.
CRs-Fixed: 3257872
Change-Id: Ie1b3dc16b38c88bfd73fc89aaa395d4b57a61e5c
Maping and unmaping of the MLO DP peer to the partner soc
will be initialized based on architecture.
dp_mlo_partner_chips_map
dp_mlo_partner_chips_unmap
Change-Id: I918f6d552acd9d64086abf4c38f913348e13c381
CRs-Fixed: 3267904
-Wimplicit-fallthrough is being enabled by default. Some compilers
such as clang require the attribute instead of just a fallthrough comment.
Change-Id: I443da8d7f5e1771dceb3386c4458b0da6a5e9476
CRs-Fixed: 3218236
Add delta_tqm, delta_tsf2 and mlo timestamp offset for BE.
These offsets are used to calculate hardware Tx completion delay.
delta_tsf2 and delta_tqm are updated during init. mlo timestamp
offset is updated whenever target sends the update event.
Also, adding CDP ops to set the offsets.
Change-Id: I55665982798c3a795481fa96c023bb851ea17476
CRs-Fixed: 3220906
Add support to move FISA FST from DDR to CMEM, enable it for Kiwi
Adding CMEM support for FISA FST includes
1) Reserving CMEM memory space FISA FST
2) Add HAL macros for CMEM flow search entry
Change-Id: I45fc91a86c1ac89d3d95b246e26ea981314425a8
CRs-Fixed: 3199250
- Fixes for compilation issues after enabling
monitor 2.0 support.
- change copyright year for all files in the chain.
Change-Id: I885e257bd8ca83850656d8a1f408c1bc34920d7a
CRs-Fixed: 3086483
Multicast support for MLO
1. Following functions are newly added.
dp_rx_igmp_handler()
dp_tx_mlo_mcast_handler_be()
dp_rx_mlo_mcast_handler_be()
dp_mlo_get_mcast_primary_vdev()
Change-Id: If215f843369e6e2621ef302b924e524c86f0d30b
Use chip ID and destination peer to determine the target soc
and partner vdev for Intra-BSS in MLO case.
Change-Id: I709c52e74426c5e81b50c8063cad7669c0e7002d
In the case of MCC due to low power mode atomic operation in
accessing the bank is resulting the crash.
Fix crash by using spinlock for WIN and mutex for MCC.
Change-Id: I5bb49cbed32e41ad88bfaeb24496adb180e37551
In the case of RAW mode, VAP parameters encap type, dscp_to_tid map id
and cipher are not updating in bank register.
Added a API to update vdev param.
Change-Id: I702bee563e7451f403fa32292bf20680cd66e213
CRs-Fixed: 3078687
Rx patch changes for multichip MLO
1. Create ini for rx ring mask for each chip
2. Configure hash based routing for each chip based
on lmac_peer_id_msb
3. Peer setup changes to configure lmac_peer_id_msb
to enable hash based routing
4. Rx Replenish changes to provide buffers back to owner
SOC of reo ring
Change-Id: Ibbe6e81f9e62d88d9bb289a082dd14b4362252c4
DP peer changes required for multi-chip MLO.
This change includes
1) Adding MLO peer to global peer hash at ML context
2) Add ML peer to all partner chips id to objtable
Change-Id: I230a6c1b14484c587b190a9a318fe9ffb1caea11
Changes needed for MLO soc attach to pass chip_id,
dp_ml_context from upper layer.
This change also takes care of assigning appropriate
RBM id for IDLE link descriptors based on chip_id.
Change-Id: I8f5f08c524d91942e6e458f048700b7bdd900107
Changes to have HW cookie conversion context per
desc pool.
This context will be used to program CMEM of the
other SOC in case multi-chip MLO.
Change-Id: I5ec68813e8fcb6d124698a52f5553acf9a7b1795
This change includes below
1) Changes needed to increase Tx rings to 4
2) Use WBM2SW4 ring for rx error in QCN9224
3) memset srng at alloc to avoid populating RBM_id
in per packet path and enable implicit RBM
Change-Id: Icbd5ac2378273b8f3c6adc41c611e29551fff22f
- New data structures are added for BE monitor support
- dp_mon_soc_be - to maintain soc level BE specific fields
- dp_mon_pdev_be - to maintain pdev BE specific fields
- dp_mon_desc_pool - to maintain descriptor pool
- Monitor ops are updated for 2.0 and corresponding dummy APIs
are added.
- dp_mon_filter_srng_type is enhanced for TxMON
Change-Id: I12a2fbc53e4eecc7a191b7aa925431298d0a9f54
CRs-Fixed: 2991276
(1)naming change in HW CC related function
(2)refinement for cookie ID generation regardless of
SPT page address 4k aligned or not
(3)move CMEM size check under cookie conversion macro
Change-Id: Ib32d802f5512e5facfa4130826406943fb3d27f1
CRs-Fixed: 2977304
