Reorder channel mode macros to have macros in logical
order, and to optimize the channel modes to use
bit specific enums instead of single bit to reduce
the usage of number of bits. The changes are specific
to host
Example for Channel mode: IEEE80211_CHAN_HE20
Channel modes represents only the information regarding
to channel such as band, width, passive, DFS, blocked
40MHz_intolerant and so. It doesn't have information
regarding hwmode like 11ac,11ax.
CRs-Fixed: 2846331
Change-Id: I197de032a4d677a27b46028fa090a6eabe0c6086
Channel number can be invalid when finding out the enumeration for the
channel. Rate limit the messages for the same.
Change-Id: Ie6cf178482647547d58d4d9555763332d6598846
CRs-Fixed: 2843978
In moselle, once wow enabled there is a possibility that wow wake
interrupt can be fired from FW during runtime suspend in-progress
in host, this will introduce a race between runtime suspend and
resume, so adding a synchronization between runtime suspend and
wow triggered runtime resume.
Change-Id: I38d6a24e4421697cc2d0090ba8d19884885596cb
CRs-Fixed: 2845672
Currently, 6g channels are sorted based on the weightage of each
channel. Frequencies are sorted but the flags associated to each
channel are not updated properly. So, channels carry invalid
flags to firmware and firmware may miss to scan few 6g channels
based on these flags and may scan few 6g channels unnecessarily.
Copy flags also while sorting frequencies to maintain the flags
of each channel as it is.
Also, change the type of phymode to enum scan_phy_mode
from uint32_t.
Change-Id: I0a2330faab1b738f2d7eff3d39ccbfffd51dfde0
CRs-Fixed: 2840029
A temporary variable "temp" is declared to use it while sorting
the channels based on the weightage/rnr info. This is declared
as a pointer to hold the reference of struct rnr_chan_weight but
memcpy is done to this without allocating memory.
Declare this as a variable instead of pointer to use it as an
intermediate variable for sorting.
Change-Id: If619f5fa462d5400f0a77e57317ac3c8debb34a5
CRs-Fixed: 2842819
To get active disconnect request host uses cm_get_active_disconnect_req
API. Update missed field BSSID into connection request from
cm_get_active_disconnect_req API.
Change-Id: I94fa3e14b4584b95b1d918390e5572fa8f112571
CRs-Fixed: 2846679
Add previously freed nbuf and buffer start address info in rx descriptor.
This helps in debugging use after free access of rx buffers.
Change-Id: I1c883bf049ce75dd0413b85946fe2982648d8004
CRs-Fixed: 2827151
Return type of "ucfg_spectral_control" is QDF_STATUS.
Wrong return values are send for this APIs in case of errors.
CRs-Fixed: 2845251
Change-Id: I24f3beb44486753ad0eba706e9f2ac258067d82d
Return type of "target_if_is_spectral_active" and
"target_if_is_spectral_enabled" is bool. Wrong return values
are send for this APIs in case of errors.
CRs-Fixed: 2845250
Change-Id: I2344676a1ada51e041bb5f7acac8aa22847bee5c
If Spectral scan is disabled(agile and normal mode disabled)
skip init/deinit of Spectral module. Also avoid user requests
to configure/start/stop scan. If either agile or normal mode
is disabled block user requests for that mode alone.
CRs-Fixed: 2840335
Change-Id: I81148e5580fe4bf991b97cd086c8e3a9ca78e77d
Add utility APIs to check Spectral scan is disabled for
a given pdev/psoc/mode.
CRs-Fixed: 2840317
Change-Id: I6820cfc056c697434a138ddf9d8d93b5796a4722
Add APIs to init Spectral feature caps in the upper layer of the
Spectral module.
CRs-Fixed: 2840249
Change-Id: Idfb34a9eec3a66c6d193be7bb828eeec30548ae7
Add target if APIs to initialize normal and agile Spectral
feature caps for a pdev.
CRs-Fixed: 2840247
Change-Id: I6c5385c2050007a5ff3f668ab3d6176328294549
Add APIs to check the agile and normal Spectral scan
capability of the target. This information is derived from
the advertisements from halphy via WMI events.
CRs-Fixed: 2840227
Change-Id: I2aae79b3342d8d74a1f4c00e813cae843a71106a
Add the following Spectral scan capabilities at the pdev level.
a) Normal Spectral scan capability
b) Agile Spectral scan capability for 20/40/80 MHz
c) Agile Spectral scan capability for 160 MHz
d) Agile Spectral scan capability for 80+80 MHz
Also change the definition of existing Spectral scan capability
at psoc level.
CRs-Fixed: 2840144
Change-Id: I18be48ec4095fa29b62800a9df58b72295747547
Add a new WMI service bit to indicate whether normal
Spectral scan is disabled.
CRs-Fixed: 2840128
Change-Id: I09314afeb5372f83b8356e06f245c83c7acbc85d
Currently, Host driver assumes WMI_MIN_HEAD_ROOM is part of WMI
messages and Validations are done accordingly. But this
WMI_MIN_HEAD_ROOM is not considered in the firmware. Because of
this host may drop valid events.
To avoid this, Don't consider WMI_MIN_HEAD_ROOM while validating WMI
msg length.
Change-Id: I5f1fe12cfae570e636defb8a4a46ec154f988195
CRs-Fixed: 2844982
Currently DMA mask for the device is set during hif_enable_bus.
If the datapath memory prealloc feature is enabled, there are
a few dma memory allocation which is done before the DMA mask
is set for the device. This leads to the aforementioned dma
memory pre-allocation to be attempted at the default DMA mask.
Due to this the entire device capability of dma address might
not be used.
Add hif api to set dma mask before hif is initialized. This
is needed to set dma mask in case of datapath memory pre allocation.
Change-Id: I6fd25d9cb6ab3aaacd6f959abe4e060e23f37095
CRs-Fixed: 2845020
In existing implementation, for monitor mode below allocation
are done at pdev attach and init time.
a. 64 monitor buffer allocation for RxDMA monitor buffer ring
b. Link descriptor memory allocation for monitor link descriptor ring
This memory is waste of memory for customers not using monitor mode and
low memory profile.
To optimize this memory, allocate all buffers and link descriptor memory
at monitor vdev creation time.
Change-Id: I873c76d2f625a782532a101037915b0353928a5b
CRs-Fixed: 2829402
Use the hal_srng APIs that handle byte-order conversion of ring pointers
for big-endian platforms.
Change-Id: I2664636d5d2a1abfd7b643ea4c4d63d328a9880f
CRs-Fixed: 2845047
Current implementation of hal_srng_access_start() reads the ring pointer
in the same byte-order as it is written by the target. This results in
byte-order mismatch on a big-endian Host because the WLAN target is
little-endian based. For most of the srngs, the target already takes of
this by converting the ring pointer to the host-order before writing to the
DDR. But for other srngs, the Host needs to handle the endianness
conversions. Add HAL APIs to do the same.
CRs-Fixed: 2844519
Change-Id: Ieb47391ac0acc3724e854f433915dd5b1219bebe
In DFS, to check if a channel is radar, we use the flags that
are filled from UMAC to check for radar. Since the channel list
in UMAC are dynamically calculated, the dynamic flags will not be
consistent over multiple channel pointers.
Use the radar information in regulatory for individual subchannels
to check for radar in a given channel. Define these new APIs
under a feature specific macro.
Change-Id: I7f86560c3d29d2366c6506ccf63204263cbc0ef1
CRs-Fixed: 2841168
Swap each word of key_data before sending key install command.
This is needed since copy engine swap is enabled for big endian platform
and key needs to be plumbed in network byte order for decoding to happen
correctly.
Handle the swap in wmi layer since all other big endian conversions are
handled in this layer.
Change-Id: Ia6f0d579f3edaf32193c353ea2fe35cc40f55399
Replace pdev_id with mac_id for ucfg_dcs APIs and update
related documentation.
Change-Id: Ie0dbe992c113aac597dbb6820acd3faba3ac9f3c
CRs-Fixed: 2843510
rx_ring_history is an array of pointers, address of pointer is
always a non-NULL value, this always passed the NULL check,
which leads to NULL pointer dereference, fixing the same.
Change-Id: I401203a6f2a5930869cf4002ac0e714d3fdba62f
CRs-Fixed: 2844038
scenario:
FISA new FST entry is initialed, host will start one timer to
send HTT MSG DP_HTT_FST_CACHE_INVALIDATE_FULL to FW in 5 ms,
WOW suspending happened in the same time, PCIe bus get suspended.
5 ms later, HTT msg sending will try to prevent PCIe L1 to update
CE SRNG HP register, hit assert as PCIe bus suspended already.
suspend and cancel the FSE cache flushing timer when dp_bus_suspend,
resume it when dp_bus_resume.
CRs-Fixed: 2843214
Change-Id: Ie2bc115a0de068335d6c46749f52d205cc21f5a3
The response for the respective TWT operations can either be synchronous
or asynchronous (wherever specified). If synchronous, the response to
this operation is obtained in the corresponding vendor command reply to
the user space. For asynchronous case, the response is obtained as an
event with the same operation type.
Drivers shall support either of these modes but not both simultaneously.
The support for asynchronous mode is advertised through the new flag
QCA_WLAN_VENDOR_FEATURE_TWT_ASYNC_SUPPORT. If the driver does not
include this flag, it shall support synchronous mode.
Change-Id: I359e12c5147b0115158d03a7a08d74beca78455c
CRs-Fixed: 2842872
Define the following additional TWT operations:
QCA_WLAN_TWT_GET_STATS, QCA_WLAN_TWT_CLEAR_STATS,
QCA_WLAN_TWT_GET_CAPABILITIES, QCA_WLAN_TWT_SETUP_READY_NOTIFY.
Also define new attributes to qca_wlan_vendor_attr_twt_setup
and qca_wlan_vendor_attr_twt_nudge.
Change-Id: I687fd215c13aa12741d8ba7af23507f930d0ec81
CRs-Fixed: 2842072
Add support to configure minimum and maximum wake duration
values, minimum and maximum wake interval values for TWT setup.
Change-Id: I69c328815be511833abce0fcd18649e136027f53
CRs-Fixed: 2827115
Direct Buf Rx has a source ring to communicate with the target.
The target updates its tail pointer in little-endian format and this update
doesn't go through any byte-order conversion at the target. On a big-endian
Host platform, this tail pointer will be read in reverse order of bytes.
To fix this, convert the tail pointer to the Host order before using it.
Change-Id: Ibcaf3d7507910ea81eeb895772241ab9861ee45a
CRs-Fixed: 2843259
