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Upphovsman SHA1 Meddelande Datum
karishma Tekade
b6e311a3d8 audio_kernel: Fix compilation issues during kernel upgrade
Updated WCD937x, WSA881x-analog and bolero drivers for successful
compilation on kernel6.0 for holi.

Change-Id: Ia91a999f825570b3d7123842f0aad3740c4d25ed
2023-05-23 22:46:24 -07:00
Karishma Tekade
1ed2ece8c4 audio_kernel: Enable audio kernel compilation for blair platform
Updated make files in audio_kernel to support blair platform.

Change-Id: I00c832875fc4558580e22825e9a72305e05ae409
2023-05-23 22:44:18 -07:00
Soumya Managoli
ee00c83a92 audio-kernel: Bring up changes for bengal
Enable audio driver compilation for bengal.

Change-Id: I1ce7f0356fe70bc59c7caa6d333ad380d1e725ff
Signed-off-by: Soumya Managoli <quic_c_smanag@quicinc.com>
2022-09-29 16:50:51 +05:30
Laxminath Kasam
001ba433b2 wsa: soundwire: Add support for 4p8MHz DAC rate
Add support to use 4p8MHz DAC rate for receiver over WSA.

Change-Id: Ia0811670326be8131687fbdff70464da063902b2
Signed-off-by: Laxminath Kasam <lkasam@codeaurora.org>
2021-09-15 22:22:09 -07:00
Laxminath Kasam
ae258cb2f8 asoc: wsa883x: Update low_noise gain for receiver
Add changes to use wsa883x for receiver with
low_noise mode settings.

Change-Id: Icfa43ebbdb1e366f365053535f541bee03751ca3
Signed-off-by: Laxminath Kasam <lkasam@codeaurora.org>
2021-09-15 22:19:46 -07:00
Aditya Bavanari
a415d7381d asoc: Return the correct clk_div value
Incorrect check for return value of clk_div_get
causes CLK_DIV2 setting being missed. Fix the
return value check to address this.

Change-Id: Ic1b6761ab836a38c657ac7e43efda0e2f23c5fee
Signed-off-by: Aditya Bavanari <abavanar@codeaurora.org>
2021-08-04 20:34:18 -07:00
Vatsal Bucha
c5698c8a0b bolero: tx-macro: Fix link status not connected issue due to clk not enabled
Sometimes link status is not connected due to tx_mclk_users
not being properly updated. This is due to tx_mclk_users
enable and disable not being protected by common mutex lock.
Add mutex lock whereever it is accessed to resolve issue.

Change-Id: Ibba208be1f2d3eaf63c49e434c2ae48bc3b5b2d8
Signed-off-by: Vatsal Bucha <vbucha@codeaurora.org>
2021-05-24 01:44:55 -07:00
Soumya Managoli
afde3b3eb2 asoc: bolero: Update PCM_RATE based delay for amic
The PCM_RATE bit field in LPASS_TX_CDC_TXn_TX_PATH_CTL
ranges from 0 to 6.
In the current implementation of tx-macro, the value
read is mapped directly to the sample rate instead of
the indices. Change is to correct this.
Add the delay based on pcm_rate in va-macro as well.

Change-Id: I6cb7e58e71f2a25356608611f1dfed83171706f6
Signed-off-by: Soumya Managoli <smanag@codeaurora.org>
2021-05-17 06:03:13 -07:00
Linux Build Service Account
0ad49f6f8a Merge "asoc: bolero: update incorrect bolero register" 2021-05-02 22:55:45 -07:00
Laxminath Kasam
01756036b5 asoc: lpass-cdc: Update swr pdev initialize order
During sound card register init call, if swr pdev
is not initialized yet respective soundwire port
config is not updated to soundwire controller device.
In macro drivers, update swr pdev into macro private
data prior to platform device add.

Change-Id: Ifa67471cfc7a10b102b573df6285e598bb0b5e5e
Signed-off-by: Laxminath Kasam <lkasam@codeaurora.org>
2021-04-26 07:50:25 -07:00
Meng Wang
f3aa1cddc4 asoc: bolero: update incorrect bolero register
Update incorrect bolero register for default value.

Change-Id: Ifa14f3b5dd73971e5c6b15ab58f70074b3a74408
Signed-off-by: Meng Wang <mengw@codeaurora.org>
2021-04-26 05:47:04 -07:00
Meng Wang
d5cfb617e3 asoc: lpass-cdc: update correct offset to set IIR1 registers
Update correct offset to set IIR1 registers to make sidetone work.

Change-Id: I94cc7f54c5d68954565d683aee0d3e887eebedb3
Signed-off-by: Meng Wang <mengw@codeaurora.org>
2021-04-21 00:35:23 -07:00
Vatsal Bucha
7dcefcdc50 asoc: bolero: Add core_vote before gfmux access
GFMUX access happen during WSA macro usecase.
Update wsa macro to do core_vote before clock
request.

Change-Id: I0b96e725e5150fff4d8bef0d6a50837fc9a3f873
Signed-off-by: Vatsal Bucha <vbucha@codeaurora.org>
2021-03-18 04:13:06 -07:00
Vatsal Bucha
b6430e162b asoc: codecs: add child devices after completing initialization
In bolero-cdc and tx, va, wsa and rx macros, move schedule_work call to
add the child devices to the point later to where the parent
initialization gets completed.

Change-Id: Iaa07329a25020dde21d9249c3848bb7fcf7d816a
Signed-off-by: Vatsal Bucha <vbucha@codeaurora.org>
2021-03-15 21:53:10 -07:00
Vatsal Bucha
79d3ed87ca asoc: codecs: fix race condition of core vote and reg access
Auto suspend timer for core vote is triggering before read write complete.
Move the auto suspend of core vote to post read write operation.

Change-Id: I758cf57bde4e0b56320ef18f6f17adc655fc8fcb
Signed-off-by: Vatsal Bucha <vbucha@codeaurora.org>
2021-03-08 06:24:35 -08:00
Jyotirmoi Sarma
6b78aacd7f audio-kernel: Enable out of tree compilaton
Add Makefile in each sub-folder
Add Android.mk file on top level folder of audio-kernel

Change-Id: I024aa5080ae52b55700f0a65ab05034be8c9cdad
Signed-off-by: Jyotirmoi Sarma <jyosarma@codeaurora.org>
2020-12-17 18:05:48 +05:30
Jyotirmoi Sarma
a3d8911945 audio-kernel: asoc : Upgrade asoc to support 5.10 kernel
Change-Id: Ia54112cfbde418d66b9314d4ba731928aa057558
Signed-off-by: Jyotirmoi Sarma <jyosarma@codeaurora.org>
2020-12-08 08:49:44 -08:00
Phani Kumar Uppalapati
b15db3b6c8 Merge commit 'd9fa9d435ba1b92cf0f0361a0749107b7abc45a5' into audio-kernel-5-4.lnx.1.0
Change-Id: Iaf98532030ee4ef5fe6a70df083a685733dd5670
2020-11-05 19:15:07 -08:00
Linux Build Service Account
d9fa9d435b Merge changes I78da6dad,I6e445618,I67795bf0 into audio-drivers.lnx.5.0.r1-rel
* changes:
  ASoC: bolero: Update clock sequence to clear Fs counter
  asoc: va-macro: Update clk_div switch based on decimation rate.
  soc: add check condition before enabling irq.
2020-10-23 17:39:07 -07:00
Ashwini Muduganti
9f11335e69 ASoC: bolero: Update clock sequence to clear Fs counter
Update codec clock sequence to clear Fs counter to avoid
unexpected behavior during bootup.

Change-Id: I78da6dadd26989cf1f39f71b941a209c2af4cef2
Signed-off-by: Meng Wang <mengw@codeaurora.org>
2020-10-23 11:04:24 -07:00
Ashwini Muduganti
dfe6739490 asoc: va-macro: Update clk_div switch based on decimation rate.
Update clk_div setting for low power decimations based on
decimation rate instead of lpi flag.

Change-Id: I6e445618af4bf159f3d88a7bc5d07a403a06c1ab
Signed-off-by: Laxminath Kasam <lkasam@codeaurora.org>
2020-10-23 11:04:15 -07:00
Laxminath Kasam
83d1640b7b asoc: bolero: Add core_vote before gfmux access
GFMUX access happen during RX macro usecase.
Update rx macro to do core_vote before clock
request.

Change-Id: I1afd38ae13066dcfbda307308afce7c4291142d9
Signed-off-by: Laxminath Kasam <lkasam@codeaurora.org>
2020-10-23 15:38:32 +05:30
Laxminath Kasam
e0ea9653c3 asoc: bolero: control wakeup of swr_tx during clock setup
Move the enable and disable of wakeup capability of
swr_tx gpios to clock setup to disable or enable it
in all required usecases.

Change-Id: I9fb76926d8520c382e7f19777190357c50f98994
Signed-off-by: Laxminath Kasam <lkasam@codeaurora.org>
2020-10-14 12:55:12 +05:30
qctecmdr
1f152bcd76 Merge "asoc: codecs: add sem initialize for blocking notifier." 2020-10-12 10:10:29 -07:00
qctecmdr
ef3408efeb Merge "soc: Add ratelimit to supress the pr_err/dev_err." 2020-10-12 10:10:29 -07:00
Meng Wang
dfa3df69ae asoc: bolero: update logic for va clk switch on bolero 2.1
On bolero 2.1, SVA switch is not retain at VA_CLK
when switch between handset and headset mic sva.
Update the clock release logic during swr power event.

Change-Id: I62b492dcbff4b4f3249d1a6b3b792690b5b5c27c
Signed-off-by: Meng Wang <mengw@codeaurora.org>
2020-10-07 22:53:24 +05:30
Prasad Kumpatla
0538f8320d asoc: codecs: add sem initialize for blocking notifier.
add semaphore initialize for the notifier before the blocking
notifier.

Change-Id: I20a919215fdc0da1830368070063fbe2b8fc5f62
Signed-off-by: Prasad Kumpatla <nkumpat@codeaurora.org>
2020-10-07 07:01:45 -07:00
Prasad Kumpatla
a07613afcd soc: Add ratelimit to supress the pr_err/dev_err.
Add ratelimit to supress the logs flooding at the
time of SSR.In all places defined ratelimit as,
in 1sec one debug msg prints.

Change-Id: I6dfe140848e5cecb1b311c432f8311cdf0615a58
Signed-off-by: Prasad Kumpatla <nkumpat@codeaurora.org>
2020-10-07 10:21:42 +05:30
Vidyakumar Athota
88c1c0288c Merge commit '1a7cee75ba63d6cce68924591b125d604bef39f5' into audio-kernel-5-4.lnx.1.0
Change-Id: Ie4363b4d1be12c7fd85e261bf728462009d8a2cf
2020-09-30 10:01:03 -07:00
Vatsal Bucha
ffd65896dd ASoC: bolero: Make tx swr gpio as wakeup capable
Do not register afe event listener for shima and make
tx swr gpio as wakeup capable.

Change-Id: I4d805c2b65e6c424c1c215431caa75f6181a16e8
Signed-off-by: Vatsal Bucha <vbucha@codeaurora.org>
2020-09-29 14:29:49 +05:30
Meng Wang
1a7cee75ba asoc: bolero: switch clk to VA_CLK for LPI SVA
When switching TX_CLK to VA_CLK, there could be some
IRQ missing with current design. Switch the clk in bolero
to avoid the corner case.

Change-Id: I9a8b15ade3358c7276356a0f6555b541651d85a5
Signed-off-by: Meng Wang <mengw@codeaurora.org>
2020-09-21 11:45:19 +05:30
Meng Wang
0dbd04d871 Revert "Revert "ASoC: bolero: check clock source before clock switch""
This reverts commit 68cbba47d0 as this
causes AMIC SVA issue.

Change-Id: Icb08cec87b108243fc9660a519c332c1f3ffb48d
Signed-off-by: Meng Wang <mengw@codeaurora.org>
2020-09-21 11:44:00 +05:30
qctecmdr
6a4d66fb84 Merge "asoc: bolero: switch clk to VA_CLK for LPI SVA" 2020-09-18 10:44:38 -07:00
Vatsal Bucha
625753df87 ASoC: codec: Change name for enum defined for callback between wcd and bolero
Add enum names defined for callback between wcd and bolero in
separate file and include that file in order to have same enum
across wcd and bolero.

Change-Id: I808c2ad3de37655c1ba2b8e096def60703ced7f2
Signed-off-by: Vatsal Bucha <vbucha@codeaurora.org>
2020-09-09 20:26:36 -07:00
Meng Wang
5de0472da9 asoc: bolero: switch clk to VA_CLK for LPI SVA
When switching TX_CLK to VA_CLK, there could be some
IRQ missing with current design. Switch the clk in bolero
to avoid the corner case.

Change-Id: Iec5cac16e026e4e46646894c546f1acb3fce4fa8
Signed-off-by: Meng Wang <mengw@codeaurora.org>
2020-09-09 16:34:16 +08:00
Vidyakumar Athota
584244b6ac Merge commit '5efb3a4ee3959f20ed2b697663205ec9a6bd1e5c' into audio-kernel-5-4.lnx.1.0
Change-Id: I58fbdf6b91c33ab5d147efbe5f5706616052c7fe
Signed-off-by: Vidyakumar Athota <vathota@codeaurora.org>
2020-09-06 18:25:28 -07:00
Linux Build Service Account
b9c15b6953 Merge "Merge commit '33ea77356f47c6c596c8505ca90307fc1245ef3f' into audio-kernel-5-4.lnx.1.0" into audio-kernel-5-4.lnx.1.0 2020-09-06 06:58:55 -07:00
Linux Build Service Account
d13491b74d Merge "asoc: bolero: Update bolero version 2.0 entry" into audio-kernel-5-4.lnx.1.0 2020-09-06 06:57:54 -07:00
Laxminath Kasam
d6874ae339 asoc: bolero: Update bolero version 2.0 entry
For get version info of bolero, update
bolero 2.0 entry.

Change-Id: I8f21b67eb6532c9b1c1ef6ab15015a29a4737db3
Signed-off-by: Laxminath Kasam <lkasam@codeaurora.org>
2020-08-31 23:01:00 -07:00
Rohit kumar
e25a1fdc64 asoc: codecs: Update logic for active ch cnt calculation
Use number of bits set in active_ch_mask to calculate
active channel count. This fixes improper update of
channel count if same kcontrol is issued more than
once.

Change-Id: I84dc33ad5b6dbfc3babf5bbfeab1e2e71af5983b
Signed-off-by: Rohit kumar <rohitkr@codeaurora.org>
2020-08-31 22:42:09 -07:00
Meng Wang
ea56a753a8 Revert "Revert "ASoC: bolero: check clock source before clock switch""
This reverts commit 68cbba47d0 as this
causes AMIC SVA issue.

Change-Id: I0e66c97dfc9499c30942ce2e3a123be58833eac8
Signed-off-by: Meng Wang <mengw@codeaurora.org>
2020-09-01 10:24:46 +08:00
Laxminath Kasam
1cd5f3fe0b asoc: bolero: Update bolero version 2.0 entry
For get version info of bolero, update
bolero 2.0 entry.

Change-Id: I8f21b67eb6532c9b1c1ef6ab15015a29a4737db3
Signed-off-by: Laxminath Kasam <lkasam@codeaurora.org>
2020-08-27 22:27:31 -07:00
qctecmdr
b22340a058 Merge "ASoC: tx-macro: Allow regcache sync during clock enablement" 2020-08-17 01:44:19 -07:00
Sudheer Papothi
65b24ebabc ASoC: tx-macro: Allow regcache sync during clock enablement
Allow regcache sync during clock enable to make sure the registers
are in proper state before the usecase.

Change-Id: I8a9214e460c7f77759d1956e0e7e2d6b2f5b3d3a
Signed-off-by: Sudheer Papothi <spapothi@codeaurora.org>
2020-08-04 17:02:00 -07:00
Meng Wang
5487799a92 asoc: bolero: add SWR MIC registers as volatile
Add SWR MIC registers BOLERO_CDC_TX_TOP_CSR_SWR_MIC0_CTL
and BOLERO_CDC_TX_TOP_CSR_SWR_MIC1_CTL as volatile to
resolve SWR TX1 port mute issue.

Change-Id: I66e0d8e63ebabaca6f4aa562f18d7b58592a1d74
Signed-off-by: Meng Wang <mengw@codeaurora.org>
2020-08-03 23:52:57 -07:00
qctecmdr
f887c3029e Merge "ASoC: va-macro: Do not register for event listener for shima" 2020-07-28 22:40:06 -07:00
qctecmdr
8a4d49de4c Merge "ASoC: rouleur: Update hph registers based on foundry id" 2020-07-28 22:40:06 -07:00
qctecmdr
b0fed904c1 Merge "ASoC: bolero: Add LPI mode for VoLTE usecase" 2020-07-27 05:45:11 -07:00
Vatsal Bucha
ef642d3e2a ASoC: rouleur: Update hph registers based on foundry id
Rouleur has different hph settings for different foundry
id. Read foundry id and update hph settings so as to
provide same settings to end user.

Change-Id: I114047226462ab95e0c93271c3d6099f15af2343
Signed-off-by: Vatsal Bucha <vbucha@codeaurora.org>
2020-07-24 13:53:52 +05:30
qctecmdr
1d2d2a7f9b Merge "soc: wsa883x: Update the PDM_WD at startup/teardown" 2020-07-24 00:05:32 -07:00