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@@ -393,12 +393,64 @@ static int va_macro_swr_pwr_event_v2(struct snd_soc_dapm_widget *w,
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switch (event) {
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case SND_SOC_DAPM_PRE_PMU:
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+ if (va_priv->default_clk_id != VA_CORE_CLK) {
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+ ret = bolero_clk_rsc_request_clock(va_priv->dev,
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+ va_priv->default_clk_id,
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+ VA_CORE_CLK,
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+ true);
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+ if (ret) {
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+ dev_dbg(component->dev,
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+ "%s: request clock VA_CLK enable failed\n",
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+ __func__);
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+ break;
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+ }
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+ ret = bolero_clk_rsc_request_clock(va_priv->dev,
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+ va_priv->default_clk_id,
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+ TX_CORE_CLK,
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+ false);
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+ if (ret) {
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+ dev_dbg(component->dev,
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+ "%s: request clock TX_CLK enable failed\n",
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+ __func__);
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+ bolero_clk_rsc_request_clock(va_priv->dev,
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+ va_priv->default_clk_id,
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+ VA_CORE_CLK,
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+ false);
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+ break;
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+ }
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+ }
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msm_cdc_pinctrl_set_wakeup_capable(
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va_priv->va_swr_gpio_p, false);
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break;
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case SND_SOC_DAPM_POST_PMD:
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msm_cdc_pinctrl_set_wakeup_capable(
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va_priv->va_swr_gpio_p, true);
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+ if (va_priv->default_clk_id == TX_CORE_CLK) {
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+ ret = bolero_clk_rsc_request_clock(va_priv->dev,
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+ va_priv->default_clk_id,
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+ TX_CORE_CLK,
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+ true);
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+ if (ret) {
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+ dev_dbg(component->dev,
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+ "%s: request clock TX_CLK disable failed\n",
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+ __func__);
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+ break;
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+ }
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+ ret = bolero_clk_rsc_request_clock(va_priv->dev,
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+ va_priv->default_clk_id,
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+ VA_CORE_CLK,
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+ false);
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+ if (ret) {
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+ dev_dbg(component->dev,
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+ "%s: request clock VA_CLK disable failed\n",
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+ __func__);
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+ bolero_clk_rsc_request_clock(va_priv->dev,
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+ TX_CORE_CLK,
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+ TX_CORE_CLK,
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+ false);
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+ break;
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+ }
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+ }
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break;
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default:
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dev_err(va_priv->dev,
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@@ -436,8 +488,13 @@ static int va_macro_swr_pwr_event(struct snd_soc_dapm_widget *w,
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"%s: lpass audio hw enable failed\n",
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__func__);
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}
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+ if (!ret) {
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+ if (bolero_tx_clk_switch(component, VA_CORE_CLK))
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+ dev_dbg(va_dev, "%s: clock switch failed\n",
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+ __func__);
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+ }
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if (va_priv->lpi_enable &&
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- !va_priv->disable_afe_wakeup_event_listener) {
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+ !va_priv->disable_afe_wakeup_event_listener) {
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bolero_register_event_listener(component, true);
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va_priv->register_event_listener = true;
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}
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@@ -447,6 +504,8 @@ static int va_macro_swr_pwr_event(struct snd_soc_dapm_widget *w,
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va_priv->register_event_listener = false;
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bolero_register_event_listener(component, false);
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}
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+ if (bolero_tx_clk_switch(component, TX_CORE_CLK))
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+ dev_dbg(va_dev, "%s: clock switch failed\n",__func__);
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if (va_priv->lpass_audio_hw_vote)
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digital_cdc_rsc_mgr_hw_vote_disable(
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va_priv->lpass_audio_hw_vote);
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@@ -506,10 +565,11 @@ static int va_macro_mclk_event(struct snd_soc_dapm_widget *w,
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ret = bolero_tx_mclk_enable(component, 1);
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break;
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case SND_SOC_DAPM_POST_PMD:
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- if (va_priv->lpi_enable)
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+ if (va_priv->lpi_enable) {
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va_macro_mclk_enable(va_priv, 0, true);
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- else
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+ } else {
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bolero_tx_mclk_enable(component, 0);
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+ }
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if (va_priv->tx_clk_status > 0) {
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bolero_clk_rsc_request_clock(va_priv->dev,
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@@ -1903,15 +1963,15 @@ static const struct snd_soc_dapm_widget va_macro_dapm_widgets_v2[] = {
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VA_MACRO_AIF3_CAP, 0,
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va_aif3_cap_mixer_v2, ARRAY_SIZE(va_aif3_cap_mixer_v2)),
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- SND_SOC_DAPM_SUPPLY_S("VA_SWR_PWR", -1, SND_SOC_NOPM, 0, 0,
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+ SND_SOC_DAPM_SUPPLY_S("VA_SWR_PWR", 0, SND_SOC_NOPM, 0, 0,
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va_macro_swr_pwr_event_v2,
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SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
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- SND_SOC_DAPM_SUPPLY_S("VA_TX_SWR_CLK", 0, SND_SOC_NOPM, 0, 0,
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+ SND_SOC_DAPM_SUPPLY_S("VA_TX_SWR_CLK", -1, SND_SOC_NOPM, 0, 0,
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va_macro_tx_swr_clk_event_v2,
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SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
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- SND_SOC_DAPM_SUPPLY_S("VA_SWR_CLK", 0, SND_SOC_NOPM, 0, 0,
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+ SND_SOC_DAPM_SUPPLY_S("VA_SWR_CLK", -1, SND_SOC_NOPM, 0, 0,
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va_macro_swr_clk_event_v2,
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SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
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};
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@@ -1945,7 +2005,7 @@ static const struct snd_soc_dapm_widget va_macro_dapm_widgets_v3[] = {
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SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
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SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
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- SND_SOC_DAPM_SUPPLY_S("VA_SWR_PWR", -1, SND_SOC_NOPM, 0, 0,
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+ SND_SOC_DAPM_SUPPLY_S("VA_SWR_PWR", 0, SND_SOC_NOPM, 0, 0,
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va_macro_swr_pwr_event,
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SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
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};
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