add support for compander to enable and disable for HPHL and HPHR
in wcd939x.
Change-Id: Ib7aa96bd9faac7389b38f01baff0a93c646f84f2
Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
For PCM usecase enable/disable we have dedicated ports, so no need of
using counter to manage enable and disable of ports.
This is revert of change-id: I2c65e7658bf90ae01203ebb1b15f14db581ffa55.
Change-Id: Id1953f529569ae48b01dce1c88d2790479cf1a6b
Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
Use VA_CORE_CLK without LPI Enable mixer cntl for SVA usecases,
To keep usecase in LPI mode even in corner cases.
Change-Id: I45da244b8a992b1ff043ab4b401903376c5cff90
Signed-off-by: Ganapathiraju Sarath Varma <quic_ganavarm@quicinc.com>
While graph_open is processing by the SPF, apps receives
userspace(agm/pal) crash which will triggers spf_close_all
cmd from msm common drivers and immediately calls
msm_audio_ion_crash_handler() which will un-maps the memory. But
here SPF is still in processing the graph_open, recieved spf_close_all
cmd is queued in SPF. Due to un-mapping is done immediately in HLOS
will resulting in SMMU fault.
To avoid such scenarios, increased the spf_close_all cmd timeout,
because the AGM timeout for the graph_open is 4sec, so increase the timeout
for spf_close_all cmd response until graph open completes or timed out.
Change-Id: I67430cad5a55bd250ea110587c0ead2d97115efc
Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
With new "struct snd_soc_pcm_runtime", num_cpus is
removed, instead num_cpus now is in
"struct snd_soc_dai_link".
Change-Id: Ia08e98ec0afa72deab147c6758fd6aeaf4477e75
WCD USB AATC does not require mech plug irq, UCSI
layer will help to get the events to process insert/remove
of AATC HS.
Change-Id: Ie1b14703605be294471303b6454f94b55e9f932d
Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
PCM_DP_OUT/IN enable bit are used for any data_port which supports
word_length larger than 8. Disable these two bits only when all
the ports are disabled.
Change-Id: I2c65e7658bf90ae01203ebb1b15f14db581ffa55
Signed-off-by: Meng Wang <mengw@codeaurora.org>
On wcd939x contains only one variant. Sometimes reading
for codec variant which is giving incorrect/unsupported,
due to this incorrect mixer ctl are picked. So Wcd939x
is updated with supported variant WCD9395.
Change-Id: Ie556350b3630b6f1f76a4b2af1db795f908f13d4
Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
Use DECLARE_FLEX_ARRAY to modularize payload of gpr_pkt struct.
Change-Id: I45f173148c0f36896d52f88b77d3d815a4c321fb
Signed-off-by: Sam Rainey <quic_rainey@quicinc.com>
update register name in regmap and tables.
Change-Id: Ia1da74478b51dd094da2be74d621f91cf4e22ff9
Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
during SSR, swrm_disable_ports() is not called so the pcm_enable_count
never decreased. Reset the count to 0 when SSR
Change-Id: I937dd309ab9fb2c28c0962053cd1632c891fb598
Signed-off-by: Junkai Cai <junkai@quicinc.com>
add support to get swr device num for wsa883x and
wsa884x based on the variant used.
Change-Id: Ib0a25a0692d968a3ae9a45c2a4754de8eef325ce
signed-off-by: sarath varma ganapahiraju <quic_ganavarm@quicinc.com>
as part of swrm_runtime_suspend, multiple attempts are made
to write into swr regisers. Incase of SSR state, all those write
attempts are bound to fail.
Hence avoid swr read/write operations during SSR state.
Also move updating dev_up flag for SSR event to an early point in call flow.
Change-Id: I805d1ccf8bcdab5fdde7b74582a65463d5bcbd6e
Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
Extend bit-width support to 24 and 32 bit for TDM, MI2S and AUX PCM interface
Change-Id: I0c79df64881f2d96a16196e7fbef0cc177af1021
Signed-off-by: Anirudh Mahto <quic_amahto@quicinc.com>
Add register initialization for 2S battery configuration, including adding
relevant register shifts and masks.
Change-Id: Ie3bee4283aa57fb489153a3588db638a8a25719c
Signed-off-by: Sam Rainey <quic_rainey@quicinc.com>
ADC volume can support upto 27 different gain.
Current driver only supports 20. Make this change
to add more ADC volume support.
Change-Id: Ia315e15465affd5430d36637efb0cf3a12bb7b7e
Signed-off-by: Meng Wang <quic_mengw@quicinc.com>
Clear the wcd937x interrupt ack registers in post_irq_handler.
This is needed for wcd937x, as regmap_irq is not clearing
the ack registers after the ack bits are set.
Change-Id: I105a4b423a0d01ff1bd3239e0f2d42294557ff10
Signed-off-by: Vangala, Amarnath <quic_avangala@quicinc.com>
