Grafik Komit

1166 Melakukan

Penulis SHA1 Pesan Tanggal
Samantha Tran
0cec224bdb disp: msm: sde: dump DGM, CSC, and VIG gamut to sde debug dump range
This change adds DGM, CSC, and VIG gamut to sde debug dump range. It
also removes unused DSPP registers from debug register dump range.

Change-Id: I5a7adfeb4d93429cf84e7396338f2c025d15e800
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2021-04-29 19:28:08 -07:00
Linux Build Service Account
a8b8da6614 Merge "disp: msm: sde: defer reset of topology property in disable path" into display-kernel.lnx.5.10 2021-04-28 10:41:21 -07:00
Linux Build Service Account
07f20525c7 Merge "disp: msm: sde: check for valid pointer before accessing" into display-kernel.lnx.5.10 2021-04-28 10:41:20 -07:00
qctecmdr
17c64a201c Merge "disp: msm: sde: fix ubwc static config for rect_1" 2021-04-27 16:24:18 -07:00
qctecmdr
e7ead5ab59 Merge "disp: msm: sde: remove idle time from Qsync threshold calculation" 2021-04-27 16:24:18 -07:00
Samantha Tran
978edfa200 disp: msm: sde: check for valid pointer before accessing
This change initializes a variable as null to account for cases
when it is not set. This change also ensures proper pointer
checks before attempting to access function pointer.

Change-Id: I2f06a0877293668e80bee9d9b82d412476dc5184
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2021-04-27 16:07:29 -07:00
Prabhanjan Kandula
f4923f071d disp: msm: sde: defer reset of topology property in disable path
Resetting connector topology property in atomic check phase can cause
issues in concurrency scenario of idle-pc restore for encoder disable
commit. Defer resetting topology property for disable case until encoder
disable actually happens.

Change-Id: Ib53fb5e63df0ab6a332e981b182771b87ef77838
Signed-off-by: Prabhanjan Kandula <pkandula@codeaurora.org>
2021-04-27 16:06:28 -07:00
Dhaval Patel
de0f5328b0 disp: msm: sde: fix ubwc static config for rect_1
Fix ubwc static configuration for rect_1 when
multirects are enabled.

Change-Id: I68da7ebc98f9cd2d42a9c9ddc24f95891d5f38ae
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
2021-04-27 09:12:22 -07:00
qctecmdr
b0ea2d882f Merge "disp: msm: sde: remove check to commit RM resourses" 2021-04-27 06:11:35 -07:00
Steve Cohen
86d293e6cc disp: msm: sde: remove idle time from Qsync threshold calculation
Remove idle time from the Qsync calculation as this was added by
mistake to allow writes to complete just before the next TE but
this causes tearing. Also, to ensure tearing doesn't recur,
round down the threshold lines to the nearest multiple of 4, and
remove a couple of extra lines to compensate for potential
latencies.

Change-Id: I8a53a989e26cbd7f0e2b94caa8df8f5bee3ad26c
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2021-04-26 16:50:42 -04:00
Dhaval Patel
a698dbe5aa disp: msm: sde: fix autorefresh enable/disable sequence
SDE RSCC solver state and autorefresh enable concurrency
is not supported. This change moves the rscc solver state
to disable to avoid concurrency. It also resets the autorefresh
software structure state when encoder is disabled. This allows
autorefresh reconfiguration with next encoder enable.

Change-Id: Idb8c722c823d9f46d3cd03e1b046da69c8d88fc4
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
2021-04-26 10:27:15 -07:00
qctecmdr
bfba345316 Merge "disp: msm: sde: trigger panel event notifications" 2021-04-23 09:21:58 -07:00
qctecmdr
32c1f833ed Merge "disp: msm: sde: handle empty list of ROI in rounded corner" 2021-04-23 09:21:58 -07:00
Christopher Braga
a1698f39de Revert "disp: msm: sde: reprogram crtc and planes after post enable power event"
This reverts commit e2b438d88b.

Change-Id: I6d593121e74110fbe790ae4624a1c5df1b1ec731
Signed-off-by: Christopher Braga <cbraga@codeaurora.org>
2021-04-21 16:55:45 -04:00
Christopher Braga
43b6fb6b24 msm: drm: sde: Update SIXZONE to avoid READ_MODIFY during DMA broadcast
The LUTDMA broadcast programming path for the SIXZONE feature incorrectly
has a unprotected READ_MODIFY operation in the broadcast path. This will
result in all SIXZONE LUTDMA feature broadcasts to fail.

Update the SIXZONE LUTDMA logic to ensure all READ_MODIFY operations
happen out of broadcast mode.

Change-Id: If80040872e299f9bdcf16dec3285ac49a9fdc2e1
Signed-off-by: Christopher Braga <cbraga@codeaurora.org>
2021-04-21 16:51:06 -04:00
Shashank Babu Chinta Venkata
036bba0053 disp: msm: sde: trigger panel event notifications
Trigger various panel event notifications when
operational fps and power mode changes.

Change-Id: I8c5e066c8f20de4c31bb21a6fd6226dd93678fb6
Signed-off-by: Shashank Babu Chinta Venkata <sbchin@codeaurora.org>
2021-04-21 13:04:02 -07:00
Amine Najahi
154f37f92d disp: msm: sde: handle empty list of ROI in rounded corner
Currently, RC is assuming that partial update callback functions
will not be called when there is a full frame update and that CP
framework will return early instead. This assumption had to be changed
to support full frame transition for CP features such as demura and SPR
and now the responsibility is up to each feature to handle this corner
case.

This change is returning early in PU callback function if the payload
buffer is 0.

Change-Id: I478888fb036e642d5274a2cccc4d5378e62d6afa
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
2021-04-21 12:42:54 -07:00
Linux Build Service Account
76068d0304 Merge "disp: msm: sde: fix intf mux configuration" into display-kernel.lnx.5.10 2021-04-20 19:56:34 -07:00
Nilaan Gunabalachandran
c233dee598 disp: msm: sde: remove check to commit RM resourses
Commit bd234c1885 ("disp: msm: sde: avoid irq enable/disable
during modeset") adds a check before reserving RM resources as
part of modeset. Without this reserve, the resources are not
always allocated during modeset. This change removes the check
around the rm reserve to ensure resources are committed.

Change-Id: Icbb47ad781a04a0cd39c0190e9653eff470af7a0
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
2021-04-20 12:22:59 -04:00
Prabhanjan Kandula
662517b142 disp: msm: sde: fix intf mux configuration
While programming intf block Mux configuration with
binding ping pong, avoid clearing split select field
as clearing this field would enable split by default.

Change-Id: Iad2fa81969bc59abba4467f29661e62c63ba19c0
Signed-off-by: Prabhanjan Kandula <pkandula@codeaurora.org>
2021-04-19 13:25:50 -07:00
Nilaan Gunabalachandran
7c138e3f3c disp: msm: sde: null check for pp hw before encoder mode set
During encoder modeset, driver does not check for ping pong hw
before going through with mode set. This change updates the check
at the encoder mode set and adds a check at the encoder wait
for irq.

Change-Id: If27faa29ee29040808473e44994f42c36980a45e
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
2021-04-19 13:49:28 -04:00
qctecmdr
65ec8c0551 Merge "disp: msm: sde: reprogram crtc and planes after post enable power event" 2021-04-07 21:41:27 -07:00
qctecmdr
1d8a30b659 Merge "disp: msm: sde: frame data feature" 2021-04-07 18:40:26 -07:00
qctecmdr
ad4c8dc646 Merge "disp: msm: restrict AVR_STEP based on panel requirement" 2021-04-07 14:20:25 -07:00
Tatenda Chipeperekwa
e2b438d88b disp: msm: sde: reprogram crtc and planes after post enable power event
This change reprograms planes and crtc as part of the post enable
power event so that the first commit sequence after this event
does not have to reprogram these.

Change-Id: I2403337b95c70d2a3104aefcc647afa66f4c69a6
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2021-04-06 09:03:16 -07:00
Nilaan Gunabalachandran
c5835a215e disp: msm: sde: frame data feature
Add support to send a data packet of info, written to
predefined buffers, providing information about each submitted frame.
Add required UAPI definitions for frame data buffers and event
notification.
Add support to read ubwc statistics from hw, based on defined rois.

Change-Id: I51f279de98ae4e2a02b0df6943d334764011d5db
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
2021-04-06 08:49:49 -04:00
Gopikrishnaiah Anandan
0bc7a635f6 disp: msm: sde: fix color processing property update during commit
Some of the color processing features might not have a property node,
add checks to prevent caching values for these category of properties.

Change-Id: I02bfe8e6a6cce8526423c4d50bc2c781fff24efa
2021-04-05 12:14:15 -07:00
Steve Cohen
e5fa459062 disp: msm: restrict AVR_STEP based on panel requirement
Some panels require a fixed step rate for a particular mode.
This change allows DSI panels to specify a single supported
step rate for each nominal fps rate which SDE will enforce
during atomic check of AVR parameters.

Change-Id: I049415449bc88ccd396fced16d4534251eac3a06
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2021-04-04 18:45:40 -04:00
Steve Cohen
cf86c94f8e disp: msm: sde: add support for AVR_STEP feature
Add AVR step support so SW can trigger a late frame and instead
of immediately triggering, HW will perform the update at the
start of the next step interval. This allows for a fixed SW
vsync timeline to be maintained in userland, eliminating the
usual drift from the actual HW vsync caused by a late frame.

This change adds AVR_STEP support via a DRM property.

Change-Id: I4cf8a296989805f134c2165a3bed0b050bb09c96
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2021-04-04 18:40:57 -04:00
qctecmdr
ccf41a547c Merge "disp: msm: sde: avoid irq enable/disable during modeset" 2021-04-03 06:52:12 -07:00
qctecmdr
044fa60dd8 Merge "disp: msm: sde: expose skip inline rot threshold property" 2021-04-03 05:48:59 -07:00
qctecmdr
e9b4bb5a43 Merge "disp: msm: sde: trace: copy evtlog array into individual elements" 2021-04-03 03:38:58 -07:00
qctecmdr
749c899317 Merge "disp: msm: add cwb dither support" 2021-04-02 20:58:22 -07:00
qctecmdr
a8bdcf2e77 Merge "disp: msm: sde: report AVR_STATUS in vsync_event sysfs node" 2021-04-02 17:42:22 -07:00
Samantha Tran
b2e26167dc disp: msm: sde: expose skip inline rot threshold property
This change exposes whether or not inline rotation threshold
should be taken into consideration or skipped based on
skip_inline_rot_threshold property.

Change-Id: I4108f6ae86039815d28836bfa0e184737aaddd8a
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2021-04-02 10:09:13 -07:00
Linux Build Service Account
f035d89da8 Merge "disp: msm: sde: fix set property retire fence return code" into display-kernel.lnx.5.10 2021-04-02 09:48:51 -07:00
qctecmdr
b0d2030f38 Merge "display: msm: sde: update qos lut after scaler config" 2021-04-01 22:56:00 -07:00
qctecmdr
133fc8a6e8 Merge "disp: msm: sde: fix potential race condition" 2021-04-01 11:12:09 -07:00
Amine Najahi
e3597ef9a0 disp: msm: sde: fix set property retire fence return code
Change return code in set property retire fence function
to properly handle the cases when the user value is 0.

Change-Id: I32481ba6bdb13df707cf36a70aa2d49506cd7d7c
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
2021-04-01 14:05:58 -04:00
Abhijit Kulkarni
559620308e display: msm: sde: update qos lut after scaler config
This change moves the code of updating the qos lut for qseed3
to each plane after updating the scaler configuration. This
avoids using stale values for qos settings.

Change-Id: I2c55a98e1ba9790d596c55160933cd5afd2388e5
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
2021-03-31 17:32:30 -07:00
Xiaowen Wu
2f36a8f57a disp: msm: sde: add scaler3_cfg and pixel_ext to sde plane
Add scaler3_cfg and pixel_ext to sde plane to avoid updating state
variables in commit thread. This fixes atomic check failure when
scaler lut is not set.

Change-Id: I936b124ca6f90af22a87df31536204e837422a70
Signed-off-by: Xiaowen Wu <wxiaowen@codeaurora.org>
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
2021-03-31 17:31:44 -07:00
Ping Li
7ed51b95a2 disp: msm: sde: fix potential race condition
Move the hist irq handling out of callback function, i.e., the hw
interrupt irq_lock context, to avoid dead lock between crtc spin_lock
and irq_lock. This change also extends crtc spin_lock coverage in
_sde_cp_crtc_enable_hist_irq to prevent null pointer dereference on
event node, which can be deleted during crtc event de-registration.

Change-Id: Iadaed54ab93c4c4abe065a8762d2addccb0c65c6
Signed-off-by: Ping Li <pingli@codeaurora.org>
2021-03-31 16:07:40 -07:00
Jayaprakash
b769b30b97 disp: msm: sde: add changes to wait for only one WB_DONE irq
With WB encoder added in the drm encoder_list before primary
encoder introduced as part of commit d28ebf05f4 ("disp:
msm: sde: populate WB display encoder list before dsi"),
sde_kms_wait_for_commit_done during CWB usecase is causing
crtc_commit thread to wait for two WB frame done irqs causing
janks on primary. Add changes to unblock crtc_commit thread and wait
for only one WB frame done irq.

Change-Id: Ie298302fea9df8ba5a1c2fa04f5f585ae455e0c9
Signed-off-by: Jayaprakash <jmadiset@codeaurora.org>
2021-03-31 15:25:03 -07:00
Jayaprakash
7f568a8d71 disp: msm: sde: allow delayed_off_work scheduling always
Add changes to allow delayed_off_work scheduling in all cases.
Skip scheduling only in panel_dead cases where delay_kickoff
is enabled. This will fix the issue seen with commit 08d04c2f3bae
("disp: msm: sde: avoid rc restart when triggered from panel dead").

Change-Id: I4c9a7cd26af9d99ecd3f58023a6fb6d041d91e92
Signed-off-by: Jayaprakash <jmadiset@codeaurora.org>
2021-03-31 15:24:55 -07:00
Mahadevan
bc86c9a0cc disp: msm: sde: avoid rc restart when triggered from panel dead
This change prevents scheduling of rc_restart in case of
panel dead. This early return is required to avoid the list
add corruption when a race condition happens between event
thread and commit thread. When event thread is handling
display failure notification if the virt_enable arrives in
commit thread it will reinizialize kthread for
delayed_off_work without deactivating the existing list
which leads to linkage corruption.

Change-Id: I41d08cd47ba6f887f0860e52bcddf414085524bb
Signed-off-by: Mahadevan <mahap@codeaurora.org>
2021-03-31 15:24:48 -07:00
Yashwanth
43d147f299 disp: msm: sde: save register write logs in dump
Changes are made to add register write logs to memory dump.
This can be extracted from crash dumps and used for analysis.

Change-Id: If46aaa4ae68f83c79d4b51cbe5dfd22340aa991d
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
2021-03-31 15:02:54 -07:00
Andhavarapu Karthik
3aa443223b disp: msm: sde: disable uidle for yupik target
Made changes to disable uidle feature in yupik target.

Change-Id: If122a86ed14002399e2dbd0b62385d47c854136f
Signed-off-by: Andhavarapu Karthik <kartkart@codeaurora.org>
2021-03-31 15:02:24 -07:00
Narendra Muppalla
21f527d47d disp: msm: sde: use different spin lock for frame events
Due to lock sequence inconsistency between sde_crtc->spin_lock and
sde_kms->hw_intr->irq_lock can cause deadlock, to avoid this possible
deadlock this change uses different spin lock for frame events.

Change-Id: I51b1184dfa1069c87653099b95b992b277721daf
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
2021-03-31 15:02:14 -07:00
Dheeraj Madiraju
f5148f4a7c disp: msm: sde: add hdr flags for yupik
Add hdr flags for yupik.

Change-Id: Ica8d752499dae5d80d99f3f0caccbbfed4e539ec
Signed-off-by: Dheeraj Madiraju <dmadiraj@codeaurora.org>
2021-03-31 15:01:59 -07:00
Andhavarapu Karthik
1ee9dc4a55 disp: msm: sde: add rev check for mdp in yupik target
Add required revision checks for mdp in yupik target.

Change-Id: I2747a0addfb3b4880397d56b18a9e9aa9644df34
Signed-off-by: Andhavarapu Karthik <kartkart@codeaurora.org>
2021-03-31 15:01:00 -07:00