Existing cwb implementation waits for WB done interrupt in
wait_for_commit_done API call. This serializes the cwb commit
and causes frame trigger delay on primary display. MDSS hw allows
to trigger the cwb frame when previous frame is in-progress. This
change updates driver to allow parallel frame trigger for cwb
enabled display. It releases frame N cwb output buffer in frame
N+1 wait_for_commit done call.
Change-Id: Id4f2a0cc78a3f24a1b5ce96dc907780246768dbf
Signed-off-by: Raviteja Tamatam <travitej@codeaurora.org>
Current sde driver allows vblank enable and wait requests
even after crtc is disabled which would eventually lead to
enable of irq and timeouts in caller context. This change fixes
it by updating vblank callback status as 'on' during crtc enable
and shutdowns vblank callbacks before crtc disable is complete.
Change-Id: I52b74f685107f4dc8c83305c28f23cdcb4747730
Signed-off-by: Prabhanjan Kandula <pkandula@codeaurora.org>
Signed-off-by: Lakshmi Narayana Kalavala <lkalaval@codeaurora.org>
Currently there is a race condition in checking the
pending_kickoff_cnt in wr_ptr_irq wait from display-thread
and pp_done_irq from interrupt context. In both places,
pending_kickoff_cnt is read first and modified later. In
partial update cases where the frame-transfer is short,
such a race condition might happen and would lead to both
triggering the frame-done/release fence for the same frame.
Fix it by combining read/modify to one statement in both places.
Change-Id: I9162e7dc3f12af3590514f1ebfd68023aa920181
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
This change corrects the secure id to hold vaddr
instead of paddr.
Change-Id: I021f5c0c7708eb2a0b166fe3a6c13b11aaf33419
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
Primary and secondary displays should have first priority
when reserving lms. Static reservation can potentially block
higher resolutions for the required displays. This patch gets
the layer mixer requirement for primary or secondary display
if available. It reserves those layer mixers dynamically
for the respective display when connector is registered.
Change-Id: Id69dac4c72d6b20008049f4aeb71c0f97d0a426b
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
For some phy ver 4 chipsets, DSI_PHY_CMN_CTRL_4 needs to be programmed
in normal power up sequence. This change adds support to program the
same based on minor phy version.
Change-Id: I68bed48ca671f540efafd13f8d56c7e90de8b25c
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
Add support for lane count reduction as per the new requirements
for DP 1.4a during link training 2.
CRs-Fixed: 2458753
Change-Id: I58c9b6101338e8a1d1b4e3dec80f8fdf2a25ae5b
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
Update the DP controller and PHY programming according to
the new hardware recommendations.
CRs-Fixed: 2458753
Change-Id: I1bce5915ba6ebbb250cc5c4aac907b0b287eece7
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
Add support to selectively enable clock gating for supported
DSI clocks using a new debugfs node - config_clk_gating. This
new node would be created for every display node. See below
for usage examples:
To enable clock gating only for BYTE clock:
echo 1 > /sys/kernel/debug/<display_name>/config_clock_gating
To enable clock gating only for PIXEL clock:
echo 2 > /sys/kernel/debug/<display_name>/config_clock_gating
To enable clock gating only for PHY clock:
echo 4 > /sys/kernel/debug/<display_name>/config_clock_gating
To enable clock gating only for all clock:
echo 7 > /sys/kernel/debug/<display_name>/config_clock_gating
To disable clock gating for all clocks:
echo 8 > /sys/kernel/debug/<display_name>/config_clock_gating
To go back to default setting:
echo 0 > /sys/kernel/debug/<display_name>/config_clock_gating
Change-Id: I83713d86eb1b9675d40d51fc20de81cca0aeb1c0
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
SDE driver triggers the frame and waits for the
ctl_start interrupt for command mode display. This interrupt
provides confirmation that hardware has picked up the
frame. Retire fence signaling is associated with
this interrupt and it is sent at the rd_ptr interrupt
after ctl_start. Due to lut dma delay, ctl_start interrupt
may be trigger before rd_ptr or after rd_ptr. SW manages
this complexity and handle retire fence for different cases
with 500us threshold logic.
This change replaces the ctl_start interrupt with wr_ptr
interrupt by programming it to trigger at 1st write line
count. This is guaranteed to come every time and it is close
to rd_ptr interrupt. That allows retire fence trigger at
wr_ptr interrupt and simplifies the SW logic. CRTC commit
thread would be held slightly longer with this change
as the wr_ptr is always close to rd_ptr and after
ctl_start.
Change-Id: Ic47a8f82c854b4aded0d70c95af853b28a68ffd6
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
If we set esd check mode as TE signal check for video mode panels
the panel will be continuously reset. This change doesn't allow
TE signal check as ESD check mode.
Change-Id: I42a09d605b259d9f06c67cb126d3684ed4489699
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
This change fixes the invalid memory access. It allocates
enough memory so that out of bounds access is avoided.
Change-Id: I0749eac54cfa91891a4377b99fbd7f24dd3bd02a
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
This snapshot ports changes from 4.14 to 4.19 into
the msm and sde layer. Snapshot was taken as of
commit 0f8fb25421ff ("cnss2: Add device version to
SOC info structure").
Change-Id: I59b799a78319c2db6930a2a10bc38976f8c09898
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
This change updates the checks needed before setting the flag
to enable panel switching between command and video mode.
New crtc active state remains disabled and it causes a failure
in the previous case.
Change-Id: I059731d2faa0f7844d3784fcf7694509fbba3ff7
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
This change populates values for per_pipe_bw_high
from the device tree. This value is exposed to userspace
as the bandwidth per pipe available in the no VFE
scenario.
Change-Id: I61346ee55dfd4b6b0736ecf0b96e061f4f3934c3
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
Each mode_set call makes sure that previous frame is triggered
and triggers the esd check if there is pp_timeout. This may
lead to deadlock between crtc commit and event threads. Crtc
commit thread acquires the rc_lock and triggers the flush_thread
API on event_thread. Event thread again tries to acquire the
rc_lock to wait for frame. This can be prevented by avoiding the
pre_kickoff call from esd_failure notification if it is generated
through pp_timeout.
Change-Id: I561fef0345976ab0cae61aab6718214c47fa1393
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
Fix possible out-of-bound access and NULL pointer
dereference in SDE and PLL driver.
Change-Id: Ic5c34b3b4c3e983413a0351c38206cf3f3ab3b1f
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
