For dual panel, if they both used sim TE, the vsync sources
were set to the same watchdog timer. That's wrong, so need to
set different watchdog timer for different panels.
Change-Id: I8a5b4c6bb86b0b640d24fbfe6517e223d313fb68
Signed-off-by: Yuan Zhao <yzhao@codeaurora.org>
VM switches during TUI usecase are expected to be seamless i.e without
display reset. In SDE language, this translates to respective display
drivers not tearing down the HW pipeline while releasing the HW.
In Primary VM, this taken care by keeping the DRM pipeline alive when
TUI is active.
In Trusted VM, since the client creates and destroys the display per
session, checks are needed to bypass the physical encoder disable(s).
Change-Id: Iac42f02806962405c9364b1ffed85778229977e9
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
A frame trigger with posted start may have two frames
in wait state due to irq disable on that CPU. In such
case, frame_done count can reach till 2. Allowing count
only till 1, can cause the release_fence trigger miss
and a buffer is held by DPU driver.
Change-Id: I42c10b064ebcaff136591975f3010c11f99a0731
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
During transition to cwb, kthread initialisation has to
be done for the corresponding encoder off work so that
the correct worker thread is used for this particular
work. There can be scenarios where a cwb commit is
received after a writeback session and the worker
associated with the off work is still assigned to
old crtc's worker resulting in a mismatch when
this work is queued. Add support to handle such
scenarios.
Change-Id: I6080025e799977827f4d0f4ab7eb93c6644f981e
Signed-off-by: Krishna Manikandan <mkrishn@codeaurora.org>
This change addresses out of range and null checks in
sde driver.
Change-Id: I4ee82760ce3ee7053c336e49ec9eaae8b4c31b1e
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
Add support for all 4LM topologies in new DCE encoder framework.
This change also aligns with the new way of checking topology
information.
Change-Id: I5358d60634070bdb26059056db884ad4161c073e
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
Vsync event timer wakeup was designed to reduced the
interrupt latency and trigger retire fence without delay.
This is fixed by avoiding CPU power collapse where MDSS
interrupt is scheduled. This change avoids extra CPU
wakeup.
Change-Id: Iadaf0e2b84fb079bbc64d9201230df54f8dbe8c1
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
Add support for all 4LM topologies in new DCE encoder framework.
This change also aligns with the new way of checking topology
information.
Change-Id: I20785c96569fd07cbd8016d244a7e4c929bfa071
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
Display is entering into mode2 since no new frames are queued,
but auto-refresh requires HW to remain active. Make sure to
cancel the timer for entering idle power collapse whenever
there's a kickoff with auto-refresh feature enabled.
Change-Id: I0ac74e514c9893c31506edc3f2d7e069ab9a3ef8
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
This change updates resource topology mapping tables and includes
logic to compare compression types for dsc vs vdc.
Change-Id: I1735edeb07aec8ed0065f84ac0824c58158412f3
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
Setup blendstages is done per LM but FETCH_PIPE_ACTIVE is per CTL.
Overloading mixer blendstage setup with fetch pipe logic can lead
to HW programming errors. Refactor the logic for setting
FETCH_PIPE_ACTIVE by adding a new op that allows caller to provide
a bitmask of all pipes required to be active on this CTL. This new
logic includes support for:
- 4LM use-cases, staging pipes for all LMs within a CRTC
- Demura fetch-pipe without need for tracking via active_cfg (removed)
Also, lower the cyclomatic complexity in setup_blendstages by moving
the logic for obtaining the mixer config settings in to a helper
function.
Change-Id: I2907b359ffad5734be5b06f44919b5ddb1ef3f7c
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
Currently, compression info passed to resource manager is not
valid in atomic check phase. Also in current design allocation
of msm mode info object is from stack which is huge and causing
stack overflow in continuous splash use case. This change fixes
these issues by moving mode info object to heap allocation.
Change-Id: Ifaf39b3ae59c942da5c00b82c73cb97cdaf500d3
Signed-off-by: Prabhanjan Kandula <pkandula@codeaurora.org>
Lower the cyclomatic complexity for this function by splitting
the work into helpers.
Change-Id: I9e32d4ff13d31360a2baa77e013751ee8f0773fb
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
This change updates plane's dirty flag with QoS
value to ensure QoS gets reprogrammed with new FPS
settings. This is required as QoS values will change
with FPS.
Change-Id: I377b99da2a640d375bd48477f149197b332e7f7b
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
Restart the timeline for the idle power collapse delayed work
timer for every resource control kickoff instead of only during
a power state change. This will prevent entering mode2 at
unexpected times during active scanouts.
Change-Id: I001157ff7e6b6246e26d537e30d8617cab9cb463
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
Current computation of line time does not include compression ratio
from either DSC or VDC. This change stores source bpp and target bpp in
sde_crtc during sde encoder mode set to be used while calculating line
time.
Change-Id: Ib1e045dce17fcf006447d4562b402cc3f214ed8c
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
From Lahaina onwards, widebus is enabled for compressed DSI stream.
This change adjusts interface timing parameters to account for widebus.
Change-Id: Ie6b739ed2cdb515064e3a94404b3e0fe07755d7e
Signed-off-by: Rajkumar Subbiah <rsubbia@codeaurora.org>
Current wakeup time is surpassing next vsync and not being used.
This change will use mdp transfer time calculated by dsi to compute
line time in command mode. In video mode, fps will be used to compute
the line time. This line time will be used with current interface
line count to calculate time until the next vsync.
Change-Id: I0b6fc396711ade95ecf95755a907280309af223e
Signed-off-by: Thomas Dedinsky <tdedinsk@codeaurora.org>
This change adds helper to retrieve the kms from
the drm_enc structure and provides additional error
checking which can be avoided in the callers.
Change-Id: Id8ba07a2d48a605dd4ce846e5d61f302e5861b4d
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
Some of the features in the DPU hardware needs planes to be staged but
it should not be blended in the layer mixer. Change adds support for drm
driver client to set the blend type on the plane and updates driver code
to skip staging the plane.
Change-Id: I1e8c7f6ce5617820ea8b24419e0d4d27b481819b
Signed-off-by: Gopikrishnaiah Anandan <agopik@codeaurora.org>
In dual display with continuous splash, when autorefresh gets
disabled in primary on first commit, solver mode gets enabled
and mdp_clock is gated whenever primary enters idle. The
secondary data path will get gated during that time and not advance
anymore. Asynchronous gating of the mdp_clock during operation
can also hang the secondary path. This change avoids entering
the solver mode which fixes the timeout in the autorefresh
disable sequence in the secondary.
Change-Id: I7562ce2ad72d3bb8e8b6b8f356fab6def0caaf92
Signed-off-by: Jayaprakash <jmadiset@codeaurora.org>
After coming out of idle state, bus vote is governed only
if there any change in perf compared to before entering idle
state. If the perf is same before and after the idle state,
bus update request is not considered and min bus votes are
voted. This change resets crtc core perf while entering
idle state always in command mode.
Change-Id: If172207422adc25fcee497aebe23aad1ac6ce7cc
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
Input event handler can be unregistered without being
registered in the case where DMS or DYN_CLK flags
are enabled on first commit, add changes to handle
this sequence.
Change-Id: Idf4f9f310b5d56df396bfa5c6477e94d4fae7a9f
Signed-off-by: Jayaprakash <jmadiset@codeaurora.org>
Add a null check for encoder before accessing ops.
Change-Id: I7b80f4aded89d6c6fe68a0d016f64e14f04f2e58
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
Reset MDP ctl path and DSI ctl on autorefresh
disable failure. This will enable the hardware
to recover from the hang.
Change-Id: Ia9acc8573c22e0713179ef4f6ef604caacabfadb
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
This change adds logic to align timing engine vsync with panel
tear check if it is supported.
Change-Id: I3f881f392929589848c893f567822b21c0650000
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
Add underrun line count information for each underrun.
Change-Id: I34a740c33240fa8d444f4bbc3b8b014b0282fca1
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
Using individual flush functions for each active hw blk
is not scable-able for future use. Clean up the ops to merge
all flush functions into one and manage HW block id
with same API.
Change-Id: I62afbc51fa7d345b3a1f5721e5e09661a4215f7a
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
Add changes to commit and decrement only those
hardware resources which are required for the modeset.
Timeline of Commit C1 with CWB modeset:
---> Atomic_check
Primary encoder has allocated required HW resources.
CWB encoder has allocated required HW resources.
---> Atomic_commit
On primary encoder, connector is seamless hence
there is no virt_modeset call.
On CWB encoder, there is virt_mode_set call
and during commit HW blocks there is unconditional
decrement for all the HW blocks with rsvp_nxt.
This change ensures hardware blocks are available during
dp display mode validations.
Change-Id: Ifd9439cfc96e727c3093af5f47802c8367775cd7
Signed-off-by: Jayaprakash <jmadiset@codeaurora.org>
This change programs dither based on user mode input data and
reprograms the dither when device comes out of power collapse.
Change-Id: I83be20c8eb2dc2221cc57cd2395f6512338ff6ef
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
In the current kernel version calling kthread_mod_delayed_work
in irq context is not allowed. Due to this resource control state
change to idle on frame done is handled in display thread context.
Change-Id: I709f7e04ac23d7dde72cea1c19d3767b6abc147e
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
Add support to configure the DPU pipeline to support VDC-m
topologies.
Change-Id: Ib8ce9a0eaeaa838759fb09cb2ee164d4765e4989
Signed-off-by: Abhinav Kumar <abhinavk@codeaurora.org>
Certain DSC hw blocks only support 444 mode, while others
support both 444 and 422 modes. This change adds support in
resource manager to check the hw resource requirement with
the capability of the block and then reserve the correct
hw resource.
Change-Id: If85beb2f2f25e9eb7f8a8321c94b57878d048369
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
This change checks the capabilities of pingpong block to
check if it needs to call the pingpong api to enable or
disable the dsc. Certain hw versions do not have support
in pingpong block to enable/disable the dsc instead the
dsc block itself have the hooks to control the DSC.
Change-Id: I17dd45479cc33ff2e81f6a6e5a5a8704562dfd24
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
