Commit Graph

17 Commits

Author SHA1 Message Date
Steve Cohen
d66ea6fc29 disp: msm: sde: use the correct get_status op for all INTFs
A new status register was added in DPU 5.x to INTFs to allow for
confirmation when the timing engine is disabled. This
functionality was controlled via an overloaded feature flag
which is used to enable INTF tear-check ops (also added in DPU
5.x). External displays support INTF_STATUS but have no use for
any tear-check functions. Separate these features so they can be
enabled individually on the interfaces which support them.

Change-Id: Ib8548619cb58bf19b7c02211ead7f33f52ffeae4
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-08-23 21:23:18 -04:00
Steve Cohen
a4be27ac7e disp: msm: sde: report intf interrupt status during underrun
Add the INTF interrupt status register value to the underrun
line count event log to assist in debugging these issues.

Change-Id: I847cb12f8b4565d5f04667e0abda5d051a6194b2
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-07-29 22:14:04 -04:00
Rajkumar Subbiah
c0d4857a81 disp: msm: sde: adjust intf timing for widebus
From Lahaina onwards, widebus is enabled for compressed DSI stream.
This change adjusts interface timing parameters to account for widebus.

Change-Id: Ie6b739ed2cdb515064e3a94404b3e0fe07755d7e
Signed-off-by: Rajkumar Subbiah <rsubbia@codeaurora.org>
2020-04-09 14:14:55 -04:00
Dhaval Patel
e7123aec1c disp: msm: sde: update autorefresh disable seq-2
Update autorefresh disable sequence-2 by avoiding
tearcheck enable configuration. Updated sequence
will trigger the frame by resetting the write
line count with tearcheck start position.

Change-Id: I984251c0cb23475f20cd5ea62122a167324d6670
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
2020-03-29 19:24:54 -07:00
Dhaval Patel
1a9e3bae54 disp: msm: sde: update autorefresh disable sequence
Autorefresh might be still in enabled state after
write_ptr reached to display height. This patch
checks the autorefresh status bit and keeps polling
the bit till autorefresh sequence is in enabled
state. It times out after 1 second if autorefresh
is still in enabled state.

Change-Id: I5d4f4cb35e5cc8c680c1878f52cee385f709d764
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
2020-03-29 19:24:42 -07:00
Narendra Muppalla
68ee65353b disp: msm: sde: align timing engine vsync based on panel vsync
This change adds logic to align timing engine vsync with panel
tear check if it is supported.

Change-Id: I3f881f392929589848c893f567822b21c0650000
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
2020-03-11 10:14:57 -07:00
Dhaval Patel
9438f3448b disp: msm: sde: add underrun line count information
Add underrun line count information for each underrun.

Change-Id: I34a740c33240fa8d444f4bbc3b8b014b0282fca1
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
2020-02-28 11:57:47 -08:00
qctecmdr
6eab0179f2 Merge "disp: msm: sde: fix spacing of #defines" 2020-02-05 16:21:37 -08:00
Abhijit Kulkarni
7317dc417f disp: msm: sde: intf accept 64-bit compressed pixels
This change enables the interface hw block to accept
64-bit compressed pixels. This configuration is enabled based
on hw capability. For current hw, this is required any time
the compressed pixels flow through the interface block,
whereas in the previous version of DPU hw this configuration
is only required for topology using 4 way dsc merge.

Change-Id: I7bf79d035dba5084c5057022a7fa1117479e8d52
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
2020-01-29 22:39:44 -08:00
Steve Cohen
f303123d53 disp: msm: sde: fix spacing of #defines
Defines should always have a single space between #define and
the keyword to allow for searching where these definitions are
located using grep.

Change-Id: I38778e789b12df8a7a22c22dd27152a5ab047405
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-01-29 14:51:09 -08:00
Jayaprakash
985ffddc71 disp: msm: sde: add one-shot qsync mode support
Add support to enable one-shot mode during qsync
update. This feature ensures the frame drops can be
reduced due to delayed software flush for the
current commit. Also, add changes to disable the qsync
feature post commit.

Change-Id: Icb158853f52284bcf8fa641e5f62200c5460b660
Signed-off-by: Kalyan Thota <kalyant@codeaurora.org>
Signed-off-by: Jayaprakash <jmadiset@codeaurora.org>
2019-10-18 12:53:17 +05:30
Jayaprakash
ad40a300a1 disp: msm: sde: allow qsync support along with VRR
Allow Qsync and VRR features to be supported independently
by display driver. Restrict the feature availability in
same composition cycle.

Change-Id: I696eb72a2b4f9451e142ffdc5acccc8987c36b6d
Signed-off-by: Kalyan Thota <kalyant@codeaurora.org>
Signed-off-by: Jayaprakash <jmadiset@codeaurora.org>
2019-10-17 17:07:33 +05:30
Dhaval Patel
bcd97aa368 disp: msm: sde: fix cwb, dp and wb tear down sequence
CWB, DP and WB displays tear down sequence must reset
3d_merge, ctl, pingpong_binding, etc. MDP HW
blocks. This change fixes the tear down
sequence register programming. It also moves flush
sw reset before encoder_disable call. That allows
CWB tear down to update the flush configuration
on primary ctl path.

Change-Id: I21c521b39456af4144cf836c65d46a25c985f51d
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
2019-07-18 14:13:33 -07:00
Nilaan Gunabalachandran
c6092f3e66 disp: msm: sde: log intf framecount in event logs
Log hardware interface framecount during te and vblank irqs for
command and video mode panels, respectively. This will help in
debugging any missed frames.

Change-Id: Ie86f686c4cc12de6a1f31aa47d4c7a5b8a68ea55
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
2019-06-26 11:54:51 -04:00
Samantha Tran
1ab07a4d7c disp: msm: add changes missing during snapshots
This change ports the missing changes from 4.14 to 4.19
that were missed. It includes changes up until
commit 0f8fb25421ff ("cnss2: Add device version to
SOC info structure").

Change-Id: Idfdfe891f146e389e3c65cc3fc4c98d93220e789
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2019-06-03 09:07:38 -07:00
Veera Sundaram Sankaran
6daf1c58e7 disp: msm: sde: use wr_ptr interrupt instead of ctl_start
SDE driver triggers the frame and waits for the
ctl_start interrupt for command mode display. This interrupt
provides confirmation that hardware has picked up the
frame. Retire fence signaling is associated with
this interrupt and it is sent at the rd_ptr interrupt
after ctl_start. Due to lut dma delay, ctl_start interrupt
may be trigger before rd_ptr or after rd_ptr. SW manages
this complexity and handle retire fence for different cases
with 500us threshold logic.

This change replaces the ctl_start interrupt with wr_ptr
interrupt by programming it to trigger at 1st write line
count. This is guaranteed to come every time and it is close
to rd_ptr interrupt. That allows retire fence trigger at
wr_ptr interrupt and simplifies the SW logic. CRTC commit
thread would be held slightly longer with this change
as the wr_ptr is always close to rd_ptr and after
ctl_start.

Change-Id: Ic47a8f82c854b4aded0d70c95af853b28a68ffd6
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2019-05-23 10:29:30 -07:00
Narendra Muppalla
3709853456 Display drivers kernel project initial snapshot
This change brings msm display driver including sde,
dp, dsi, rotator, dsi pll and dp pll from base 4.19 kernel
project. It is first source code snapshot from base kernel project.

Change-Id: Iec864c064ce5ea04e170f24414c728684002f284
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
2019-04-14 22:20:59 -07:00