Commit Graph

41 次程式碼提交

作者 SHA1 備註 提交日期
Sanskar Omar
c4f0b40ddd disp: msm: sde: handle first commit after resume for demura init property
Demura init property gets reapplied during first commit after resume.
However, first commit after resume is null commit and HFC correction
file will not be available during first commit.
This change marks error to warning for first commit after resume.

Change-Id: I01ec4bd977d60925d9b7a54076329c3becaa0b20
Signed-off-by: Sanskar Omar <quic_sansomar@quicinc.com>
2023-11-27 20:15:19 -08:00
Shamika Joshi
fbb95ab7c2 disp: msm: sde: add detect_ctrl to tear_check block
This change adds detect_ctrl to tear_check block and
programs it to its default configuration.

Change-Id: I7665b373a6cd846bf5979c2dc02bc0bdfdf309ab
Signed-off-by: Shamika Joshi <quic_shamjosh@quicinc.com>
2023-06-16 14:46:25 -07:00
Mitika Dodiya
c9298e3712 disp: msm: sde: add demura v2 support
Add support for demura v2 by adding demura blocks
2 and 3 for pineapple target.

Change-Id: I9e6107480ab44853ca49e6396787378c5c70557a
Signed-off-by: Mitika Dodiya <quic_mdodiya@quicinc.com>
2022-11-14 22:18:38 -08:00
qctecmdr
03f6a06942 Merge "disp: msm: sde: enable WB rotation feature for pineapple target" 2022-10-20 12:29:12 -07:00
Prabhanjan Kandula
4cca89d615 disp: msm: sde: add drm properties required for wb rotation
This change installs required drm properties for writeback
connector to implement rotation with writeback hw in mdss.

Change-Id: I85ed359d06ff4bafee85a4bfa5b8a99774311e60
Signed-off-by: Prabhanjan Kandula <quic_pkandula@quicinc.com>
2022-10-19 11:22:49 -07:00
Raviteja Tamatam
22a3c5a842 disp: msm: fix display compilation for 6.0 kernel upgrade
Fix display compilation issues for 6.0 kernel upgrade.

Change-Id: Ied1940e653ceaa1de18a8aedeab01197c235603c
Signed-off-by: Raviteja Tamatam <quic_travitej@quicinc.com>
2022-10-19 11:04:22 -07:00
Shamika Joshi
b9553cf5f3 disp: msm: sde: add changes to support additional dedicated-CWB
Update the hardware blocks and corresponding APIs
to configure new D-CWB data path. Add new hardware
pingpong blocks that are dedicated for second DCWB.

Change-Id: I529c24ac5aa483f30b6c9e7653eb1713c6b8fb8a
Signed-off-by: Shamika Joshi <quic_shamjosh@quicinc.com>
2022-10-13 20:02:57 -07:00
Anjaneya Prasad Musunuri
87332208c3 disp: msm: sde: update HFC layer checks
Update HFC layer checks to handle partial update. Layer checks
should compare against ROI when partial update is enabled.
Layer checks should compare against full panel height when
destination scaler is enabled. Destination scaler and PU
concurrency is not supported.

Change-Id: I3435370a81f05a492411433054ae09f2125c6bf7
Signed-off-by: Anjaneya Prasad Musunuri <quic_aprasad@quicinc.com>
2022-03-11 20:20:48 -08:00
Lei Chen
ec9231090c disp: msm: sde: add support for DS2 and DS3
Expand the DS enum and increase the DS max number
to support DS2 and DS3.

Change-Id: Iff8d591fece20528e30449c228db5cb2047cdded
Signed-off-by: Lei Chen <quic_chenlei@quicinc.com>
2022-01-28 12:58:06 +08:00
qctecmdr
69d1699364 Merge "disp: msm: sde: add offline WB QoS support" 2022-01-10 18:41:50 -08:00
Veera Sundaram Sankaran
d1dcc8da8e disp: msm: sde: remove rgb/cursor pipe related code
The HW support for RGB pipes were removed from MDSS 3.x and cursor pipes
from MDSS 4.x. Remove the support from s/w as well with this change.

Change-Id: Ib5b363234e200ee5c421684cf1904a38a5d90b58
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
2022-01-07 16:53:44 -08:00
Veera Sundaram Sankaran
b7f241585a disp: msm: sde: add offline WB QoS support
Add support to parse and configure QoS values for offline writeback.
Expose a writeback connector property to allow user-mode to set
the usage type of the writeback block - WFD, CWB, offline-WB.

Change-Id: I864f79c4896ec757ac2d8b0f57a6a5775d164f21
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
2022-01-05 17:16:12 -08:00
Xu Yang
882cc50498 disp: msm: sde: extend RC2/3 and LTM2/3 for Kalama target
Change supports extending the enum for LTM2/3 and RC2/3.

Change-Id: I45df1808fa3a7e23f20afef084edaf091a59d7dd
Signed-off-by: Xu Yang <quic_yangxu@quicinc.com>
2021-12-07 11:40:54 +08:00
Veera Sundaram Sankaran
8a86ccc9fc disp: msm: sde: add dnsc_blur validations in wb encoder
Add downscale blur block validations in atomic_check phase of writeback
encoder. Downscale blur along with partial update is not supported.
NV12 output in WB is not supported with downscale blur as CDM block
usage is mutually exclusive with dsnc_blur. If destination scaler is
enabled, the ds src or dst should match with dnsc_blur src based on
the ds tap point chosen.

Change-Id: I1d643dc26738c0e77d8e9181b4c834693153209c
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2021-12-01 15:11:16 -08:00
Veera Sundaram Sankaran
37ab0f2419 disp: msm: sde: add dnsc_blur HW block support
Downscale blur HW block support is added from MDSS 9.x. The block
can be used to downscale the layer mixer output before feeding it to
the writeback block. It can be used for both writeback & concurrent
writeback usecases. Add hw files and the respective blocks in sw to
program the downscale blur block.

Change-Id: Ic5787e1655eff5ef0960b7569e48d2f35d23bfc9
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2021-12-01 15:11:15 -08:00
Veera Sundaram Sankaran
993f61c91d disp: msm: sde: expose system cache support for writeback
Add a custom cache_enable property in writeback connector to allow
user-mode to control the cache setting on a frame basis. Configure
the hw and activate/deactivate the llcc based on the property. The
custom property is added based on the availability of the system
cache for writeback.

Change-Id: I812b31955eb36c75c33ac279b56502a13f7cdcbf
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2021-11-19 11:13:29 -08:00
Amine Najahi
d36499ca86 disp: msm: sde: add support for DMA 4,5 for Kalama
Expand various SSPP and CTL related data structures
to support DMA 4,5.

Change-Id: I0ce052b6a2f1599a9b6eb82ce8e4f34f4c68333d
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
2021-11-17 17:12:31 -05:00
Abhijit Kulkarni
944a0629f5 disp: msm: sde: fix cont splash pipe identification
This change fixes the continuos splash logic that identifies the
pipes staged by bootloader. The same code flow is used in trusted ui
handover as well. Existing logic was counting the pipes twice if the pipe
is staged on both the layer mixers. This change simplifies the pipes
already staged before handover by using the pipe index to convey if
it is staged or not.

Change-Id: Idb255f2077161dc3553114ac5d04e0ef743bb5ea
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
2021-05-14 12:23:57 -07:00
Anjaneya Prasad Musunuri
163b57e6a8 disp: msm: sde: correct noise and attenuation layers blend stages
Use blend stage to get blend offset instead of z order.

Change-Id: I7924325d19dfbace0fadf4551f696fe222d17115
Signed-off-by: Anjaneya Prasad Musunuri <aprasad@codeaurora.org>
2021-05-04 06:18:38 -07:00
Gopikrishnaiah Anandan
1d39b8a5a9 disp: msm: sde: add checks for hfc feature enablement of demura
HFC feature of demura needs a skip blend plane to be set. If skip blend
plane is not set and HFC feature is requested to be enabled, driver
should skip turning on HFC demura feature. Change adds checks to ensure
that HFC is always enabled with skip blend plane staged.

Change-Id: I923359c7cb143867660b4c1e667f56ed42fa51c9
2021-03-17 11:22:08 -07:00
Gopikrishnaiah Anandan
9161487a45 msm: sde: Add partial update support for demura
Demura HW block needs to be programmed with different sequence for
partial update use-cases. Change adds support for partial update
programming sequence.

Change-Id: I3ea38354b1120d7c545f6680562c47304cd1126b
2021-03-17 11:22:08 -07:00
Christopher Braga
c654f1b014 disp: msm: sde: add management of demura shared memory region
In cont-splash use cases the bootloader's Demura configuration
must stay operational until user space takes over display control.
Introduce Demura shared memory region handling to ensure
Demura configuration data stays consistent and accessible to the
hardware.

Change-Id: I5ef20ad9286574904b3d33a4179629d5a16746cf
Signed-off-by: Christopher Braga <cbraga@codeaurora.org>
2021-03-17 11:22:07 -07:00
Christopher Braga
812782e76b disp: msm: sde: check fetch active registers for active data planes
Continuous splash setup checks the CTL configuration to determine and
log all planes that have been enabled for continuous splash boot.
This logic currently only checks the planes mapped to each LM on
a given control path, resulting in data planes being missed.

Update the boot plane enumeration logic to additionally check the CTL
fetch active registers to detect and log missed planes. This logic
checks against all planes found through the original enumeration path
to avoid logging the same plane twice. Note that planes found via the
fetch registers are assumed to be used across both rectangles due to
hardware logging limitations.

Change-Id: Ic1f4aaba94111fe096ba9764eeaef242beb6adf5
Signed-off-by: Christopher Braga <cbraga@codeaurora.org>
2021-03-17 11:22:07 -07:00
Gopikrishnaiah Anandan
e7c7283510 disp: msm: sde: add support for noise layer
DPU has added support for noise injection into the layer stack. Change
adds support for noise layer programming and exposes the hardware block
to the user space modules.

Change-Id: Id176eea54fcdcd5d399457b14133a1ccde07299f
2021-02-23 15:56:36 -08:00
qctecmdr
1393447cd5 Merge "disp: msm: sde: enable dedicated CWB feature on Waipio" 2021-02-20 13:06:33 -08:00
Chandan Uddaraju
1b7fba16bd disp: msm: sde: update RM to support dedicated CWB
Add dummy layer mixer blocks to be used for dedicated
CWB.

Change-Id: Ie1fe4fa7502cf5cf4dba3f2c129257887a20b7ad
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
2021-02-19 12:53:09 -08:00
Chandan Uddaraju
4fe3d97078 sde: wb: add changes to support Dedicated-CWB
Add new capture/tap point as CRTC property for
D-CWB feature. Update the hardware blocks and
corresponding APIs to configure D-CWB data path.
Add new hardware pingpong blocks that
are dedicated for CWB.

Change-Id: I22576df1768b50f9f47d8527f62913b01ff4d9a7
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
2021-02-19 12:52:59 -08:00
qctecmdr
a49d0d9ce1 Merge "disp: msm: sde: update regdma offsets through target dtsi property" 2021-02-16 23:35:31 -08:00
Samantha Tran
e778d2688e disp: msm: sde: add support for WD timer on INTF
Watchdog timer is moving from TOP to INTF. This change adds
support for movement and ensures backwards compatibility.

Vsync select only needs to specify whether or not to use
Timer 0 associated with the interface. It does not need to
select between Timer 0-4.

Signed-off-by: Samantha Tran <samtran@codeaurora.org>
Change-Id: I9d89a8cb1ea607e9fc0bdbffa0a6a9acceff7f13
2021-02-12 13:49:31 -08:00
Christopher Braga
9a5a42c453 msm: drm: sde: Add support for FP16 via AHB programming
Introduce support for the FP16 format and FP16 color processing
blocks. This includes support for FP16, FP16 UBWC, and inline
rotation on tiled FP16 pixel data.

Change-Id: I06a70cab5447140598682f687129d4f8662524b2
Signed-off-by: Christopher Braga <cbraga@codeaurora.org>
2021-02-11 12:31:22 -08:00
Veera Sundaram Sankaran
88acaa31b8 disp: msm: sde: reuse cont-splash path for LE VM resource allocation
Add necessary checks during the splash init to check
& execute the splash/ramdump buffer mapping/unmapping
only for the cont-splash use-case. This would help in
reusing the same path for LE VM setup during device assign,
which does not have any splash buffer.

Change-Id: I3ce168c530c7db4b14465efa3fd87889b5f99f5b
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2020-05-11 12:11:48 -07:00
Amine Najahi
4fef803aff disp: msm: sde: increase max number of mixers to 4
Increase the maximum number of mixers per crtc to 4 to
support 4LM use case. This change also increases the number
of data path to 4 to support 4LM in continuous splash handoff.

Change-Id: I4655017dcb405fad69513bebb8fd7f848fc5873d
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
2020-05-06 14:16:31 -04:00
Amine Najahi
af07b8a5d4 disp: msm: sde: add support for hardware based rounded corner
Add support for hardware based rounded corner part of
color processing framework.

Change-Id: I3e5f4dac6ffc759bb940215b7621ac716f255169
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-02-16 01:03:58 -08:00
Abhinav Kumar
d88b5b5c67 disp: msm: add hardware register ops for VDC-m block
Add hardware register set and programming for VDC-m block.

Change-Id: I60ef27b507284521abdd10bb679a85303475ddc3
Signed-off-by: Abhinav Kumar <abhinavk@codeaurora.org>
2020-01-29 13:45:05 -08:00
Abhinav Kumar
88a43f2441 disp: msm: sde: add hardware catalog support for VDC-m block
Add hardware catalog support for VDC-m block to parse
the register offsets and feature capabilities.

Change-Id: I1bfbc4b6e7e9f34738d49fecdef4b427a0ccded7
Signed-off-by: Abhinav Kumar <abhinavk@codeaurora.org>
2020-01-29 13:44:48 -08:00
Nilaan Gunabalachandran
c6092f3e66 disp: msm: sde: log intf framecount in event logs
Log hardware interface framecount during te and vblank irqs for
command and video mode panels, respectively. This will help in
debugging any missed frames.

Change-Id: Ie86f686c4cc12de6a1f31aa47d4c7a5b8a68ea55
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
2019-06-26 11:54:51 -04:00
Veera Sundaram Sankaran
8b8fbfbeef disp: msm: sde: fix rm/kms for handling all cont-splash cases
Fix resource and splash buffer handling in resource manager
and sde_kms to support continuous splash to be enabled/disabled
independently in multiple built-in display usecase.

Change-Id: I446ea9b08a794e2b053c37f55b31e51404bbcf71
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2019-05-31 15:58:40 -07:00
Veera Sundaram Sankaran
6daf1c58e7 disp: msm: sde: use wr_ptr interrupt instead of ctl_start
SDE driver triggers the frame and waits for the
ctl_start interrupt for command mode display. This interrupt
provides confirmation that hardware has picked up the
frame. Retire fence signaling is associated with
this interrupt and it is sent at the rd_ptr interrupt
after ctl_start. Due to lut dma delay, ctl_start interrupt
may be trigger before rd_ptr or after rd_ptr. SW manages
this complexity and handle retire fence for different cases
with 500us threshold logic.

This change replaces the ctl_start interrupt with wr_ptr
interrupt by programming it to trigger at 1st write line
count. This is guaranteed to come every time and it is close
to rd_ptr interrupt. That allows retire fence trigger at
wr_ptr interrupt and simplifies the SW logic. CRTC commit
thread would be held slightly longer with this change
as the wr_ptr is always close to rd_ptr and after
ctl_start.

Change-Id: Ic47a8f82c854b4aded0d70c95af853b28a68ffd6
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2019-05-23 10:29:30 -07:00
Samantha Tran
3be27eafcc disp: msm: snapshot of msm and sde driver
This snapshot ports changes from 4.14 to 4.19 into
the msm and sde layer. Snapshot was taken as of
commit 0f8fb25421ff ("cnss2: Add device version to
SOC info structure").

Change-Id: I59b799a78319c2db6930a2a10bc38976f8c09898
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2019-05-22 13:08:31 -07:00
Veera Sundaram Sankaran
1e3d105dc0 disp: msm: sde: log pp-line count in event logs
Log ping-pong current line count during ctl-start
and rd-ptr interrupt. This will help in debugging
ping-pong timeout issues.

Change-Id: I58185330fe9e8a64f48d6da60c974b23a9e68b44
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2019-05-15 15:36:06 -07:00
Narendra Muppalla
3709853456 Display drivers kernel project initial snapshot
This change brings msm display driver including sde,
dp, dsi, rotator, dsi pll and dp pll from base 4.19 kernel
project. It is first source code snapshot from base kernel project.

Change-Id: Iec864c064ce5ea04e170f24414c728684002f284
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
2019-04-14 22:20:59 -07:00