Currently, only rc ram is programmed through lut dma and
rc config is programmed through ahb.
This change programs both rc config and rc ram through lut dma.
Change-Id: I50a6e87dfbadb9c4a93cebdaa1e813f5be9ba5f5
Signed-off-by: Saurabh Yadav <quic_sauyad@quicinc.com>
Some of the demura config parameters are single buffered. When demura
config is reprogrammed by user-space clients, single buffered updates
can cause artifacts on screen. Change splits the double buffered and
single buffered configs into different payloads to allow user-space
to update double buffered config.
Change-Id: I493b86944f7c2d630dcc1b863174e816cf8c82ed
Signed-off-by: Gopikrishnaiah Anand <quic_agopik@quicinc.com>
Add support for demura v2 by adding demura blocks
2 and 3 for pineapple target.
Change-Id: I9e6107480ab44853ca49e6396787378c5c70557a
Signed-off-by: Mitika Dodiya <quic_mdodiya@quicinc.com>
Introduce support for SPR V2 features. Full validation
has been performed.
Change-Id: Ia83c06b30729fef12cae014ee5ce4792236a0a8a
Signed-off-by: Christopher Braga <quic_cbraga@quicinc.com>
This change collects the OPR, MISR values. If the values are
different than the previous then notify to client with custom event.
Change-Id: I2546439be1f665d90e6505d65283d28096bf7cdd
Signed-off-by: Akshay Ashtunkar <quic_akshayaa@quicinc.com>
Ensure SDE_ERROR error log print function name and line number.
Add a macro DISP_DEV_ERR as a wrapper of dev_err to ensure origin dev_err
will print function name and line number.
This would help with analysis of errors reported with automated testing.
Expected display error log format:
[FUNCTION_NAME:line] ERROR_MESSAGE
Change-Id: I354f45b492059d5ba2bb110d56443fd338add7ad
Signed-off-by: GG Hou <quic_renjhou@quicinc.com>
Add a new function in Kalama to support implementation of sixzone
using single buffer LUTDMA. Since there is a hw delta from previous
target, we are updating the major version.
Change-Id: I1078e4e6f351c6894367c5457f3415a7432f55b5
Signed-off-by: Alisha Thapaliya <quic_athapali@quicinc.com>
Update LTM merge mode setting for kailua since
merge control has its own register.
Change-Id: Ieaacd1e12f410def18a0fce11a77c94832c416f5
Signed-off-by: Renchao Liu <quic_rencliu@quicinc.com>
The sde_hw_blk was meant to be a generic base object for all
SDE HW blocks, however, it enforces using a common set of ops
which is not practical when blocks have different capabilities.
Since this object was never used as intended and is not doing
anything functional today, remove the dead weight.
Change-Id: If76006c1ae5c62e8d7d77b100837dbaf6c661bd3
Signed-off-by: Steve Cohen <quic_cohens@quicinc.com>
Align the HW catalog to use common naming amongst the "revision"
and "version" structure members.
Change-Id: Ib6c81aee6cb49208b0699db4a75b4eb9dc79e800
Signed-off-by: Steve Cohen <quic_cohens@quicinc.com>
When LTM is switching on/off, merge_mode bit value gets toggled between
0x1 (dual pipe merge configuration) and 0x0 (single pipe configuration).
It is illegal to reconfigure LTM to/from dual-pipe merge mode before
both LTM instances have completed their current workloads. This change
adds support to disable merge_mode one frame after histogram is disabled
to make sure both hardware instances are completely idle and avoid
corrupted histogram data collection.
Change-Id: I9a6b5cbfb69e8af7936749e57fe7c8f7c2703b95
Signed-off-by: Ping Li <pingli@codeaurora.org>
This change adds DGM, CSC, and VIG gamut to sde debug dump range. It
also removes unused DSPP registers from debug register dump range.
Change-Id: I5a7adfeb4d93429cf84e7396338f2c025d15e800
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
Demura HW block needs to be programmed with different sequence for
partial update use-cases. Change adds support for partial update
programming sequence.
Change-Id: I3ea38354b1120d7c545f6680562c47304cd1126b
Extrapolate the Demura plane configuration from the Demura DSPP block
on cont-splash boot, and pass this information to DRM clients via a
CRTC property. This will allow user-space to be aware of all plane
reservations, and avoid plane mangling in multi display use-cases.
Change-Id: I6d216f555fcddbd19c18b6209dc830c21f6be5a4
Signed-off-by: Christopher Braga <cbraga@codeaurora.org>
This change replaces kzfree with kfree as kzfree has been
renamed.
While moving to the latest 5.10 tip, additional small changes
were required to resolve compilation issues:
set_dma_ops has moved from dma-mapping to dma-map-ops header.
This change includes the new header file required.
drm_panel_add returns void, this change removes the expected
return value check.
drm_prime_pages_to_sg takes an additional parameter. This change
passes in the drm_device pointer the function is looking for.
Remove an unused variable in sde_crtc vblank function.
Change-Id: I47c085c0cb64432873c2e750ae64cbdc2b5340da
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
This change adds the support for checksum collection and notifies
to user space as part of drm event.
Change-Id: Ib2a6c38c74d1fb60d274cdb685b74979202604eb
Signed-off-by: Lakshmi Narayana Kalavala <lkalaval@codeaurora.org>
Change IGC version to 4.0 to clearly indicate that support
for LUT 257 in DSPP is now supported and expected.
Change-Id: Ie3bb5b0150bdf6c332f86d0ae416b4f6fc42e70f
Signed-off-by: Christopher Braga <cbraga@codeaurora.org>
A new position control register field has been added to the
DSPP PCC on Lahaina. This field controls whether PCC is invoked
before or after GAMUT mapping.
Introduce new PCC control logic to set the PCC position based on
the new PCC_BEFORE flag. Older versions of the PCC control function
now clear all flags to ensure backwards compatibility.
Change-Id: I0a33604111b755e0a0ccf1864a57b17cc9071e3f
Signed-off-by: Christopher Braga <cbraga@codeaurora.org>
This change adds support for regdma accelerated programming of
partial update offsets for SPR hw block and validation of ROI
during atomic check based on SPR hw block limitations.
Change-Id: I9e20af4ba7752e8a4af5e9738612c57603163744
Signed-off-by: Prabhanjan Kandula <pkandula@codeaurora.org>
Demura block of dpu will use the register dma path for programming.
Change updates the register dma frame-work to allow programming of the
demura block.
Change-Id: Ie5a64df1b2fffcb84d9554e5211249892ed2d96d
Signed-off-by: Gopikrishnaiah Anandan <agopik@codeaurora.org>
Based on the hardware catalog if dpu supports demura, driver will
install the drm properties specific to the feature. Change added support
for creating demura properties and exposing via drm frame-work.
Change-Id: I58f5b12ca660d826e6e0b7e1f212bdf3c5e41905
Signed-off-by: Gopikrishnaiah Anandan <agopik@codeaurora.org>
This change adds support for programming SPR hw block as per the
client configuration from the respective color property blob.
Currently only reg dma accelerated path is provided.
Change-Id: Ib8559ec2c392be7b69ca43c6364e701fab877a28
Signed-off-by: Prabhanjan Kandula <pkandula@codeaurora.org>
This change parses SPR hw block entries from device tree and populate
SPR block as sub block of DSPP block. Change also enables register dump
by registering sub blocks with sde driver register dump routine.
Change-Id: Ic603cd3cc001dddce5dfea61341c166a5fec1682
Signed-off-by: Prabhanjan Kandula <pkandula@codeaurora.org>
Add support for hardware based rounded corner part of
color processing framework.
Change-Id: I3e5f4dac6ffc759bb940215b7621ac716f255169
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
Add new implementation for DSPP GAMUT and IGC features using
newly added SB LUTDMA.
Change-Id: Iebc099351fde058d7f0e20a9e256bcd71c557506
Signed-off-by: Ping Li <pingli@codeaurora.org>
Signed-off-by: Christopher Braga <cbraga@codeaurora.org>
New version of the gamut block has been introduced with changes to
the scale/offset programming. Change updates the minor version for
the feature.
Change-Id: I62597a9d229e13e10e0ac0f1183b2db2b0b2a575
This change brings msm display driver including sde,
dp, dsi, rotator, dsi pll and dp pll from base 4.19 kernel
project. It is first source code snapshot from base kernel project.
Change-Id: Iec864c064ce5ea04e170f24414c728684002f284
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
