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65 Commit

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qctecmdr
dfc3e3ddc8 Merge "disp: msm: sde: add sys cache usage for static image" 2020-05-01 17:58:07 -07:00
Shashank Babu Chinta Venkata
8b8bfe0165 disp: msm: make msm_drm into single module
Make msm_drm into single module and all child driver
registers and unregisters are handled from parent's
register and unregister respectively.

Change-Id: I017513d1de3b6b25dd5543d7fa7741c0bac1740d
Signed-off-by: Shashank Babu Chinta Venkata <sbchin@codeaurora.org>
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
2020-04-28 15:52:39 -07:00
Chandan Uddaraju
eaa458b165 disp: msm: move MDSS resource voting to probe
sync_state driver disables any resources that
don't have any votes after driver probe is completed.
Move MDSS resource votes to probe so that any resources
that are needed for continuous splash are intact until
the bind of all the components is complete.

Change-Id: I0056bf1ec56bcd6a1b620a81143d4b49d7ea2921
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
2020-04-28 12:09:13 -07:00
Nilaan Gunabalachandran
83ee51cb5a disp: msm: sde: add sys cache usage for static image
Store full or partial static image in system cache (L3 cache)
for video mode primary display. Added additional commit to
crtc commit thread to transition to read cache state.
The change also updates llcc APIs to support generic functionality.

Change-Id: I6b2a45da946d7e0e0b326da9d214be3f01a9420e
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
2020-04-27 15:12:17 -04:00
qctecmdr
da0b8d3812 Merge "disp: msm: sde: skip power events when cont-splash is enabled" 2020-04-16 14:02:26 -07:00
qctecmdr
d94c7aef02 Merge "disp: msm: sde: add pm QoS vote on CPU receiving display IRQ" 2020-04-12 23:31:30 -07:00
Samantha Tran
e85a88ea01 disp: msm: sde: add pm QoS vote on CPU receiving display IRQ
Add a QoS vote on CPU receiving display interrupt. QoS vote
will prevent that CPU from going into low power mode avoiding
possible interrupt latency. Using irq notifier, display will
receive notification when display IRQ has switched CPUs and
will adjust the vote accordingly. The vote is also removed and
requested whenever display IRQ is enabled or disabled.

Change-Id: I94b4501896b4b20b37deaca90d6b5ff883d56621
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
Signed-off-by: Lei Chen <chenlei@codeaurora.org>
2020-04-09 22:56:18 +08:00
Dhaval Patel
f97e75d7ab disp: msm: sde: flush crtc event thread before idle notification
Flush sde crtc event thread before idle notification
to make sure that pending frame count is zero. This
allows sde encoder module to trigger power collapse
during pm_suspend scenario.

Bug: 146848315
Change-Id: Ic65a76273417c567c330e970c97183e5c0f4ad17
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
2020-03-29 19:25:20 -07:00
Samantha Tran
0064a0227b drm/msm/sde: fix race condition in vblank control interrupts
In Dual display concurrencies there are certain cases where
irq_idx and vblank_refcount state mismatch can occur.
To avoid it, during setup of irq_hw_idx, reset the vblank_refcount
and unregister read ptr irq if not yet done by then along with
maintaining global mutex lock for vblank_refcount.
Also, if register IRQ fails, correct vblank_refcount so
that IRQ registration can be tried again.

Change-Id: I06bcbf71c6a43bd161ff61093d9f6063a292d6bc
Signed-off-by: Raviteja Tamatam <travitej@codeaurora.org>
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2020-03-29 16:54:43 -07:00
Samantha Tran
793d2a33d7 disp: msm: sde: destroy framebuffers after plane cleanup
Add framebuffer destroy immediately following plane cleanup
during secure display transition. Set state's fb to NULL
after destroying to avoid attempting to destroy fb again
during plane state destroy. Previously, framebuffer destroy
is happening after the context is detached while plane states
are being destroyed.

Change-Id: I273ce5b85c30962ea7e0a738a366487c9c85d4df
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2020-03-29 16:51:39 -07:00
Krishna Manikandan
ec6688849b disp: msm: sde: avoid CWB connector in determining active crtc
CWB connector is tied to primary crtc along with primary connector.
Avoid using CWB connector power state in determining active crtc,
as it is already done via primary connector.

Change-Id: I35ec95349790990c49b9a63afd6e0f55d23b4887
Signed-off-by: Kalyan Thota <kalyant@codeaurora.org>
Signed-off-by: Krishna Manikandan <mkrishn@codeaurora.org>
2020-03-29 16:49:40 -07:00
Veera Sundaram Sankaran
bceea4e1fe disp: msm: sde: reset ctl on autorefresh disable failure
Reset MDP ctl path and DSI ctl on autorefresh
disable failure. This will enable the hardware
to recover from the hang.

Change-Id: Ia9acc8573c22e0713179ef4f6ef604caacabfadb
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2020-03-28 23:07:32 -07:00
qctecmdr
52d46ebea5 Merge "disp: msm: sde: rename the cont splash region" 2020-03-26 06:42:21 -07:00
Abhijit Kulkarni
4051341617 disp: msm: sde: rename the cont splash region
This change renames the splash region memory node name
to align the node with the advanced bootloader naming
convention.

Change-Id: Idfd666b5e32e5f22ccb677f68155621adfe87a14
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
2020-03-24 13:11:59 -07:00
qctecmdr
c412266ad7 Merge "disp: msm: sde: re-factor probe time initialization" 2020-03-23 15:58:19 -07:00
Abhijit Kulkarni
a752925112 disp: msm: sde: re-factor probe time initialization
This change moves the msm_driver power resource initialization from
bind time to probe time. This keeps the resource vote on until all the
devices are bound. This is required since the regulator and clock
sync_state driver will remove the proxy votes as soon as msm_driver
has probed.

Change-Id: Icb0e59e4ff0290ef0c1bd3914d6fdbf99bf5d9fa
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
2020-03-23 12:07:40 -07:00
Steve Cohen
7fe6802548 disp: msm: sde: skip power events when cont-splash is enabled
Skip reprogramming some HW blocks during power events to avoid
overwriting settings done by bootloader until we have completely
transitioned out from continuous splash.

Change-Id: I49a4834e22080dffc85f55bca9436bc894353335
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-03-20 22:11:01 -04:00
Tatenda Chipeperekwa
51805afe28 disp: msm: dp: compile MST feature based on display config
Add a compile time flag for the MST feature that will allow
selectively enabling the feature.

Change-Id: I8bf288277c7af00c3cf254a8c757151559e0a010
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
2020-03-12 18:07:11 -07:00
Dhaval Patel
876ea7de77 disp: msm: sde: move ramdump node from reserve area
Ramdump node only allocates portion of splash
buffer memory. It should not be within reserve
memory area because splash buffer is already reserving
these pages.

Change-Id: I7caa818b19cb993571e6bf0648a4dfbbc2ad9d71
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
2020-02-28 11:58:05 -08:00
qctecmdr
9d96e47c53 Merge "disp: msm: sde: add vbif axi port halt request support" 2020-02-27 14:37:43 -08:00
Abhijit Kulkarni
9502638682 disp: msm: sde: make sid programming optional
This change makes the access to sid registers space optional
as for lahaina target hlos is not supposed to access these
registers. Mapping this register space will be done only if
the device tree entry indicates this support.

Change-Id: I4ecefec0fe02c993ca34b55da432612e25eb6783
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
2020-02-18 20:36:33 -08:00
Dhaval Patel
ac8fbffff5 disp: msm: sde: add vbif axi port halt request support
Add vbif axi port halt request support before
MDSS core GDSC power collapse state. It is needed
for targets without MDSS RSC support.

Change-Id: I1fbf281c4206ecd4ad1c2d1348a95e002740e2f1
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
2020-02-13 13:27:26 -08:00
Narendra Muppalla
d28ebf05f4 disp: msm: sde: populate WB display encoder list before dsi
This changes swaps the order of encode initialization between
wb and dsi displays. This ensures that wb encoder is registered
before DSI/DP encoder in mode_list and it allows single CRTC
to loop through WB encoder before other encoder during mirror mode
topology like CWB use case. With existing order of encoder list, CWB
flush is happening after primary commit flush which is causing cwb
failures when there is a cpu latency.

Change-Id: I24d6b4f27271d46e9743d17a624ac7e0930f7474
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
2020-02-13 13:12:37 -08:00
Tatenda Chipeperekwa
56d9849705 disp: msm: dp: add mixer count check in dp mode validation
Add mixer count check in dp mode validation for mdp clock.

Change-Id: I37fe3037d7f7efc7bdc2a7446457af8a8e34684c
Signed-off-by: Xiaowen Wu <wxiaowen@codeaurora.org>
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
2020-02-10 11:34:06 -08:00
Abhijit Kulkarni
748372a24c disp: msm: sde: add qactive override
This change adds the hooks to enable the active signal override
in power collapse sequence. Active signal override is needed to
disable the clock gating when the power collapse sequence
is running.

Change-Id: I9edaed7960b236b3d0179cb67f9cc2c9b3546c9d
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
2020-01-23 14:38:26 -08:00
Prasad Sodagudi
91721d8d2f disp: Update secure world communication from display
As scm_call2 is deprecated, update the secure world
communication.

Change-Id: Id971b2b71af9203340eab892d6a3398dbb943370
Signed-off-by: Prasad Sodagudi <psodagud@codeaurora.org>
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
2019-12-16 22:13:00 -08:00
Linux Build Service Account
6ad6641d3a Merge changes I36a55b91,Icc225bd1 into display-kernel.lnx.1.0
* changes:
  disp: msm: sde: update shmbridge header file path
  disp: msm: delay msm_drv probe
2019-12-09 12:26:54 -08:00
Linux Build Service Account
afc6d5a444 Merge changes I95474cd5,I543392fe into display-kernel.lnx.1.0
* changes:
  disp: msm: sde: remove all preclose logic
  disp: msm: make kms a DRM client for lastclose logic
2019-12-09 12:26:54 -08:00
Abhijit Kulkarni
a92ea43b94 disp: msm: sde: update shmbridge header file path
Update the header file path in the code as it has moved to a
new location.

Change-Id: I36a55b91a121b9bb3d89641da1e4e22407f55b68
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
2019-12-09 11:55:20 -08:00
Steve Cohen
ae2dceb0b6 disp: msm: sde: remove all preclose logic
The DRM framework only calls the driver's preclose callback
function if the LEGACY driver feature is enabled. Therefore
strip out this logic as it never gets executed since LEGACY
is not supported for msm_drm driver.

Change-Id: I95474cd5424423ef194faae12f1241698f3e467e
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2019-12-09 08:36:00 -08:00
Steve Cohen
ff5365a1e0 disp: msm: make kms a DRM client for lastclose logic
Since some APIs previously used during lastclose are no longer
exposed to drivers (__drm_atomic_helper_disable_plane, and
__drm_atomic_helper_set_config), make kms a DRM client and use
the drm_client_modeset_commit_force API to do lastclose cleanup.

Change-Id: I543392fe79558a3996e326a0f222793c56d71e4f
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2019-12-09 10:57:54 -05:00
Abhijit Kulkarni
1fb09ffb74 disp: msm: sde: use dma_map_single to flush the buffer
dmac_flush_range api is no longer avaialable on latest kernel.
Use dma_map_single to flush the scm buffer before switching to
higher execution previlege.

Change-Id: Ia1c18a6ab9a9c80f5f9ce79816d9dbd3777474b0
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
2019-12-04 16:05:09 -08:00
Narendra Muppalla
d1d9ae8b19 Disp: Snapshot change for lahaina display driver
This snapshot change adds downstream support
for drm 5.x+(msm_lahaina branch) linux kernel.

Change-Id: Ia691c95da155a00e449c91a2f1a5b20a8e71aed4
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
2019-11-24 12:30:51 -08:00
Nilaan Gunabalachandran
810738f232 disp: msm: sde: null check for kms device
Check if kms device objects exist before attempting to
create memory space.

Change-Id: Idc0cbfd0ce116dab8005f72ba231dcb8c82254ca
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
2019-11-04 13:21:41 -05:00
qctecmdr
ee16fbb03f Merge "disp: msm: sde: update avr mode config during commit prepare" 2019-10-24 21:31:57 -07:00
qctecmdr
fba0fc0b11 Merge "disp: msm: sde: handle all error cases during sui transitions" 2019-10-23 18:07:32 -07:00
Dhaval Patel
c1cef9cfaf disp: msm: remove runtime_pm support from rsc driver
Remove runtime_pm support from rsc driver. RSC driver
does not vote for MMCX. It relies on sde core driver
to keep vote and trigger call. That brings additional
dependency to manage runtime_pm references during
pm_suspend/pm_resume call. This change also updates
the runtime_pm call to manage the pm_suspend in
msm drm driver.

Change-Id: I111771994822c82db53fb6c23e5d942f90fd1af2
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
2019-10-22 11:01:31 -07:00
Veera Sundaram Sankaran
e4a7d473f9 disp: msm: sde: handle all error cases during sui transitions
During secure-ui, the SMMU, MISR and VBIF states
are altered based on the enable/disable of secure-ui
which is followed by the scm_call. Failure in any of
the steps would lead the system to an unstable state.
Address all the failures and revert back all steps
to get the system back in original state to avoid
any issues.

Change-Id: I736c6cf018c5992ec33806c00e58bf56b818b8a7
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2019-10-21 11:41:14 -07:00
Jayaprakash
aad3dd4525 disp: msm: sde: update avr mode config during commit prepare
Add changes to support avr mode config update during
prepare commit which happens before gpu fence wait
for the input buffers.

Change-Id: Ib2cb5b7e1f10501914c003f6cf066b85048f79d4
Signed-off-by: Kalyan Thota <kalyant@codeaurora.org>
Signed-off-by: Jayaprakash <jmadiset@codeaurora.org>
2019-10-18 12:53:56 +05:30
Jayaprakash
985ffddc71 disp: msm: sde: add one-shot qsync mode support
Add support to enable one-shot mode during qsync
update. This feature ensures the frame drops can be
reduced due to delayed software flush for the
current commit. Also, add changes to disable the qsync
feature post commit.

Change-Id: Icb158853f52284bcf8fa641e5f62200c5460b660
Signed-off-by: Kalyan Thota <kalyant@codeaurora.org>
Signed-off-by: Jayaprakash <jmadiset@codeaurora.org>
2019-10-18 12:53:17 +05:30
Ramkumar Radhakrishnan
664d297f98 Revert "disp: msm: sde: Add LTM sw fuse check support"
Reverting the change to check for LTM SW fuse to install LTM properties
during probe since LTM SW fuse is enabled later.

This reverts commit 652b195ba4.

Change-Id: I19b3e04ff7caaad5de896fbcf433c3b1863ac4f9
Signed-off-by: Ramkumar Radhakrishnan <ramkumar@codeaurora.org>
2019-10-10 14:14:43 -07:00
Dhaval Patel
96d5b9646d disp: msm: sde: wait for lp2 and pm_suspend frame trigger
PM_SUSPEND API adds extra pm_runtime refcount and calls
the device driver for pm_suspend. At this point display
device may not be in power collapse state. This patch
makes sure that crtc_commit thread is idle and triggers
power collapse also.

Change-Id: Ia21d6a6b6fd32caeb9d16fa5cf998b91ef990e01
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
2019-10-04 09:31:09 -07:00
Tatenda Chipeperekwa
da892c0b91 disp: msm: update topology based on clock requirement
Update the topology allocation by considering the required
mode clock (vtotal x htotal x fps * fudge factor). Modes with
a clock that exceeds the maximum SDE clock will be denoted as
requiring a topology that uses two layer mixers.

Change-Id: I3c773598b0d79cb6fea9d3a0e04d89ff84d67e13
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
2019-09-20 14:39:54 -07:00
Samantha Tran
ad97f0cf4d disp: msm: sde: revert to previous smmu state upon failure to switch
This change saves the previous state before moving into the transitional
smmu state, during secure-display/secure-camera usecases. Upon failure
to complete the transition, set smmu state to the previous state.
Previously, smmu state was staying in transitional state.

Change-Id: I1a78ddcf6ac1c7ea66c8c2095cd1a6d6160647a1
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2019-09-04 15:16:27 -07:00
Satya Rama Aditya Pinapala
7e77b664bb disp: msm: sde: fix dsi bridge init
Initialization of DSI external bridge must be done within
the initialization of DSI displays. The current method
has the drm_ext_bridge_init being called outside the
loop of DSI displays, and it will fail as the display,
encoder and connector handle are not present.
This fixes the regresion caused by
commit edef6ae040 ("disp: msm: dsi: snapshot of dsi from
4.14 to 4.19").

Change-Id: I50d0a303c2c8f4323e46cf14df1b071ebae80ceb
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2019-08-06 19:32:22 -07:00
qctecmdr
3f9677f2a5 Merge "disp: msm: sde: allow fence signalling during crtc disable" 2019-07-29 12:44:22 -07:00
qctecmdr
60d59191c8 Merge "disp: msm: dp: add colorspace property for MSM DP" 2019-07-28 01:12:00 -07:00
qctecmdr
bb300b0511 Merge "disp: msm: sde: Add LTM sw fuse check support" 2019-07-27 04:36:40 -07:00
Veera Sundaram Sankaran
76262482ed disp: msm: sde: allow fence signalling during crtc disable
With the new ASYNC power-mode changes, user-mode can
request for retire/release fences during power-mode
changes. This is used as a signal for power-mode
completion by user-mode. Allow preparing/signalling
these fences during crtc enable/disable to support it.

Change-Id: I7709cd4762c8d77776ba6ba2d07aa6b76b5262d0
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2019-07-26 14:54:34 -07:00
Abhinav Kumar
14e02e4b02 disp: msm: dp: add colorspace property for MSM DP
Add the colorspace property for DP controller for MSM. Also, change
the default method to send the colorimetry information to the sink
from MISC bits of MSA to VSC SDP packets if the sink supports it. This
helps to avoid dynamic switches between the packet types for sending
the colorimetry information during BT2020 and DCI-P3 use-cases.

Change-Id: I7ddf879a187b023fcf7404d64028e4d19b031119
Signed-off-by: Abhinav Kumar <abhinavk@codeaurora.org>
2019-07-24 17:24:27 -07:00