Commit Graph

67 次程式碼提交

作者 SHA1 備註 提交日期
Rob Clark
245ac819b6 drm/msm: remove msm_gem_free_work
Now that we don't need struct_mutex in the free path, we can get rid of
the asynchronous free all together.

Change-Id: I82406450e3a5d0d49d3fb753c621f55e8f4af088
Signed-off-by: Rob Clark <robdclark@chromium.org>
Git-commit: c951a9b284b907604759628d273901064c60d09f
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2021-03-29 13:17:21 -07:00
Rob Clark
fd50a1ec69 drm/msm: Add priv->mm_lock to protect active/inactive lists
Rather than relying on the big dev->struct_mutex hammer, introduce a
more specific lock for protecting the bo lists.

Change-Id: I4c876a1c3ae51ff62372703a99a8daff0c4a7950
Signed-off-by: Rob Clark <robdclark@chromium.org>
Git-commit: d984457b31c4c53d2af374d5e78b3eb64debd483
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
[samtran@codeaurora.org: avoid changes related to debugfs and shrinker]
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2021-03-29 13:16:53 -07:00
Kristian H. Kristensen
a145e793b2 drm/msm: Implement .gem_free_object_unlocked
We use a llist and a worker to delay the object cleanup. This avoids
taking mmap_sem and struct mutex in the wrong order when calling
drm_gem_object_put-unlocked() from drm_gem_mmap().

Fixes lockdep problem with copy_from_user() in msm_ioctl_gem_submit().

Change-Id: Idfe54ae8108158b69f3835f26991642d1e21f8ee
Signed-off-by: Kristian H. Kristensen <hoegsberg@chromium.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>
Git-commit: 48e7f18392c66f9b69ebac11c54f1a2e033ced54
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
[samtran@codeaurora.org: resolve trivial merge conflict]
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2021-03-29 10:47:03 -07:00
Amine Najahi
c5f2bd7401 disp: msm: sde: add multi-mode RFI support
Currently, RFI feature only supports panel that contains
a single timing node. This limits the feature availability
for panel with multiple modes or with DFPS support.

This change adds support for RFI on panels that contains
multiple timing nodes.

Change-Id: I3a7aadf7b6da3518350b2eb815602b13b5c259f5
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
2021-03-24 06:32:45 -07:00
Amine Najahi
d4def5bd8c disp: msm: sde: add new interface for RFI feature
Add a new connector range property and a new entry to the panel
capability blob to publish the list of supported RFI frequencies.
In addition, add the required functions to set, validate and update
DSI bit clock rate value to trigger an internal seamless mode switch
and reconfigure DSI clock and PLL.

Change-Id: I7d19cc369f8c5528709f2f20a51ef02180ebdea4
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
2021-03-24 06:32:17 -07:00
Tatenda Chipeperekwa
c6257272d4 disp: msm: fix compilation errors for dlkm compilation
Fix dlkm compilation errors that are due to the use of -Werror
flags used by the build system.

Change-Id: I5e1e9bc63c1361d73e4930aab123212717872ecb
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
2021-03-22 15:25:36 -07:00
Jayaprakash Madisetty
1b460b9200 disp: msm: sde: install retire fence offset property
Add changes to install retire fence offset property
and this configurable offset property can be used
to create speculative retire fences.

Change-Id: I0b5bf9bab5bfb811ddbc7a3e8813a3e801272d41
Signed-off-by: Jayaprakash Madisetty <jmadiset@codeaurora.org>
2021-03-02 12:54:39 +05:30
Gopikrishnaiah Anandan
e7c7283510 disp: msm: sde: add support for noise layer
DPU has added support for noise injection into the layer stack. Change
adds support for noise layer programming and exposes the hardware block
to the user space modules.

Change-Id: Id176eea54fcdcd5d399457b14133a1ccde07299f
2021-02-23 15:56:36 -08:00
Christopher Braga
9a5a42c453 msm: drm: sde: Add support for FP16 via AHB programming
Introduce support for the FP16 format and FP16 color processing
blocks. This includes support for FP16, FP16 UBWC, and inline
rotation on tiled FP16 pixel data.

Change-Id: I06a70cab5447140598682f687129d4f8662524b2
Signed-off-by: Christopher Braga <cbraga@codeaurora.org>
2021-02-11 12:31:22 -08:00
Lei Chen
ab3f86f918 disp: msm: use connector properties to expose and set panel mode
Expose panel mode from kernel to SDM with SDE connector property
CONNECTOR_PROP_MODE_INFO and set panel mode from SDM to kernel
with SDE connector property CONNECTOR_PROP_SET_PANEL_MODE for
avoiding private change in upstream code in QGKI kernel.

Change-Id: I0629dad9399967cc1118ac02ce30597076ca367d
Signed-off-by: Lei Chen <chenlei@codeaurora.org>
2021-01-13 23:40:22 +08:00
orion brody
d00d481360 disp: msm: move from drm_mode to msm_mode
Move away from the private and private_flags fields from drm_mode,
as it is being deprecated in latest kernel version. Instead, Add
msm_display_mode as a wrapper to be used in downstream to store these
parameters. Also, store msm_mode in connector_state to be accessed
in commit path.

Change-Id: Ia5bdebe75f00aa15fb7db4dc3a0d50c30894a95c
Signed-off-by: Orion Brody <obrody@codeaurora.org>
2021-01-04 13:18:36 -08:00
Samantha Tran
790eda032e disp: msm: drmP.h removed, add new headers
Commit ("drm: delete drmP.h + drm_os_linux.h") removes the
drmP header file. This changes updates the msm driver
by adding the individually required header files.

Change-Id: I360aa028c2ce75317d33da988b36164041177014
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
2020-12-17 09:50:47 -05:00
Samantha Tran
640ada10b5 disp: msm: updates to msm_drv
Commit c368ec194dd0 ("drm/client: Rename _force to _locked"),
commit 4bdc0d676a64 ("remove ioremap_nocache and devm_ioremap_nocache") and
commit 595abbaff5db ("y2038: remove ktime to/from timespec/timeval
conversion") renames modeset_commit_force, renames devm_ioremap_nocache and
removes the usage of timespec. This changes updates the msm driver with
the relevant changes.

Change-Id: Ib7372b8b4e51cdf75771e5069be189be76c32ed4
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
2020-12-16 17:28:03 -08:00
Samantha Tran
0c08cb1fb5 disp: msm: update parameters for drm_bridge_attach
Commit a25b988ff83f ("drm/bridge: Extend bridge API to
disable connector creation") and commit ee68c743f8d0 ("drm: Stop
including drm_bridge.h from drm_crtc.h) add additional input flags.
This change adds fixes to the drm bridge attach API and includes
relevant drm_bridge header files.

Change-Id: I85e84eaff7df2995243896108a217fae81716b63
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
2020-12-16 17:27:46 -08:00
Abhijit Kulkarni
2457f38adc disp: msm: sde: fix ich reset override logic
This change fixes the detection logic for overriding the ich
reset in both single and dual dsc case. In the previous logic
ich reset override was not getting triggered when partial update
on single dsc was enabled. This override is required to change the
default Hw behavior of changing the ich reset position.

ICH reset needs to be overridden in dual dsc merge case when
partial update disables the dsc merge and no. of slices per
encoder drops to 1. Similarly for single dsc case partial update
case when DSC encoder configuration changes from 2 slices to
single slice this override is required.

Change-Id: I435dc7ff10c9fb0edb8e40e6701608aa22136981
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
2020-11-03 10:10:35 -08:00
Raviteja Tamatam
e5ff0b8f30 disp: msm: sde: add support for qsync min fps list
In current implementation qsync min fps is single value.
It is same for all the list of supported dfps list.
Added support for new dt entry dsi-supported-qsync-min-fps-list
corresponding to the fps supported in the dfps list
dsi-supported-dfps-list.

Change-Id: Ifd5309c2f51865a3c0d9fadb65cbcd291b6ef42b
Signed-off-by: Raviteja Tamatam <travitej@codeaurora.org>
2020-10-15 12:32:25 +05:30
Yashwanth
2683324973 disp: msm: register rotator platform driver after genpd init
Due to power-domain, if rotator driver is registered early,
probe might get deferred several times and get stuck
indefinitely. So, this change adds driver registration
after genpd init to handle such cases.

Change-Id: I8dcb640d0ab0cdf0818cbce1b1fb460c28d8b9e7
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
2020-09-25 21:16:42 +05:30
qctecmdr
13154febbc Merge "disp: msm: check max FPS of DFPS to update UIDLE configurations" 2020-09-18 16:36:35 -07:00
Lei Chen
c44e0b42df disp: msm: check max FPS of DFPS to update UIDLE configurations
It is not applicable for all DFPS cases to update UIDLE state
according to current frame rate. If DFPS changes frame rate
through vertical front porch values, the SDE clocks and transfer
time will not get changed accordingly, and it always get fixed
at max frame rate configuration of DFPS.
Add this change to check max FPS of DFPS instead of current
frame rate for UIDLE update, if DFPS is enabled with VFP.

Change-Id: I7634bce6a9eb1af212ba19a267735be08b20ae1f
Signed-off-by: Lei Chen <chenlei@codeaurora.org>
2020-09-15 09:51:30 +08:00
qctecmdr
b0775fe9da Merge "disp: msm: add allowed_mode_switch blob property" 2020-09-12 00:11:57 -07:00
Satya Rama Aditya Pinapala
03f9c40e7d disp: msm: add allowed_mode_switch blob property
The change adds a new mode property allowed_mode_switch. The new
property is a 32bit bitmask that indicates the modes each mode
can switch to. This change is required to pass the driver mode
switching capabilities, so that user mode can reject any mode switch
that is not supported by the driver.

Change-Id: I76d1733a07a6d57487ba9f461055270d7e60e060
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-09-04 17:58:46 -07:00
Gopikrishnaiah Anandan
10e00393d8 drm: msm: add dspp caps blob to crtc
All sde crtc's are virtual when they are created. Resources for the crtc
is allocated when crtc is enabled. All crtc's will not have same
capabilities because some of the dspp blocks have additional hardware
blocks. Change exposes additional dspp capabilities dynamically when
crtc is allocated the dspp hardware block.

Change-Id: I93e76a1335574e4ca30d9419ef6cc6e8149e2c3c
Signed-off-by: Gopikrishnaiah Anandan <agopik@codeaurora.org>
2020-08-31 14:37:30 -07:00
qctecmdr
de155b0582 Merge "disp: msm: sde: right only pu support" 2020-07-24 14:10:39 -07:00
qctecmdr
5cd8505102 Merge "disp: remove kernel mapping of writeback framebuffer" 2020-07-24 02:22:42 -07:00
Abhijit Kulkarni
4e37cc3f17 disp: msm: sde: right only pu support
This change add right only pu support by allowing the dsc to be
flushed when one of the dsc is getting disabled. Since the crtc
swaps the mixers in case of right only partial update, this change
fixes the active display mask passed to encoder so that always the
left only dsc gets programmed. This change also fixes layer mixer
configuration where only one layer mixer is driving the partial
update, the other mixer's configuration is disabled.

Change-Id: I2dd2e9a347797bfe07c90e0ca7f999d151fba933
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
2020-07-23 14:40:03 -07:00
Jeykumar Sankaran
99df0d5052 disp: msm: add support for vm event register framework
Besides SDE, other subdrivers may be interested in participating in
the VM switch. This change provides framework for display dependent
drivers like DSI, DP and RSCC to register for various VM switch
event hooks.

The following hooks to provided through msm_vm_ops:
post_hw_acquire: invoked before the first frame push after gaining
                 HW access.
pre_hw_release: invoked after the last frame commit before releasing
                the HW.
check:       check with vm clients for their readiness for HW
             releasing.

Change-Id: I616db04e979f78f76f6f97ee3b068dd348339ab6
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
2020-07-08 23:14:31 -07:00
Narendra Muppalla
472784dfdd disp: remove kernel mapping of writeback framebuffer
This change removes the fb_kmap debugfs node along with kernel
mapping of writeback framebuffer. It also replaces dma_buf_kmap
calls with dma_buf_vmap.

Change-Id: I2fbee7fa5922071f6805d8e6df540ce87056bc0b
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
2020-07-07 14:22:14 -07:00
Jeykumar Sankaran
8b032e5e46 disp: sde: add CRTC property for VM requests
Add a CRTC property to request the VM to acquire/release
HW resources.

Display driver in trusted VM boots up without HW ownership. Set
the default value of the property as RELEASED to handle resource
assignments.

Change-Id: Iea651a2fea902d95d4b954052af4ef016af15a91
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
2020-06-19 17:46:43 -07:00
qctecmdr
8975496690 Merge "disp: msm: sde: adjust DSC encoders to support all 4LM topologies" 2020-06-09 23:42:41 -07:00
Amine Najahi
ed868466f5 disp: msm: dp: Extend mode filtering to support 8K
Currently DP driver determines if a mode is DSC capable
based on a DTSI entry and the required number of DSC
to support it. This approach does not scale when there
is an overlap in DSC requirement between DSI displays
and external DP display, thus causing one of the display to
report modes that cannot be supported.

This change compares the resources reserved for DP driver
calculated at initialization time and the currently available
ones to determine the correct number of resources that DP driver
can use. It also adds DSC and topology filtering logic and moves
DSC hardware specific from DP driver to SDE driver.

Change-Id: I8e601de33422b7c6d786826f7bfe152c4af8a6b5
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
2020-06-09 09:17:38 -04:00
Dhaval Patel
83860f0642 disp: msm: pass free dsc and lm availability info to dp
Primary and secondary dsi displays are built-in displays
and they are supported during all concurrency usecases
without resource allocation failure. DP mode filter
logic should provide supported mode information based
on free mdp resources after dsi resource assignment.

Change-Id: I3a9637a91ea1ffcc31997e25caff7f13605283ac
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
2020-06-07 22:57:26 -07:00
Amine Najahi
b121756b5d disp: msm: sde: adjust DSC encoders to support all 4LM topologies
Add support for all 4LM topologies in new DCE encoder framework.
This change also aligns with the new way of checking topology
information.

Change-Id: I5358d60634070bdb26059056db884ad4161c073e
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
2020-05-28 19:25:09 -07:00
Alisha Thapaliya
e2f98dc79b Revert "disp: msm: sde: adjust DSC encoders to support all 4LM topologies"
This  reverts commit 6a50aedbfa.

Change-Id: I3570b18728cfad2843ca7f3a7d0276cda32c9492
2020-05-14 11:51:15 -07:00
Amine Najahi
6a50aedbfa disp: msm: sde: adjust DSC encoders to support all 4LM topologies
Add support for all 4LM topologies in new DCE encoder framework.
This change also aligns with the new way of checking topology
information.

Change-Id: I20785c96569fd07cbd8016d244a7e4c929bfa071
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
2020-05-06 14:16:40 -04:00
Narendra Muppalla
218244e58b disp: msm: update rm topology mapping tables
This change updates resource topology mapping tables and includes
logic to compare compression types for dsc vs vdc.

Change-Id: I1735edeb07aec8ed0065f84ac0824c58158412f3
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
2020-05-04 22:47:11 -07:00
qctecmdr
dfc3e3ddc8 Merge "disp: msm: sde: add sys cache usage for static image" 2020-05-01 17:58:07 -07:00
Shashank Babu Chinta Venkata
8b8bfe0165 disp: msm: make msm_drm into single module
Make msm_drm into single module and all child driver
registers and unregisters are handled from parent's
register and unregister respectively.

Change-Id: I017513d1de3b6b25dd5543d7fa7741c0bac1740d
Signed-off-by: Shashank Babu Chinta Venkata <sbchin@codeaurora.org>
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
2020-04-28 15:52:39 -07:00
Nilaan Gunabalachandran
83ee51cb5a disp: msm: sde: add sys cache usage for static image
Store full or partial static image in system cache (L3 cache)
for video mode primary display. Added additional commit to
crtc commit thread to transition to read cache state.
The change also updates llcc APIs to support generic functionality.

Change-Id: I6b2a45da946d7e0e0b326da9d214be3f01a9420e
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
2020-04-27 15:12:17 -04:00
Rajkumar Subbiah
56e041919c disp: msm: dsi: add widebus support for DSI
From Lahaina onwards, for compressed DSI output, widebus should be enabled.
In widebus mode, 6 bytes of data are transmitted per pclk.
For uncompressed output, widebus must be disabled to transmit 3 bytes
of uncompressed data per pclk.

Change-Id: I7fc0bdb2e1678152d57b4cbb8295063a2ba8ae73
Signed-off-by: Rajkumar Subbiah <rsubbia@codeaurora.org>
2020-04-09 14:15:13 -04:00
Gopikrishnaiah Anandan
718e224640 disp: msm: Install demura properties on connector
If DPU hardware supports demura feature, install the connector
properties related to demura feature.

Change-Id: Ieaddfc695e9f57e3c45e2bc0bd2c2e103f895ba8
Signed-off-by: Gopikrishnaiah Anandan <agopik@codeaurora.org>
2020-03-30 17:41:51 -07:00
Renchao Liu
b3cb4343b1 disp: msm: Fix byte alignment problem on 32bits OS
There is potential byte alignment problem on 32bits OS which will
cause incorrect histogram blob id getting from the user space.
This change fixes byte alignment problem on 32bits OS by keeping
the struct members in one complete struct as the user space using.

In previous code start address of 'info' would align to multiple of 8,
so there would be 4 bytes padding between member 'event' and 'info'
on 32 bits OS. It is affected by member 'base'. But user space just
uses struct drm_msm_event_resp only, not affected by member 'base'.
Driver code intends to send drm_msm_event_resp, but actually send
unpacked members.

Change-Id: I5410f5b1626387707a57cbcef9c651aa11914d9d
Signed-off-by: Renchao Liu <rencliu@codeaurora.org>
2020-03-29 16:52:16 -07:00
Prabhanjan Kandula
45af4566d9 disp: msm: dsi: add support for spr enable from panel config
This change parses SPR enable entry from panel device tree and
populates SPR specific information in panel data structure.
Valid entry of SPR pack type is treated as panel requirement
to enable SPR for specified pack type from source end. This change
also populate connector capabilities blob with SPR pack type.

Change-Id: I9d9ab8a990476fba281e12890bf3f7b17a174d79
Signed-off-by: Prabhanjan Kandula <pkandula@codeaurora.org>
2020-03-16 22:04:40 -07:00
Narendra Muppalla
68ee65353b disp: msm: sde: align timing engine vsync based on panel vsync
This change adds logic to align timing engine vsync with panel
tear check if it is supported.

Change-Id: I3f881f392929589848c893f567822b21c0650000
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
2020-03-11 10:14:57 -07:00
Abhinav Kumar
e3f23771ba disp: msm: add support for variable compression ratios
Currently the compression ratio is hard-coded to either 2:1 or
3:1 in several places. This is not sufficient for new compression
algorithms as they can support higher compression ratios.

Add support for calculating the compression ratios from the source
and target bpp thereby eliminating hard-coding.

Change-Id: I6383f3d0c781193d0a9ed74df5a95d8e856edb3d
Signed-off-by: Abhinav Kumar <abhinavk@codeaurora.org>
2020-01-29 13:46:57 -08:00
Abhinav Kumar
c4f5050e13 disp: msm: add VDC topology related changes
Add support to configure the DPU pipeline to support VDC-m
topologies.

Change-Id: Ib8ce9a0eaeaa838759fb09cb2ee164d4765e4989
Signed-off-by: Abhinav Kumar <abhinavk@codeaurora.org>
2020-01-29 13:45:35 -08:00
Abhinav Kumar
d88b5b5c67 disp: msm: add hardware register ops for VDC-m block
Add hardware register set and programming for VDC-m block.

Change-Id: I60ef27b507284521abdd10bb679a85303475ddc3
Signed-off-by: Abhinav Kumar <abhinavk@codeaurora.org>
2020-01-29 13:45:05 -08:00
Abhinav Kumar
497fe7758b disp: msm: add VDC-m parameter calculation support
Add support to calculate the parameters needed to configure
the VDC-m encoder. These are also needed to configure the PPS
command which shall be sent to the decoder.

Change-Id: I36db93f7555aee34b5b893e389a7eb88d0e05f68
Signed-off-by: Abhinav Kumar <abhinavk@codeaurora.org>
2020-01-29 12:11:41 -08:00
Abhinav Kumar
10996c1813 disp: msm: add support for parsing VDC-m DTSI parameters
Add support for parsing VDC-m DTSI parameters and also
perform basic validation checks on those.

Change-Id: I4b13cf04b1500c3c801c227658cb787bdad6174f
Signed-off-by: Abhinav Kumar <abhinavk@codeaurora.org>
2020-01-27 14:10:57 -08:00
Abhijit Kulkarni
acb8d98e66 disp: msm: use upstream dsc config data
This change enforces dp, dsi and the sde drivers to use the
drm framework defined dsc_config data structure. As a part of this,
it introduces the sde_dsc_helper API to configure the dsc params
and creating a PPS command. Earlier each driver implemented it's
private versions leading to duplication of code. Additionaly the
helper api supports DSC spec 1.2 422 and 420 mode.

Change-Id: I25933fab08cdabbc6787079926885d1a78945e97
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
2020-01-22 12:33:24 -08:00
Linux Build Service Account
8e2dde8420 Merge changes If37ec780,Ia691c95d into display-kernel.lnx.1.0
* changes:
  disp: msm: sde: remove sde wrapper for clock set flags
  Disp: Snapshot change for lahaina display driver
2019-12-04 17:27:51 -08:00