This feature will add support for the encapsulation of Ethernet VLAN
frames in IP/GRE on uplink, while also stripping IP/GRE headers on
downlink.
Change-Id: I33025405f7a5d738be3c86a6f5ec2fdfd4e37395
Signed-off-by: Perry Randise <prandise@codeaurora.org>
While handling the suspend interrupt due aggregation timeout
possible to IEOB interrupt will be delayed. To handle this
scenario adding changes to decrement clock in delays work queue.
Change-Id: I4b9afebf5a9582f6c94aa5a9cd2eb0904b7171b8
Signed-off-by: Ashok Vuyyuru <avuyyuru@codeaurora.org>
Add SRAM base to the SRAM header address before passing it
to the IPA HW.
Change-Id: If96f8ab471eb099c1c4d76b537a37bf20a58d7f6
Signed-off-by: Ilia Lin <ilialin@codeaurora.org>
Seeing IPA HW-stall with eth cable plug-out due to
eth-client was not able to drain out the pkts, made
the change to enable holb drops on eth-tx pipes when
getting eth_client_disconn_pipes from eth-driver.
Change-Id: Ifc795435e011f78f426c8db0e1d3ca3e0e74e806
Signed-off-by: Skylar Chang <chiaweic@codeaurora.org>
"ipa3_replenish_rx_cache" would skip the new buff allocation,
in that case "wlan_comm_total_cnt count" update is not
expected. wlan_comm_total_cnt count needs to be updated based
on new "len" and previous "len" (rx_len_cached).
Change-Id: Iacd15d39e48d2948806d0edfe51d6b328116681d
Signed-off-by: Piyush Dhyani <pdhyani@codeaurora.org>
For measuring modem throughput initialize new
ep and configure HOLB and drop stats on that
ep.
Change-Id: Ic218877f7301c6d182742de2e0645f53ac5d7528
Signed-off-by: Piyush Dhyani <pdhyani@codeaurora.org>
Remove the rate limitted error log when unexpected client
received on update current poll state.
Change-Id: I60123b88fa43655e107ea238c5cc2d958d9ffe65
Signed-off-by: Michael Adisumarta <madisuma@codeaurora.org>
Currently max length size of DL flt rule is
sent to Q6. But 64K memory allocation is not
always guaranteed. Send actual size of DL flt rule
to Q6 to avoid memory error and install flt rule.
Change-Id: Id5f7bbb616c23feb6efbacd288f790432156630b
Signed-off-by: Michael Adisumarta <madisuma@codeaurora.org>
The header table is now distributed dynamically between
SRAM and DDR. Adding new tests validating this feature.
Change-Id: Id5312c6f5d36659b0232310674bda3947647a4fc
Signed-off-by: Ilia Lin <ilialin@codeaurora.org>
On request from modem move NAT table to DDR only
or back to hybrid mode. send QMI indication when
transition has finished.
Change-Id: I6d7fd5576519016da5b99e13e7019a925109244a
Signed-off-by: Amir Levy <alevy@codeaurora.org>
Enable moving the NAT table to DDR\SRAM and vice versa
by debugfs.
Change-Id: I4818e790db7703d9c71ed8b0eb98564a918e86db
Signed-off-by: Amir Levy <alevy@codeaurora.org>
Add NAT table move request and response messages. On
QMI request from Modem send message to IPACM to move
NAT table from HYBRID mode to DDR only and vice versa.
Add IOCTL to allow IPACM to send indication to modem
about NAT table move complete.
Change-Id: I0c0031be7309bdf81e201dd41227e2d802e6e7b0
Signed-off-by: Amir Levy <alevy@codeaurora.org>
Increase timeout while waiting for FC command to complete.
For enable FC command wait longer in case PENDING bit is set.
Change-Id: I6d4443b1688d2ae426079638216829a4ddb30d94
Acked-by: Nadav Levintov <nadavl@qti.qualcomm.com>
Signed-off-by: Sivan Reinstein <sivanr@codeaurora.org>
Increase the array size to include recycle count for
LL pipe as well.
Change-Id: I607067d01fc4fd2c756f36ebea965cbe37666cb2
Signed-off-by: Michael Adisumarta <madisuma@codeaurora.org>
Sg table tables are not contiguous page due to this while copying
total sg table it failing. To avoid this copying the each sg
table individually
Change-Id: I08dfceaaee674ab642126c42d6978af5749d9909
Signed-off-by: Ashok Vuyyuru <avuyyuru@codeaurora.org>
When common event ring size is used, event ring memory is shared
across the pipes. Make changes to not increase the descriptor
fifo memory for pipes which use common event ring.
Change-Id: I3b93c8074c8c85eca2f04f18057dad6bfa7a8581
Signed-off-by: Chaitanya Pratapa <cpratapa@codeaurora.org>
In some cases for updating the return code in SCRATCH register taking
time after raising the global interrupt. Adding changes to wait for
some time read the SCRATCH register again and also printing the
test bus registers and Q6 channel state in failed scenario.
Change-Id: I4112a2290739daa79629f718d9725258518aba4c
Signed-off-by: Ashok Vuyyuru <avuyyuru@codeaurora.org>
Clear IEOBs as part of CH stop for channels with MSI IRQ type
Change-Id: I7b9af7f385b0876fc2f43314bd3588110911a021
Acked-by: Nadav Levintov <nadav@qti.qualcomm.com>
Signed-off-by: Sivan Reinstein <sivanr@codeaurora.org>
Removing a variable which was only set to NULL and later "freed".
Change-Id: I4973f8f2850669b9092eddee6d4179ab2089f227
Acked-by: Eliad Ben Yishay <ebenyish@qti.qualcomm.com>
Signed-off-by: Amir Levy <alevy@codeaurora.org>
