Commit Graph

107 Commits

Author SHA1 Message Date
qctecmdr
6ced01af10 Merge "disp: msm: sde: cancel delayed work when in auto-refresh" 2020-05-06 01:21:55 -07:00
qctecmdr
c587442d57 Merge "disp: msm: sde: decouple FETCH_PIPE_ACTIVE logic from setup_blendstages" 2020-05-05 18:29:34 -07:00
Steve Cohen
504b10377f disp: msm: sde: cancel delayed work when in auto-refresh
Display is entering into mode2 since no new frames are queued,
but auto-refresh requires HW to remain active. Make sure to
cancel the timer for entering idle power collapse whenever
there's a kickoff with auto-refresh feature enabled.

Change-Id: I0ac74e514c9893c31506edc3f2d7e069ab9a3ef8
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-05-05 15:02:03 -07:00
Narendra Muppalla
218244e58b disp: msm: update rm topology mapping tables
This change updates resource topology mapping tables and includes
logic to compare compression types for dsc vs vdc.

Change-Id: I1735edeb07aec8ed0065f84ac0824c58158412f3
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
2020-05-04 22:47:11 -07:00
Steve Cohen
b9e3d4aebb disp: msm: sde: decouple FETCH_PIPE_ACTIVE logic from setup_blendstages
Setup blendstages is done per LM but FETCH_PIPE_ACTIVE is per CTL.
Overloading mixer blendstage setup with fetch pipe logic can lead
to HW programming errors. Refactor the logic for setting
FETCH_PIPE_ACTIVE by adding a new op that allows caller to provide
a bitmask of all pipes required to be active on this CTL. This new
logic includes support for:
 - 4LM use-cases, staging pipes for all LMs within a CRTC
 - Demura fetch-pipe without need for tracking via active_cfg (removed)

Also, lower the cyclomatic complexity in setup_blendstages by moving
the logic for obtaining the mixer config settings in to a helper
function.

Change-Id: I2907b359ffad5734be5b06f44919b5ddb1ef3f7c
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-05-04 19:47:00 -07:00
Prabhanjan Kandula
62cb53cc59 disp: msm: sde: fix compression info usage in resource alloc
Currently, compression info passed to resource manager is not
valid in atomic check phase. Also in current design allocation
of msm mode info object is from stack which is huge and causing
stack overflow in continuous splash use case. This change fixes
these issues by moving mode info object to heap allocation.

Change-Id: Ifaf39b3ae59c942da5c00b82c73cb97cdaf500d3
Signed-off-by: Prabhanjan Kandula <pkandula@codeaurora.org>
2020-05-04 19:42:04 -07:00
Steve Cohen
257ac9e1d2 disp: msm: sde: reduce complexity in sde_encoder_virt_mode_set
Lower the cyclomatic complexity for this function by splitting
the work into helpers.

Change-Id: I9e32d4ff13d31360a2baa77e013751ee8f0773fb
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-04-24 01:19:19 -04:00
Samantha Tran
5217dfd7ea disp: msm: sde: update QoS values on FPS switch
This change updates plane's dirty flag with QoS
value to ensure QoS gets reprogrammed with new FPS
settings. This is required as QoS values will change
with FPS.

Change-Id: I377b99da2a640d375bd48477f149197b332e7f7b
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2020-04-21 12:48:23 -07:00
Steve Cohen
f95824d0ec disp: msm: sde: restart idle power collapse timeout every kickoff
Restart the timeline for the idle power collapse delayed work
timer for every resource control kickoff instead of only during
a power state change. This will prevent entering mode2 at
unexpected times during active scanouts.

Change-Id: I001157ff7e6b6246e26d537e30d8617cab9cb463
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-04-14 14:22:17 -07:00
qctecmdr
697315b082 Merge "disp: msm: sde: correct line time to include compression ratio" 2020-04-11 15:53:27 -07:00
qctecmdr
a6128a06ce Merge "disp: msm: sde: fix vsync wakeup time" 2020-04-11 14:36:34 -07:00
Samantha Tran
7401ef1995 disp: msm: sde: correct line time to include compression ratio
Current computation of line time does not include compression ratio
from either DSC or VDC. This change stores source bpp and target bpp in
sde_crtc during sde encoder mode set to be used while calculating line
time.

Change-Id: Ib1e045dce17fcf006447d4562b402cc3f214ed8c
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2020-04-10 16:23:38 -07:00
Rajkumar Subbiah
c0d4857a81 disp: msm: sde: adjust intf timing for widebus
From Lahaina onwards, widebus is enabled for compressed DSI stream.
This change adjusts interface timing parameters to account for widebus.

Change-Id: Ie6b739ed2cdb515064e3a94404b3e0fe07755d7e
Signed-off-by: Rajkumar Subbiah <rsubbia@codeaurora.org>
2020-04-09 14:14:55 -04:00
Thomas Dedinsky
5be3c7a8ce disp: msm: sde: fix vsync wakeup time
Current wakeup time is surpassing next vsync and not being used.
This change will use mdp transfer time calculated by dsi to compute
line time in command mode. In video mode, fps will be used to compute
the line time. This line time will be used with current interface
line count to calculate time until the next vsync.

Change-Id: I0b6fc396711ade95ecf95755a907280309af223e
Signed-off-by: Thomas Dedinsky <tdedinsk@codeaurora.org>
2020-04-09 12:52:45 -04:00
Narendra Muppalla
690deaec8e disp: msm: sde: add pm_qos support for high frame rate display
Add/remove pm_qos request during sde encoder resource
controller enable/disable for high frame rate and command mode display.

Change-Id: I95fab92de8399d8b892751d654e7913166856cf3
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
2020-04-03 09:52:02 -07:00
Abhijit Kulkarni
b96cd591ed disp: msm: sde: add encoder helper to get kms
This change adds helper to retrieve the kms from
the drm_enc structure and provides additional error
checking which can be avoided in the callers.

Change-Id: Id8ba07a2d48a605dd4ce846e5d61f302e5861b4d
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
2020-04-01 22:33:06 -07:00
qctecmdr
76d89c1e24 Merge "disp: msm: add support for no blend planes" 2020-04-01 17:45:16 -07:00
Gopikrishnaiah Anandan
078d42797b disp: msm: add support for no blend planes
Some of the features in the DPU hardware needs planes to be staged but
it should not be blended in the layer mixer. Change adds support for drm
driver client to set the blend type on the plane and updates driver code
to skip staging the plane.

Change-Id: I1e8c7f6ce5617820ea8b24419e0d4d27b481819b
Signed-off-by: Gopikrishnaiah Anandan <agopik@codeaurora.org>
2020-03-31 14:07:49 -07:00
Jayaprakash
e32095527a disp: msm: sde: avoid solver mode if autorefresh is enabled
In dual display with continuous splash, when autorefresh gets
disabled in primary on first commit, solver mode gets enabled
and mdp_clock is gated whenever primary enters idle. The
secondary data path will get gated during that time and not advance
anymore. Asynchronous gating of the mdp_clock during operation
can also hang the secondary path. This change avoids entering
the solver mode which fixes the timeout in the autorefresh
disable sequence in the secondary.

Change-Id: I7562ce2ad72d3bb8e8b6b8f356fab6def0caaf92
Signed-off-by: Jayaprakash <jmadiset@codeaurora.org>
2020-03-30 09:15:24 -07:00
Yashwanth
18fe66c89e disp: msm: sde: reset crtc core perf while entering idle state
After coming out of idle state, bus vote is governed only
if there any change in perf compared to before entering idle
state. If the perf is same before and after the idle state,
bus update request is not considered and min bus votes are
voted. This change resets crtc core perf while entering
idle state always in command mode.

Change-Id: If172207422adc25fcee497aebe23aad1ac6ce7cc
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
2020-03-30 09:15:02 -07:00
Jayaprakash
8fa5ad6a2b disp: msm: sde: fix input_handler operations for various usecases
Input event handler can be unregistered without being
registered in the case where DMS or DYN_CLK flags
are enabled on first commit, add changes to handle
this sequence.

Change-Id: Idf4f9f310b5d56df396bfa5c6477e94d4fae7a9f
Signed-off-by: Jayaprakash <jmadiset@codeaurora.org>
2020-03-29 16:53:16 -07:00
Samantha Tran
78ff60d33a disp: msm: sde: add encoder null check in prepare commit
Add a null check for encoder before accessing ops.

Change-Id: I7b80f4aded89d6c6fe68a0d016f64e14f04f2e58
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2020-03-29 16:52:47 -07:00
Veera Sundaram Sankaran
bceea4e1fe disp: msm: sde: reset ctl on autorefresh disable failure
Reset MDP ctl path and DSI ctl on autorefresh
disable failure. This will enable the hardware
to recover from the hang.

Change-Id: Ia9acc8573c22e0713179ef4f6ef604caacabfadb
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2020-03-28 23:07:32 -07:00
qctecmdr
1fc486ad3e Merge "disp: msm: sde: ctl hw flush ops clean up" 2020-03-21 13:08:07 -07:00
Narendra Muppalla
68ee65353b disp: msm: sde: align timing engine vsync based on panel vsync
This change adds logic to align timing engine vsync with panel
tear check if it is supported.

Change-Id: I3f881f392929589848c893f567822b21c0650000
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
2020-03-11 10:14:57 -07:00
Dhaval Patel
9438f3448b disp: msm: sde: add underrun line count information
Add underrun line count information for each underrun.

Change-Id: I34a740c33240fa8d444f4bbc3b8b014b0282fca1
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
2020-02-28 11:57:47 -08:00
Nilaan Gunabalachandran
f51424f8a7 disp: msm: sde: ctl hw flush ops clean up
Using individual flush functions for each active hw blk
is not scable-able for future use. Clean up the ops to merge
all flush functions into one and manage HW block id
with same API.

Change-Id: I62afbc51fa7d345b3a1f5721e5e09661a4215f7a
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
2020-02-25 14:18:59 -05:00
Narendra Muppalla
42a8aea8fc disp: msm: sde: add pm_qos support for cmd mode display
Add/remove pm_qos request during sde encoder resource
controller enable/disable for command mode display.

Change-Id: If3247eb215a58eaae3ee0b4c7a90e7f5254e690c
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
2020-02-13 16:07:03 -08:00
Jayaprakash
f7d08feb38 disp: msm: sde: add enc_id check before decrement avail HW resources
Add changes to commit and decrement only those
hardware resources which are required for the modeset.

Timeline of Commit C1 with CWB modeset:
---> Atomic_check
	Primary encoder has allocated required HW resources.
 	CWB encoder has allocated required HW resources.
---> Atomic_commit
	On primary encoder, connector is seamless hence
	there is no virt_modeset call.
	On CWB encoder, there is virt_mode_set call
	and during commit HW blocks there is unconditional
	decrement for all the HW blocks with rsvp_nxt.

This change ensures hardware blocks are available during
dp display mode validations.

Change-Id: Ifd9439cfc96e727c3093af5f47802c8367775cd7
Signed-off-by: Jayaprakash <jmadiset@codeaurora.org>
2020-02-12 13:34:41 -08:00
Narendra Muppalla
f402d8e542 disp: msm: sde: program dither based on input data
This change programs dither based on user mode input data and
reprograms the dither when device comes out of power collapse.

Change-Id: I83be20c8eb2dc2221cc57cd2395f6512338ff6ef
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
2020-02-10 15:33:42 -08:00
Abhijit Kulkarni
2c6c071e45 disp: msm: sde: move resource state change to display thread
In the current kernel version calling kthread_mod_delayed_work
in irq context is not allowed. Due to this resource control state
change to idle on frame done is handled in display thread context.

Change-Id: I709f7e04ac23d7dde72cea1c19d3767b6abc147e
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
2020-02-07 10:33:08 -08:00
qctecmdr
c89633ed36 Merge "disp: msm: add support for variable compression ratios" 2020-02-03 00:11:10 -08:00
qctecmdr
da7839e18e Merge "disp: msm: use iterator APIs to walk the connector list" 2020-01-30 17:35:51 -08:00
Abhinav Kumar
c4f5050e13 disp: msm: add VDC topology related changes
Add support to configure the DPU pipeline to support VDC-m
topologies.

Change-Id: Ib8ce9a0eaeaa838759fb09cb2ee164d4765e4989
Signed-off-by: Abhinav Kumar <abhinavk@codeaurora.org>
2020-01-29 13:45:35 -08:00
Abhijit Kulkarni
e2726c7b1a disp: msm: sde: allocate dsc block based on capability
Certain DSC hw blocks only support 444 mode, while others
support both 444 and 422 modes. This change adds support in
resource manager to check the hw resource requirement with
the capability of the block and then reserve the correct
hw resource.

Change-Id: If85beb2f2f25e9eb7f8a8321c94b57878d048369
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
2020-01-22 12:33:24 -08:00
Abhijit Kulkarni
d3d3f808d4 disp: msm: sde: use pp dsc api only if hw supports
This change checks the capabilities of pingpong block to
check if it needs to call the pingpong api to enable or
disable the dsc. Certain hw versions do not have support
in pingpong block to enable/disable the dsc instead the
dsc block itself have the hooks to control the DSC.

Change-Id: I17dd45479cc33ff2e81f6a6e5a5a8704562dfd24
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
2020-01-22 12:33:24 -08:00
Abhijit Kulkarni
acb8d98e66 disp: msm: use upstream dsc config data
This change enforces dp, dsi and the sde drivers to use the
drm framework defined dsc_config data structure. As a part of this,
it introduces the sde_dsc_helper API to configure the dsc params
and creating a PPS command. Earlier each driver implemented it's
private versions leading to duplication of code. Additionaly the
helper api supports DSC spec 1.2 422 and 420 mode.

Change-Id: I25933fab08cdabbc6787079926885d1a78945e97
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
2020-01-22 12:33:24 -08:00
Abhijit Kulkarni
ac8ae6b85f disp: msm: sde: use dce api to configure dsc
This change introduces dce api to the encoder component to
configure supported compression hw. This allows encoder to
remain independent of the compression type and specification
supported by the hw.

Change-Id: I6bc35289495b05f57a83323cbab1ea14e9e15db0
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
2020-01-22 12:33:14 -08:00
Abhijit Kulkarni
dc8e0291e4 disp: msm: sde: move dsc implementation to a new file
This change moves the DSC implementation into a separate file.
This is required to add support for new compression algorithms.
This cleanup change also, moves struct sde_encoder_virt
declaration to the encoder header file.

Change-Id: Idc3b96e65fcce2a7ee6e17af604cec0cb574f6f7
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
2020-01-22 12:30:43 -08:00
Steve Cohen
8469b7be9e disp: msm: use iterator APIs to walk the connector list
Use the DRM APIs for walking the list of connectors. This ensures
the proper locks are taken to prevent possible corruption by other
threads.

Change-Id: Iacdd1c6ad8eab224ceac550e0229489851a09706
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-01-17 18:21:38 -05:00
Linux Build Service Account
8e2dde8420 Merge changes If37ec780,Ia691c95d into display-kernel.lnx.1.0
* changes:
  disp: msm: sde: remove sde wrapper for clock set flags
  Disp: Snapshot change for lahaina display driver
2019-12-04 17:27:51 -08:00
Yuan Zhao
6cb205cbba disp: msm: sde: migrated new sde icb bus scaling driver for lahaina
Migrate to icb framework API in drm and sde driver. And
also removes old msm_bus custom APIs from the driver.

Change-Id: Ifcf6d6f157594638075742fe328b29a9be065bca
Signed-off-by: Yuan Zhao <yzhao@codeaurora.org>
2019-12-03 18:46:27 -08:00
Narendra Muppalla
d1d9ae8b19 Disp: Snapshot change for lahaina display driver
This snapshot change adds downstream support
for drm 5.x+(msm_lahaina branch) linux kernel.

Change-Id: Ia691c95da155a00e449c91a2f1a5b20a8e71aed4
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
2019-11-24 12:30:51 -08:00
qctecmdr
b269dd05bc Merge "disp: msm: sde: fix video mode prefill lines for RSCC" 2019-11-02 09:08:46 -07:00
qctecmdr
7139bedc5a Merge "disp: msm: sde: Use platform independent API for 64-bit div" 2019-11-02 06:58:12 -07:00
Veera Sundaram Sankaran
b1c9d65e3d disp: msm: sde: fix video mode prefill lines for RSCC
The RSCC static wakeup and the bandwidth trigger for
the downvotes are based on the prefill lines. Reduce
the prefill lines based on the panel vertical front
porch to avoid issuing bw downvotes during active
region of the previous frame.

Change-Id: I408209ba308c32e71d9f70c5ed7e60c134877c84
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2019-11-01 10:09:35 -07:00
Ravikanth Tuniki
b0df721f2d disp: msm: sde: Use platform independent API for 64-bit div
64-bit division( operator "/") on 32-bit platforms is not supported.
Using platform independent API's here.

Change-Id: I1ec71ac120bb29b7f0bceed581b979606f81e2a5
Signed-off-by: Ravikanth Tuniki <rtunik@codeaurora.org>
2019-10-31 15:38:00 +05:30
qctecmdr
ee16fbb03f Merge "disp: msm: sde: update avr mode config during commit prepare" 2019-10-24 21:31:57 -07:00
Veera Sundaram Sankaran
6cdd1f1fe0 disp: msm: sde: avoid encoder power-collapse with pending frames
The encoder idle work is scheduled during the frame-done event
to be executed after a timeout. During the execution, the check
for any on-going/pending frames is invalid as it checks for > 1.
Fix it to check for any non-zero frame-pending and avoid
power-collapse.

Change-Id: If7715ee56cc9bfa63787811458f4fc91de540013
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2019-10-21 13:32:24 -07:00
Jayaprakash
aad3dd4525 disp: msm: sde: update avr mode config during commit prepare
Add changes to support avr mode config update during
prepare commit which happens before gpu fence wait
for the input buffers.

Change-Id: Ib2cb5b7e1f10501914c003f6cf066b85048f79d4
Signed-off-by: Kalyan Thota <kalyant@codeaurora.org>
Signed-off-by: Jayaprakash <jmadiset@codeaurora.org>
2019-10-18 12:53:56 +05:30