Use of drm_display_mode vrefresh is being deprecated in
upstream DRM framework. Downstream driver need to use
drm_mode_vrefresh API from now on.
This change removes dependency on drm_display_mode vrefresh
and replaces it with drm_mode_vrefresh API in SDE, DSI and
DP driver. In addition, it also modifies drm_display_mode clock
to align with upstream approach where an uncompressed mode clock
is required to match drm_mode_vrefresh API.
Change-Id: Ie972a2e140adfd81c4e68df8e7bc69feaaca22e1
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
Commit 2b07021a940c ("debugfs: remove return value
of debugfs_create_u32()") removes the return value
from debugfs_create_u32. This change updates the msm
driver to remove cehcks on this return and corrects
for unnecessary line wraps.
Change-Id: I8d50dd7168921edfb2d5edad13941f91117d3c30
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
Commit Ifa100424733 ("disp: msm: sde: delay
encoder disable for clone mode") delays the CWB
encoder disable but it is also skipping the CWB
disable flush. That can cause the underrun on dp
display if it uses the same 3d_merge HW block. This
change reverts the portion of original code and
only delays the last cwb frame done wait. It still
keep the last CWB frame done wait as it is if crtc
is also moving to inactive state.
Change-Id: I3461188a35197f2925899ceea7ef705adf00a398
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
Add support to detect if a writeback commit is received
while cwb commit is going on. Allow writeback commit
only once the cwb commit is completed and cwb is
disabled.
Change-Id: I020659ed63f9ff660a905938a92a6ed6d07a4917
Signed-off-by: Krishna Manikandan <mkrishn@codeaurora.org>
Current validation checks for cwb are not complete for
destination scaler concurrency. This change fixes cwb
checks to handle wb roi and frame buffer bounds checks
based on tap point and the destination scaler use.
Change-Id: I4a0277fea262621e73459243f60d3018bc475a67
Signed-off-by: Prabhanjan Kandula <pkandula@codeaurora.org>
This change fixes the issue in selecting the correct
perf index for the 90Hz refresh rate, before this change
values corresponding to 60Hz were getting applied for this
refresh rate.
Change-Id: Id4f8af4da95f0d13d30f6316dc26dd65b61d7f79
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
CWB may trigger frame missed message if interrupts
are disabled on specific CPU. WB2 will only find single
interrupt status for two posted start triggered frame.
SDE driver will start checking the xin client clock
status for wb2 timeout case to trigger the valid
frame done status.
Change-Id: I16a99667116732002e6dec8a18330f8b45199387
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
Existing cwb enable detection logic relies on
crtc id matching with each encoder->crtc. This
may not be available on first power on commit
because it updated after encoder_atomic_check
call. This patch fixes the cwb enable detection
logic by checking the encoder_mask on crtc_state.
It also fixes the cwb concurrency with mode_set
and secure display.
Change-Id: I70f656dd9e7d94d3ba761c25745b473a1c204173
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
This change adds support for enabling WB maximum linewidth
based on color format is linear or UWBC.
Change-Id: Icc71eb14b3156e06036a4a82029d9d7a5c89e909
Signed-off-by: Prabhanjan Kandula <pkandula@codeaurora.org>
Increase the maximum number of mixers per crtc to 4 to
support 4LM use case. This change also increases the number
of data path to 4 to support 4LM in continuous splash handoff.
Change-Id: I4655017dcb405fad69513bebb8fd7f848fc5873d
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
Submit a cwb frame event signal to notify the crtc that cwb
is completed. Currently cwb also uses the same frame done
event as primary. When a single cwb commit is completed, because
cwb is on a slower path there is a race condition in which the
subsequent frame done event for primary clears the refcount.
This fix isolates the events and removes this situation.
Change-Id: Ic3e18302eb8a497cbd7a00f271de2ab320576c83
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
Hardware structures for writeback ctl and cdm are set
to null during wb disable, to prevent crtc mode change
on primary during subsequent wfd and cwb sessions.
Change-Id: I7536203761c615c37c8633d1621951475895400a
Signed-off-by: Prashant Singh <prasin@codeaurora.org>
Signed-off-by: Krishna Manikandan <mkrishn@codeaurora.org>
The vsync callback for concurrent writeback is
not necessary. This would conflict with vblank
notification of primary as both belongs to the
same crtc.
Change-Id: Idb67915de086f94feb231d61b6f7e4e068a1ac35
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
Support different safe, danger and creq qos lut
configuration based on display fps. It also removes
the fill level calculations from sspp and wb block
because mdss hw supports simple configuration.
Change-Id: I203e4300c9eab27d3632c890bedd6383cca0e5a8
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
Using individual flush functions for each active hw blk
is not scable-able for future use. Clean up the ops to merge
all flush functions into one and manage HW block id
with same API.
Change-Id: I62afbc51fa7d345b3a1f5721e5e09661a4215f7a
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
This change adds support for dsc using the 3d mux hw block.
The 3d_mux hw block merges the input from layer mixer before passing to
dsc block for compression.
Change-Id: I21544c33fff2c1e604c0ae712a036a127d25afcf
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
Certain sub-blocks need to be enabled disabled dynamically on a
seemless mode switch (for ex. partial update) CWB is another example
where control path interface configuration needs to be dynamically
changed on enable/disable of concurrent writeback. Similarly
3d mux needs to be enabled/disabled for partial update use cases.
This change modfies the current api update_cwb_cfg and makes it
more generic and adds support to enable/disable only the 3d mux.
Change-Id: I5e5a6e78b0599f689cb2f83d0d626a5f392eff6e
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
This change enables display drivers code compilation
for lahaina target and current location of header files
is replacing the header files in usr/include/drm directory
before installing display specific header files. This change
ensures both the drm and msm_drv header files are exported
to user mode clients.
Change-Id: If6fc347598b902e670b7206dbcb82fe0740b3984
Signed-off-by: Shashank Babu Chinta Venkata <sbchin@codeaurora.org>
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
This snapshot change adds downstream support
for drm 5.x+(msm_lahaina branch) linux kernel.
Change-Id: Ia691c95da155a00e449c91a2f1a5b20a8e71aed4
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
2 Frames transfer pending is possible with posted start.
One ongoing frame and another triggered frame. Current SW
waits for pp_done interrupt if pending frame count is greater
than 1. It is possible that interrupt may be missed for ongoing
frame. In that case, SW should run pp_done wait for one by one
frame instead of two frames together. It allows encoder to
check the ctl scheduler status and trigger the frame done
event on time.
Change-Id: I4817842292d96747890ee70da8a5bdf9b56816ed
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
CWB, DP and WB displays tear down sequence must reset
3d_merge, ctl, pingpong_binding, etc. MDP HW
blocks. This change fixes the tear down
sequence register programming. It also moves flush
sw reset before encoder_disable call. That allows
CWB tear down to update the flush configuration
on primary ctl path.
Change-Id: I21c521b39456af4144cf836c65d46a25c985f51d
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
In the case of concurrent writeback, display thread
does not wait for writeback done and the fences are released
immediately if the pending frame count is one or zero.
Also during this skip wait process, the output frame buffers are also
cleaned up. If there are couple of bad writeback frames, there could
be a race condition between frame buffer cleanup in the display driver
and DRM_IOCTL_MODE_RMFB ioctl from userspace. Hence add appropriate
ref count logic with output frame buffers while the driver is using them.
Change-Id: I1cf919b93424011c75c39bcddd296a03a9d5c4ee
Signed-off-by: Lakshmi Narayana Kalavala <lkalaval@codeaurora.org>
Existing cwb implementation waits for WB done interrupt in
wait_for_commit_done API call. This serializes the cwb commit
and causes frame trigger delay on primary display. MDSS hw allows
to trigger the cwb frame when previous frame is in-progress. This
change updates driver to allow parallel frame trigger for cwb
enabled display. It releases frame N cwb output buffer in frame
N+1 wait_for_commit done call.
Change-Id: Id4f2a0cc78a3f24a1b5ce96dc907780246768dbf
Signed-off-by: Raviteja Tamatam <travitej@codeaurora.org>
This snapshot ports changes from 4.14 to 4.19 into
the msm and sde layer. Snapshot was taken as of
commit 0f8fb25421ff ("cnss2: Add device version to
SOC info structure").
Change-Id: I59b799a78319c2db6930a2a10bc38976f8c09898
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
This change fixes the destination scaler atomic check
to support PU with CWB disable without an additional
frame in between. It also fixes the destination height
calculation.
Change-Id: I93ae8471d2db0b4e2574d18a873d4d4e180cbcbb
Signed-off-by: Lakshmi Narayana Kalavala <lkalaval@codeaurora.org>
This change brings msm display driver including sde,
dp, dsi, rotator, dsi pll and dp pll from base 4.19 kernel
project. It is first source code snapshot from base kernel project.
Change-Id: Iec864c064ce5ea04e170f24414c728684002f284
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
