Commit History

Autor SHA1 Mensaxe Data
  Chaithanya Garrepalli 41fda10bc5 qcacmn: In WBM err process read peer_id from peer_meta_data %!s(int64=3) %!d(string=hai) anos
  Ananya Gupta 122bc19864 qcacmn: Fix REO reinjection path in hamilton DP %!s(int64=3) %!d(string=hai) anos
  Vevek Venkatesan 7a2c2fd90f qcacmn: cleanup FEATURE_HAL_DELAYED_REG_WRITE_V2 support %!s(int64=3) %!d(string=hai) anos
  Jingxiang Ge 37bf2d6b08 qcacmn: record cpu_id for hal_reg_write_work %!s(int64=3) %!d(string=hai) anos
  Pavankumar Nandeshwar 2228afc5b4 qcacmn: Enable HW cookie conversion feature %!s(int64=3) %!d(string=hai) anos
  Chaithanya Garrepalli 0702aaf463 qcacmn: initialize PPE rings %!s(int64=3) %!d(string=hai) anos
  Chaithanya Garrepalli 7ccb73b31f qcacmn: Add support for beryllium on WIN %!s(int64=3) %!d(string=hai) anos
  Vevek Venkatesan f49df07dae qcacmn: add support to clear the consumed HW descriptors %!s(int64=4) %!d(string=hai) anos
  Rakesh Pillai 5d44eac10a qcacmn: Enable PN check for 2K-jump and OOR frames %!s(int64=4) %!d(string=hai) anos
  Rakesh Pillai 47af4d320f qcacmn: Move to index based assignment for srng register offset %!s(int64=4) %!d(string=hai) anos
  Rakesh Pillai 37e2c6d9ed qcacmn: Register IRQ for near full irq %!s(int64=4) %!d(string=hai) anos
  Rakesh Pillai 1104d6d5a7 qcacmn: Delay 50us when update same shadow reg %!s(int64=4) %!d(string=hai) anos
  nobelj 25acb759bf qcacmn: Fixes to enable LI & BE in a build %!s(int64=4) %!d(string=hai) anos
  Mohit Khanna f3e19b41d3 qcacmn: HAL Changes for RX packet capture %!s(int64=4) %!d(string=hai) anos
  Rakesh Pillai 30d963b68e qcacmn: HAL internal API changes for beryllium %!s(int64=4) %!d(string=hai) anos
  Vevek Venkatesan 38af510319 qcacmn: add dedicated workqueue for Tx ring delayed reg write %!s(int64=4) %!d(string=hai) anos
  Rakesh Pillai 783f811315 qcacmn: Send ring sel cfg to configure rx pkt tlvs offset %!s(int64=4) %!d(string=hai) anos
  Aniruddha Paul b42ee01aec qcacmn: Change the DST_ALT_IND_0 to WBM from REO2TCL %!s(int64=4) %!d(string=hai) anos
  Nisha Menon a377301c78 qcacmn: Add support to map generic shadow regs %!s(int64=4) %!d(string=hai) anos
  Saket Jha a64da56134 qcacmn: Stop FISA if frame rings mismatch %!s(int64=4) %!d(string=hai) anos
  Manikanta Pubbisetty 3433cf4974 qcacmn: add HAL APIs to configure FSE in CMEM %!s(int64=4) %!d(string=hai) anos
  Rakesh Pillai 21af5ba8cf qcacmn: Add data structures for SWLM %!s(int64=4) %!d(string=hai) anos
  Tiger Yu 0f08390fa4 qcacmn: Add memory barrier to avoid inconsistent reg write for valid flag %!s(int64=5) %!d(string=hai) anos
  Sridhar Selvaraj 3ae6b5c3fe qcacmn: Update REO Remap config API as platform specific %!s(int64=5) %!d(string=hai) anos
  syed touqeer pasha c6d4cbfd1a qcacmn: qcn9000 changes in rx flow identification %!s(int64=5) %!d(string=hai) anos
  Basamma Yakkanahalli c0b1d0ebf0 qcacmn: use distinct I/O remap to access CE register for ipq5018 %!s(int64=5) %!d(string=hai) anos
  Rakesh Pillai 37cc4255e2 qcacmn: Drain group tasklets and reg write work for runtime PM %!s(int64=5) %!d(string=hai) anos
  Vevek Venkatesan 9043089a40 qcacmn: Add prefetch_timer config for CE rings %!s(int64=5) %!d(string=hai) anos
  Radha Krishna Simha Jiguru 8ca2521ac8 qcacmn: Get Rx TLV offsets from structure %!s(int64=5) %!d(string=hai) anos
  Rakesh Pillai eee37dab3f qcacmn: Add dequeue value in delayed register write entry %!s(int64=5) %!d(string=hai) anos