Grafico dei commit

93 Commit

Autore SHA1 Messaggio Data
Veera Sundaram Sankaran
2e3ba9430c disp: msm: expose qsync avr step as part of conn mode caps
Add capability to read avr step for each timing mode. This will
be in addition to the existing avr-step-list which is defined
when dfps is enabled. Expose the avr-step as part of each
mode in connector caps to user-mode.
Additionally, change the avr_step connector property to enum
to give usermode just the capability to enable/disable avr-step
and not alter the step value as its fixed from the device tree.

Change-Id: I6d7f8e9fcf03f98abef7640fc741e5e1be8597a1
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
2023-02-09 11:10:08 -08:00
Shamika Joshi
495a6a8731 disp: msm: dsi: optimize wait time in DSI timing DB update
Timing DB needs to be disabled after panel vnsyc.
Update the wait time to reflect difference in line time
between MDP and panel vsync.

Change-Id: Ib5282d67995e8379ead928218f31a8f9fe7fa978
Signed-off-by: Shamika Joshi <quic_shamjosh@quicinc.com>
2023-01-18 13:11:13 -08:00
Srihitha Tangudu
219652f3a8 disp: msm: dsi: clear the panel esd_recovery_pending in power on commit
Currently the panel esd_recovery_pending flag is cleared for every mode
set. The ESD recovery completes only after the suspend and resume. Clear
the flag only during power on commit.

Change-Id: I97e370feba0aad34558e4675168b4bcb7f5901ca
Signed-off-by: Srihitha Tangudu <quic_tangudu@quicinc.com>
2022-10-30 23:37:36 -07:00
Raviteja Tamatam
22a3c5a842 disp: msm: fix display compilation for 6.0 kernel upgrade
Fix display compilation issues for 6.0 kernel upgrade.

Change-Id: Ied1940e653ceaa1de18a8aedeab01197c235603c
Signed-off-by: Raviteja Tamatam <quic_travitej@quicinc.com>
2022-10-19 11:04:22 -07:00
Rahul Sharma
aea055ebc6 disp: msm: dsi: pass DRM_BRIDGE_ATTACH_NO_CONNECTOR during bride attach
Pass the DRM_BRIDGE_ATTACH_NO_CONNECTOR flag when attaching the
bridge so that the bridge driver would not create another
drm connector.

Change-Id: I838bd87c40d0eea3df36187befeb7195fb87d5b3
Signed-off-by: Rahul Sharma <quic_rahsha@quicinc.com>
2022-05-17 22:09:43 +05:30
Nisarg Bhavsar
75aedb1c53 disp: msm: Address static analysis issues
Avoid various possible nullptr dereferences.
Addresses various issues highlighted by static analysis.

Change-Id: I36d34d610b37bf2799a7e34cd1de8b909b5c0ae4
Signed-off-by: Nisarg Bhavsar <quic_bhavsar@quicinc.com>
2022-04-28 11:53:38 -04:00
Rajesh kv
03aad2fdf9 disp: msm: sde: add line insertion support for sspp
Add line insertion support for sspp, this is used to support
display with external splitter. Line insertion logic checks
the difference between screen logical height and physical
height. If any difference is observed adds dummy and active
lines on screen.

Change-Id: Ieec322273df000a53fb39e05174c2d67c3c2da81
Signed-off-by: Rajesh kv <quic_kvrajesh@quicinc.com>
2022-04-01 09:35:03 +05:30
Nilaan Gunabalachandran
e5fcf7f263 disp: msm: add capability to dynamically update the transfer time
This change adds a connector OP, that will be used to update frame
transfer time dynamically at the request from user space.

It also adds parsing for new device tree entries that set the minimum
and maximum trasnfer times on a mode basis. These min and max transfer
times are also published to userspace through the connector mode info
capabilities blob.

Change-Id: I12aedf96a51ff7feb2c5b3b1353d3c4ec8dcb068
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
Signed-off-by: Nilaan Gunabalachandran <quic_ngunabal@quicinc.com>
2022-03-21 14:13:32 -04:00
Satya Rama Aditya Pinapala
718cd25496 disp: msm: add support for INTF WD jitter
Change adds support for the INTF watchdog timer jitter feature
for MDSS 9.x.

Change-Id: I2cf821b5b5724f9adee95c282e0ec09719489a85
Signed-off-by: Satya Rama Aditya Pinapala <quic_spinapal@quicinc.com>
Signed-off-by: Narendra Muppalla <quic_nmuppall@quicinc.com>
2022-02-24 10:51:20 -08:00
GG Hou
2abee80413 disp: msm: dsi: optimize the display error log print
Optimize the error log in _dsi_bridge_mode_validate_and_fixup()
to avoid unexpected failure.

Change-Id: Id674b511f79ccf05d4fc5a5729c0e109731bdf54
Signed-off-by: GG Hou <quic_renjhou@quicinc.com>
2022-01-13 09:32:35 +08:00
GG Hou
644927312e disp: msm: sde/dsi: reduce display cyclomatic complexity
msm/sde/sde_encoder.c
	_sde_encoder_update_rsc_client()
	sde_encoder_prepare_for_kickoff()

msm/dsi/dsi_drm.c
	dsi_bridge_mode_fixup()

Lower the cyclomatic complexity for this function by splitting
the work into helper functions.

Change-Id: I2285809a33078e29989a6b44800c18342aa24170
Signed-off-by: GG Hou <quic_renjhou@quicinc.com>
2022-01-10 19:05:50 -08:00
qctecmdr
c0dad8fa08 Merge "disp: msm: dsi: add qsync min fps val in dsi display mode priv info" 2021-09-17 03:46:41 -07:00
Yashwanth
6619470eb6 disp: msm: dsi: add qsync min fps val in dsi display mode priv info
In the current code for finding the qsync min fps for a
mode, entire mode list is iterated which involves acquiring
dsi display_lock. During conn tx debugfs commands, if
qsync min fps is required, we try to acquire dsi
display_lock twice which results in hang state. This change
adds qsync min fps value in dsi_display_mode_priv_info
struct in order to get the qsync fps from the
msm_display_mode present in connector state instead of
looping through all the modes to find the mode qsync fps.

Change-Id: Ifded40d1f12462bb50fc7bdafb746ae5b8d9512a
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
2021-09-15 12:09:35 +05:30
Samantha Tran
8dbb23a8f5 disp: msm: reset connector panel_dead during dsi bridge post disable
This change resets panel_dead property at the end of dsi bridge post disable.
Currently as part of the ESD recvoery sequence, dsi_bridge_enable resets this
property, but WD vsync source is selected before this point based on the older
panel_dead status. With this change, panel_dead will be in a proper state and
the correct vsync source will be selected during recovery.

Change-Id: I6d614113cfb0ae8a857974bb4d4f8ceb5988a0c8
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2021-08-24 13:32:04 -07:00
Yashwanth
0ca8cea39e disp: msm: dsi: add submode argument to find correct mode
During DSC-NonDSC usecase, submode should be passed to
dsi_display_find_mode to differentiate between the modes
containing same timing info. This change adds submode
argument to find the correct mode in such cases.

Change-Id: I82284aeb9c3fd187c4f0961443dd1d0893a3c094
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
2021-08-17 12:58:22 +05:30
Yashwanth
64b732f335 disp: msm: add qsync refresh rate support per mode
This change adds support for qsync min refresh rate per
timing mode and populates qsync min refresh rate based
on the current fps when qsync is enabled.

Change-Id: I191d1d72e95dd065c8c0b56a6100104c00c6d8f6
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
2021-08-05 15:37:20 +05:30
Amine Najahi
e3c76571dc disp: msm: dsi: fix RFI mode set detection
Currently mode fixup function is called multiple times
in the same commit. This causes invalid combination of
DSI mode flags to be set when there is an RFI change
with proch compensation feature enabled.

This change modifies the mode switch condition for DMS
to compare internal dsi mode and flags and fixes the
dynamic clock change detection by using a single variable.

Change-Id: Iaf9c8ca7c6a27f26aefead399bc93fbbb02b404b
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
2021-07-29 07:43:27 -07:00
Amine Najahi
1881acdb2b disp: msm: dsi: publish RFI porch values for rate matching calculation
Currently when RFI is used on a video mode panel the horizontal or
vertical front porch values can be adjusted to maintain a constant FPS.
When this feature is enabled, driver is not propagating the new
htotal or vtotal values to usermode for accurate BW and MDP clock
calculation, which may lead to underrun in some usecase.

This change publishes beforehand all the RFI related timing
such as compensation type, hfp or vfp and clock values for
each mode for accurate BW and clock calculation.

Change-Id: Ib89c5e318fe978b0ae2215dedc430e057a9a81b9
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
2021-07-29 10:35:27 -04:00
qctecmdr
a44120edf1 Merge "disp: msm: sde: correct num_datapath during PM resume with CWB" 2021-07-15 13:14:46 -07:00
Jayaprakash Madisetty
a29369e224 disp: msm: sde: correct num_datapath during PM resume with CWB
In PM resume with CWB concurrency usecase, crtc pointer in
conn->state is NULL since drm_mode_config_reset operation is
performed on pm_resume. This change relies on conn_mask in
new_crtc_state for primary connector retrieval and also adds
get_num_lm_from_mode callback to DSI for LM count retrieval
from dsi panel topology. Existing get_mode_info api cannot
retrieve the topology info because mode->priv_info is NULL.
This occurs as WB encoder is added in the drm encoder_list
before primary encoder, introduced as part of commit d28ebf05f4
("disp: msm: sde: populate WB display encoder list before dsi").

Change-Id: I55358fd88ab778bd81475cf3628be13335de1cb5
Signed-off-by: Jayaprakash Madisetty <jmadiset@codeaurora.org>
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2021-07-09 09:12:26 -07:00
Yashwanth
084a57842a disp: msm: dsi: remove seamless dms flag during active changed
During DSC to Non-DSC switch or viceversa, DMS flag is set
which cannot be treated as seamless during active changed
condition. Hence, DMS flag is removed if set during active
changed condition.

Change-Id: I5ebd33a339aea7d6fab297a4c57ad90eb7bd442c
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
2021-06-23 13:57:25 +05:30
qctecmdr
1b9345b3af Merge "disp: msm: sde: add support for digital dimming" 2021-06-02 17:20:03 -07:00
qctecmdr
3f9b08b09e Merge "disp: msm: dsi: add parsing for RSC solver disable property" 2021-05-28 13:41:24 -07:00
Ping Li
9a17c5783b disp: msm: sde: add support for digital dimming
Add a new connector property to allow DC dimming feature to set
dimming backlight LUT. This change also adds a connector event
for client to register for backlight info needed for digital dimming
feature, including OS brightness, OS brightness_max, panel_backlight,
panel_backlight_max, and scale factors from ABA and LTM features.

Change-Id: I78f713fb2b965ca24effd973b4dfa9ff07a852f8
Signed-off-by: Ping Li <pingli@codeaurora.org>
2021-05-25 16:16:18 -07:00
Raviteja Tamatam
b89a3f739a disp: msm: populate submode blob information
Mode information apart from the fields in
drm_mode_modeinfo that can trigger a modeset like
dsc-nondsc, video-cmd are defined in sub mode.
For each mode in connector->modes there can be
multiple submodes.

Change-Id: Ib8697d3fa4ea5261d9ac4943b1a4149e22c4da2f
Signed-off-by: Raviteja Tamatam <travitej@codeaurora.org>
2021-05-20 21:35:38 -07:00
Yashwanth
7e03fb61fd disp: msm: add support for seamless dsc switch
This change adds logic to determine dsc switch based on
the connector property "CONNECTOR_PROP_DSC_MODE" and
performs seamless DSC switch if there is any change in
DSC configuration. The connector property is populated
in msm_sub_mode based on which suitable mode is selected.

Change-Id: Ifc4931f16dfb814781bc1d72b103e09103e6bfee
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
2021-05-20 21:34:27 -07:00
Satya Rama Aditya Pinapala
134e62f655 disp: msm: dsi: add parsing for RSC solver disable property
For higher refresh, to provide higher transfer time we need to disable
RSC solver in MDP. This can be configured through the panel timing node
devicetree property. This change adds the parsing of the devicetree
property.

Change-Id: I9e708325da35086d2f955cbcc80bb164ccb116cd
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2021-05-20 12:24:05 -07:00
Steve Cohen
e5fa459062 disp: msm: restrict AVR_STEP based on panel requirement
Some panels require a fixed step rate for a particular mode.
This change allows DSI panels to specify a single supported
step rate for each nominal fps rate which SDE will enforce
during atomic check of AVR parameters.

Change-Id: I049415449bc88ccd396fced16d4534251eac3a06
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2021-04-04 18:45:40 -04:00
qctecmdr
9a6cf71691 Merge "disp: msm: dsi: add qsync fps value to the connector blob" 2021-03-31 10:25:48 -07:00
Satya Rama Aditya Pinapala
2fec1685d0 disp: msm: dsi: add indexing for panel timing nodes
The order of the panel timing nodes specified in the device tree is
not guaranteed to be the same while being parsed in the driver. This
results in unintended modes being set as preferred timing mode. The change
introduces cell-index property, so that the timing modes can be
accurately indexed and parsed.

Change-Id: I8ccd4d5a15643bfe72bc8be084f5e91fac26feb4
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2021-03-26 16:04:48 -07:00
qctecmdr
b2c440bffe Merge "disp: msm: dsi: use single mode for RFI feature" 2021-03-24 14:16:57 -07:00
qctecmdr
ee2a505703 Merge "disp: msm: dsi: defer clk setting when doing const_fps RFI" 2021-03-24 14:16:57 -07:00
qctecmdr
7d1ca7c295 Merge "disp: msm: sde: add multi-mode RFI support" 2021-03-24 14:16:57 -07:00
Amine Najahi
c5f2bd7401 disp: msm: sde: add multi-mode RFI support
Currently, RFI feature only supports panel that contains
a single timing node. This limits the feature availability
for panel with multiple modes or with DFPS support.

This change adds support for RFI on panels that contains
multiple timing nodes.

Change-Id: I3a7aadf7b6da3518350b2eb815602b13b5c259f5
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
2021-03-24 06:32:45 -07:00
Amine Najahi
d4def5bd8c disp: msm: sde: add new interface for RFI feature
Add a new connector range property and a new entry to the panel
capability blob to publish the list of supported RFI frequencies.
In addition, add the required functions to set, validate and update
DSI bit clock rate value to trigger an internal seamless mode switch
and reconfigure DSI clock and PLL.

Change-Id: I7d19cc369f8c5528709f2f20a51ef02180ebdea4
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
2021-03-24 06:32:17 -07:00
Yuan Zhao
484387e860 disp: msm: dsi: defer clk setting when doing const_fps RFI
When doing const fps RFI, dynamic refresh clock was done
in the next frame kick off, so as the orginal RFI work flow,
the clock setting also should be done here.

Change-Id: Ic3e6a35dc7264df028f5d848ac6f1eea04a95126
Signed-off-by: Yuan Zhao <yzhao@codeaurora.org>
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
2021-03-22 19:15:28 -07:00
Yashwanth
c41ed4829e disp: msm: dsi: add qsync fps value to the connector blob
This change populates qsync fps value in connector blob
to pass onto the userspace if qsync is enabled on the
target.

Change-Id: I2a14e7dbdbd7000562307c37e93f22182e3154b8
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
2021-03-17 11:51:24 +05:30
Ritesh Kumar
74435c1580 disp: msm: dsi: Fix DFPS sequence when constant fps is enabled
When DFPS and dynamic clock switch with constant fps are
enabled, wait for dynamic refresh done only if clock switch
is triggered. In case where only fps changes, clock remains
same. So, wait for dynamic refresh done is not required.

Change-Id: I1a96d8d6756086afe2cd6e5bdc19be27c2ffed92
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
2021-03-15 14:15:11 -07:00
Rajeev Nandan
75037208b6 Revert "disp: msm: dsi: move backlight operations to post kickoff"
This reverts commit e60959b052.

Change-Id: I539522a6a01297fecfafb446a44e725679bc39c0
Signed-off-by: Rajeev Nandan <rajeevny@codeaurora.org>
2021-03-03 23:55:49 -08:00
Amine Najahi
50de265951 disp: msm: dsi: use single mode for RFI feature
Currently, a different dsi_display_mode is created for
each combination of RFI frequency, but only one of
those modes is reported to the user. Hence,
it is not necessary to create multiple RFI modes anymore.

This change removes code to inflate the list of modes
by the number of RFI frequencies, removes pclk from
the mode name as it will change dynamically.

Change-Id: I0714de5e53f46d9f142da1f4562f65793de38e54
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
2021-02-17 09:39:08 -05:00
Amine Najahi
08358fd857 disp: msm: remove use of drm_display_mode vrefresh
Use of drm_display_mode vrefresh is being deprecated in
upstream DRM framework. Downstream driver need to use
drm_mode_vrefresh API from now on.

This change removes dependency on drm_display_mode vrefresh
and replaces it with drm_mode_vrefresh API in SDE, DSI and
DP driver. In addition, it also modifies drm_display_mode clock
to align with upstream approach where an uncompressed mode clock
is required to match drm_mode_vrefresh API.

Change-Id: Ie972a2e140adfd81c4e68df8e7bc69feaaca22e1
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
2021-01-13 16:08:27 -05:00
Lei Chen
ab3f86f918 disp: msm: use connector properties to expose and set panel mode
Expose panel mode from kernel to SDM with SDE connector property
CONNECTOR_PROP_MODE_INFO and set panel mode from SDM to kernel
with SDE connector property CONNECTOR_PROP_SET_PANEL_MODE for
avoiding private change in upstream code in QGKI kernel.

Change-Id: I0629dad9399967cc1118ac02ce30597076ca367d
Signed-off-by: Lei Chen <chenlei@codeaurora.org>
2021-01-13 23:40:22 +08:00
orion brody
d00d481360 disp: msm: move from drm_mode to msm_mode
Move away from the private and private_flags fields from drm_mode,
as it is being deprecated in latest kernel version. Instead, Add
msm_display_mode as a wrapper to be used in downstream to store these
parameters. Also, store msm_mode in connector_state to be accessed
in commit path.

Change-Id: Ia5bdebe75f00aa15fb7db4dc3a0d50c30894a95c
Signed-off-by: Orion Brody <obrody@codeaurora.org>
2021-01-04 13:18:36 -08:00
orion brody
dee5134f1e disp: msm: add private mode_seamless flag
This change adds DRM_MODE_SEAMLESS to private flags downstream,
as it was deprecated from drm UAPI. Additionally, this will
update the is_mode_seamless function to access the seamless
flag from private flags.

Change-Id: Idea0b4ac8e71063c000f582d3228bc0a50a6a8e6
Signed-off-by: orion brody <obrody@codeaurora.org>
2020-12-17 12:10:48 -08:00
Samantha Tran
0c08cb1fb5 disp: msm: update parameters for drm_bridge_attach
Commit a25b988ff83f ("drm/bridge: Extend bridge API to
disable connector creation") and commit ee68c743f8d0 ("drm: Stop
including drm_bridge.h from drm_crtc.h) add additional input flags.
This change adds fixes to the drm bridge attach API and includes
relevant drm_bridge header files.

Change-Id: I85e84eaff7df2995243896108a217fae81716b63
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
2020-12-16 17:27:46 -08:00
Samantha Tran
16cc165833 disp: msm: obtain bridge from bridge chain
Commit 05193dc38197 ("drm/bridge: Make the bridge chain
a double-linked list") creates a bridge chain linked
list. This change updates the relevant changes to msm
driver to use the list to find the bridge associated to
the encoder.

Change-Id: I59eb2910be96f4fff7bdbeb040d6ad204c41d747
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
2020-12-16 17:24:59 -08:00
Rajeev Nandan
e60959b052 disp: msm: dsi: move backlight operations to post kickoff
This change moves the backlight update operation from
drm bridge enable to connector post kickoff.

When timing engine is enabled with programmable fetch
enabled, the timing engine will start counting from
the prog_fetch_start point (which is somewhere in VFP).
It’s a grey area from that point to the actual panel
vsync and SW should not trigger DMA command during that
time.

During display resume, sometimes the INTF timing engine
do not get enabled completely at the first vblank irq.
The backlight update cmd transfer trigger as part of the
drm bridge enable can also take place at the same time,
that may cause DSI cmd transfer failure.

Change-Id: I2722d3c23012ef0e7bcc7f728ec5658318ce4e60
Signed-off-by: Rajeev Nandan <rajeevny@codeaurora.org>
2020-12-11 12:14:54 +05:30
Satya Rama Aditya Pinapala
ae5b602b4f disp: msm: dsi: trigger broadcast commands using DMA start window
As per the HW requirements it is highly recommended to use DMA start
window to trigger  broadcast commands. If not used then it can
result in a hardware hang with the DSI controllers going out
of sync. This behavior is even more prominent in cases of higher
refresh rates. As part of the change we change the default DMA
scheduling behavior to default to maximum possible DMA window
in case it is not specified in the panel device tree.

Change-Id: Ied4df9063664cedbc18ce009054d4e5ecae30ab2
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-12-04 20:01:55 -08:00
Zhao, Yuan
0cf3838ac8 disp: msm: dsi: recount drm mode count
Drm driver will remove the same mode that defined
in dsi panel dtsi. But the mode count was not updated,
so when checked drm mode, need to recount the mode.

Change-Id: I51a2c40ceb7d4ee83a15f74d9d724b4fb9c8a618
Signed-off-by: Zhao, Yuan <yzhao@codeaurora.org>
2020-11-06 00:36:40 -08:00
Raviteja Tamatam
e5ff0b8f30 disp: msm: sde: add support for qsync min fps list
In current implementation qsync min fps is single value.
It is same for all the list of supported dfps list.
Added support for new dt entry dsi-supported-qsync-min-fps-list
corresponding to the fps supported in the dfps list
dsi-supported-dfps-list.

Change-Id: Ifd5309c2f51865a3c0d9fadb65cbcd291b6ef42b
Signed-off-by: Raviteja Tamatam <travitej@codeaurora.org>
2020-10-15 12:32:25 +05:30