Revīziju grafs

40 Revīzijas

Autors SHA1 Ziņojums Datums
Priyanko Sarkar
2993c7c4d6 msm: debugfs v2 changes
1. Prints Global shared memory & hashtables on console.
 2. Provides flexibility to select tables and columns.
 3. Provides option to specify handle range.
 4. Option to print details of specific handle.

Change-Id: I974cb16004328aa81020c008b486b4a78167f7be
Signed-off-by: Priyanko Sarkar <quic_priyanko@quicinc.com>
2023-08-03 02:53:44 -07:00
Kuldeep Singh
bde84ad2fb msm: synx: Fix to block wait till all handles are signaled
Fixed a race condition in case of global and local merge
where wait was unblocked without waiting for signal on local
handles.

Change-Id: Ib1a87dd4b766c5d45114daae7539dc044488b724
Signed-off-by: Kuldeep Singh <quic_kulsin@quicinc.com>
2023-07-28 08:40:47 +05:30
Viraj Mandlekar
88d2c55b0c msm: synx: ipclite: Versioning
1. IPCLite now support downgrading of APIs
depending on the version.
2. Version can be configured from Device Tree
3. Features can be configured from Device Tree
4. FW would downgrade to compatible versions.

Change-Id: Ie6a4d94f63a5ed4bea6327ced218cfb75fb9b8e6
Signed-off-by: Viraj Mandlekar <quic_vmandlek@quicinc.com>
2023-07-10 23:22:04 -07:00
Nagendra Jamadagni
b0fd26d5a8 msm: synx: ipclite: Testing for IPCLite
1. Enables user to test all features of IPCLite.
2. Sends testing pings and receives replies to verify proper
functionality.
3. Allows end user to configure test with various testing parameters.

Change-Id: Id22ee40990cfe750301d1c03d6215f49a03bae47
Signed-off-by: Nagendra Jamadagni <quic_njamadag@quicinc.com>
2023-07-10 22:56:26 -07:00
qctecmdr
091547e076 Merge "msm: synx: Added check while signaling merged handle" 2023-07-09 23:10:33 -07:00
Chelliah Vinu R
bfffddb83e msm: synx: ipclite: Export HW Mutex APIs
Cleaned up the HW Mutex functions to export APIs
(acquire and release) for cross-core testing.

Change-Id: I2ddda8b5fc67c80a8a372a2c4124b887f8130e14
Signed-off-by: Chelliah Vinu R <quic_chelliah@quicinc.com>
2023-07-07 10:55:05 -07:00
Kuldeep Singh
df0f5418d0 msm: synx: Added check while signaling merged handle
Added a condition while dispatching callbacks so that
in case of merged handles callback is dispatched only when
all handles are signaled.

Change-Id: Ida6cf2c8bab6f7d66d625f2b14e49418dd794d44
Signed-off-by: Kuldeep Singh <quic_kulsin@quicinc.com>
2023-07-06 03:00:45 -07:00
Amir Suhail
d0224b1e5f msm: synx: Updating Header File
Updating comments for structures and functions to reflect
the latest changes supported by framework.

Change-Id: Ie990df2790f5c19f1addd569f2f4a8c6a74d468e
Signed-off-by: Amir Suhail <quic_asuhail@quicinc.com>
2023-07-06 12:53:43 +05:30
Urvesh Rathod
d87e10c694 msm: synx: async_wait timeout changes
Adding timeout parameter for async wait so the callback
will be invoked on timer expiry if not signalled.

Change-Id: Ia31f59021f00befed5317fdac262d823c659c6bf
Signed-off-by: Ram Nagesh <quic_ramnages@quicinc.com>
Signed-off-by: Urvesh Rathod <quic_urathod@quicinc.com>
2023-07-03 02:11:34 -07:00
Chelliah Vinu R
26a5a7df0d msm: synx: ipclite: TOC Restructuring
1. Offset based TOC setup, which should be parsed
   by the FWs to build required structures.

2. Dynamic Partitioning support - where the enabled
   hosts' info is parsed from DT and only required
   partitions are allocated in the global memory.

3. Magic Number based TOC header data integrity.

4. Clean ups
 - Channel status moved to partition header
 - Use only standard kernel return codes

Backward Compatibility Scenario:

Older APPSS code will have toc.size in place of
magic number, hence the value will be 4096, which
should be detected by the FW to use older structures.

Change-Id: I776eca4bdd997e983d35ef1e1f068cf73cdb72f7
Signed-off-by: Chelliah Vinu R <quic_chelliah@quicinc.com>
2023-06-14 22:57:06 -07:00
Urvesh Rathod
e7e3b4aaac msm: synx: Custom signal support
This change ensures clients can send anything greater
than 64 as custom status from APSS to other cores.

Change-Id: Ib7f507e666fe0b60c5fc09f90652a09e15634376
Signed-off-by: Urvesh Rathod <quic_urathod@quicinc.com>
2023-06-06 10:59:33 +05:30
qctecmdr
662c071517 Merge "msm: synx: Enable bazel compilation for synx" 2023-05-31 02:24:36 -07:00
NITIN LAXMIDAS NAIK
aa30245061 msm: synx: Enable bazel compilation for synx
Add new macro to enable bazel compilation by default

Change-Id: I16543286b579be5fa920a313cb40498d48f3259b
Signed-off-by: NITIN LAXMIDAS NAIK <quic_nitinlax@quicinc.com>
2023-05-24 21:10:44 -07:00
qctecmdr
65065375e5 Merge "msm: synx: Enabling async wait support on merged fence" 2023-05-19 01:36:19 -07:00
qctecmdr
a2aea0f81c Merge "msm: synx: Releases global handle index if handle is not signaled" 2023-05-19 00:24:27 -07:00
Urvesh Rathod
f263633795 msm: synx: Enabling async wait support on merged fence
This change enables support to perform async wait on pure local,
pure global, combination of local and global synx fence and nested
merge fence.

Change-Id: I51a1d1998dca997db52bfa5c393bda3e7c2af985
Signed-off-by: Urvesh Rathod <quic_urathod@quicinc.com>
2023-05-18 12:19:30 -07:00
Urvesh Rathod
6b566f4639 msm: synx: Releases global handle index if handle is not signaled
This change provides fix for below issues :
1. If local handle is imported as global, synx takes extra reference
   on global handles which were not released because on signal
   callback data had local handle instead of global causing handle
   leak.
2. If all the child handles of merge fence are local and
   merged fence is global, upon merge its signaled incorrectly
   as num_child == 0 even if no one signaled merged fence.
3. During merge synx takes one reference each child dma fences.
   When merged fence is released, dma fence reference of child handles
   were not released causing handle/dma fence leak. This change
   signals underlying child fences if the merged handle is ACTIVE
   during release and release reference on dma fence.
4. If local handle is imported as global, map_count was not getting
   incremented because of which object was destroyed more than once.
   This change increases the map_count variable when local handle is
   imported as global or vice-versa.
5. In synx_signal API, synx_signal_offload_job followed by signaling
   dma fence. synx_signal_offload_job internally calls
   synx_signal_handler which signals dma fence and because of which
   sometimes synx_signal was returning failure. This fix ensures that
   synx_signal_handler does not overtake synx signal API.

Change-Id: Ia8d2eb969514347cac30f8ae33ce2028119dfd47
Signed-off-by: Urvesh Rathod <quic_urathod@quicinc.com>
2023-05-19 00:45:47 +05:30
Urvesh Rathod
888868eca3 msm: synx: Dipatching un-released callbacks during release
This change ensures that any undispatched callbacks are released
while destroying object if handle is not signaled.

Change-Id: I18ee66b9a6ceb390df4d5f5c4f4cd77c5f9f2090
Signed-off-by: Urvesh Rathod <quic_urathod@quicinc.com>
2023-05-09 18:50:22 +05:30
Pravin Kumar Ravi
a1825820d5 msm: synx: Move dprintk outside spinlock
synx_client_destroy prints a log holding a spinlock which causes
watchdog bite due to excessive log. This change prints the log after
releasing the lock.

Change-Id: I42021fd8d07cc595a31a0396f138ac18bcb5bd0f
Signed-off-by: Pravin Kumar Ravi <quic_pravinku@quicinc.com>
2023-04-26 17:22:46 -07:00
Chelliah Vinu R
ec2db68e0f msm: synx: ipclite: Remove Hyp Assign
Hyp assign is removed from ipclite. S2 mapping
for CDSP & LPASS will be assigned from DSP PIL
driver going forward.

Cleaned up ipclite probe exit on failure.

Change-Id: I342da2bb89024c252eebd4411194093ac77401d5
Signed-off-by: Chelliah Vinu R <quic_chelliah@quicinc.com>
2023-04-25 10:55:59 +05:30
Urvesh Rathod
f549339d0b msm: synx: Fix for dispatching callbacks in kernel fencing
If wait-signal happens on APSS core, callbacks were not getting
dispatched because of recent changes (CR3442156). This fix ensures
callbacks are dispatched properly when handles are signaled.

Change-Id: I0b11634327afa3575c12819a639e104b27e82707
Signed-off-by: Urvesh Rathod <quic_urathod@quicinc.com>
2023-04-11 00:03:40 -07:00
Pravin Kumar Ravi
9040173668 synx: Propagating changes from msm-5.10
Includes async_wait(timeout) and other fixes

Change-Id: I46871f7fd343287cbd7f9e6ec48efc8ef5ce049a
Signed-off-by: Pravin Kumar Ravi <quic_pravinku@quicinc.com>
2023-04-05 13:10:41 -07:00
Urvesh Rathod
d120b83d98 msm: synx: Adding merge API support for synx V2
This change enables clients to signal synx merged handles
from same and other cores. This change also ensures
that underlying child dma fences are signaled when composite
synx handle is signaled from other core.

Change-Id: Ib81bc2291c85b93fe11eddf5d0ce450bbe486c83
Signed-off-by: Urvesh Rathod <quic_urathod@quicinc.com>
2023-03-21 18:07:43 +05:30
John Moon
7570178ce3 msm: synx: build: Add copy_to_dist_dir rule
Add copy_to_dist_dir to Bazel build to output kernel build outputs
to dist dir.

Change-Id: I7e142d1e8e8f9f81ed25b938ee7799969870be8d
Signed-off-by: John Moon <quic_johmoo@quicinc.com>
2023-03-06 14:14:47 -08:00
Chelliah Vinu R
384846c393 msm: synx: ipclite dt-bindings moved from kernel to vendor
The DT-bindings which has macros for IPCLite signal
usage, has been moved from kernel SI to vendor SI as
all IPCLite related changes can be done in synx-kernel
vendor SI without any kernel change going forward.

Change-Id: I5047684d043df25dd607bd5943791850adc1bac0
Signed-off-by: Chelliah Vinu R <quic_chelliah@quicinc.com>
2023-03-06 00:25:23 -08:00
Linux Build Service Account
7ab6a6bf37 Merge "synx: adding a macro for invalid synx handle" into synx-kernel.lnx.1.0 2023-03-03 12:29:28 -08:00
Pravin Kumar Ravi
525a2fe19a synx: adding a macro for invalid synx handle
In use cases where some buffers are passed without a synx handle,
the client needs to define an additional parameter to indicate
whether the h_synx field is valid. This adds to the command size.
Assigning h_synx=SYNX_INVALID_HANDLE can avoid this.

Change-Id: Ibf9dcf9641236ab2ad4c106904f3f17c879486bf
Signed-off-by: Pravin Kumar Ravi <quic_pravinku@quicinc.com>
2023-03-03 11:28:12 -08:00
Chelliah Vinu R
5ea1e02ada msm: synx: ipclite: Switch to qcom_scm_assign_mem from hyp_assign_phys()
hyp_assign_phys is replaced by the upstream API qcom_scm_assign_mem,
as hyp_assign_phys is planned to be deprecated

Change-Id: I4371675b881735b92cc12d3f87c7d171acda5a97
Signed-off-by: Chelliah Vinu R <quic_chelliah@quicinc.com>
2023-02-28 22:35:08 +05:30
NITIN LAXMIDAS NAIK
1fb50c3272 msm: synx: build: bazel build DDK change
Add support for synx modules to be built with Bazel DDK framework for pineapple.

Change-Id: I375ea8a722f2afdfd5a9354854675030ebd38d96
Signed-off-by: Ram Nagesh <quic_ramnages@quicinc.com>
2023-02-23 15:33:32 +05:30
Pravin Kumar Ravi
33788f7297 synx: Propagating changes from msm-5.10
Includes param change for async_wait(timeout) and other fixes

Change-Id: If8ff795538bbfaf53ee1758561fbd2841e5a71c7
Signed-off-by: Pravin Kumar Ravi <quic_pravinku@quicinc.com>
2023-02-21 17:02:26 -08:00
Pravin Kumar Ravi
a1529349b1 synx: Disable DBG level
Disable DBG level to prevent log flood

Change-Id: If3bf49e9a723ac0a94d5e7775292d9a5d550570f
Signed-off-by: Pravin Kumar Ravi <quic_pravinku@quicinc.com>
2023-02-17 14:11:51 -08:00
Chelliah Vinu R
82fbaea349 msm: synx: ipclite: IPCLite Debug
Below dynamic debug mechanisms are added:
1. Sysfs based control for kernel logs
2. In-memory logging
3. Debug Structures

Change-Id: I1da118881b5e79ddd2ada91749da13233e360e16
Signed-off-by: Chelliah Vinu R <quic_chelliah@quicinc.com>
2023-02-02 20:36:58 +05:30
Pravin Kumar Ravi
eeb75f9c23 synx: support ICP core
This change adds necessary functionality to support ICP core.

Change-Id: I55793f6508ae5d7180b0f50d477e366842199148
Signed-off-by: Pravin Kumar Ravi <quic_pravinku@quicinc.com>
2023-01-30 16:13:38 -08:00
Chelliah Vinu R
fd9e62c31f msm: synx: ipclite: Added ICP core to IPCLite Global memory
Enables ICP to communicate with other cores through
corresponding channels

Change-Id: Id7e6e9e14ee257bcce014c29147877375d8d48bb
Signed-off-by: Chelliah Vinu R <quic_chelliah@quicinc.com>
2022-12-22 02:34:06 +05:30
NITIN LAXMIDAS NAIK
4e4dd1af37 msm: synx: synx_kernel_board.mk change to disable recovery mode
Remove synx from recovery mode and add ipclite to ramdisk modules

Change-Id: Iedec1f6961bef5be1b73fbd3543a01a651698780
Signed-off-by: NITIN LAXMIDAS NAIK <quic_nitinlax@quicinc.com>
2022-12-16 11:19:29 -08:00
Linux Build Service Account
82f82b985a Merge "msm: synx: android.mk modification to enable automatic loading of drivers" into synx-kernel.lnx.1.0 2022-11-02 23:42:46 -07:00
NITIN LAXMIDAS NAIK
f2f91c79c0 msm: synx: android.mk modification to enable automatic loading of drivers
Modified android.mk to generate ipclite.ko in OUT/dlkm/lib/modules

Change-Id: I374de933b73e8ba94d55836c527669570970db90
Signed-off-by: NITIN LAXMIDAS NAIK <quic_nitinlax@quicinc.com>
2022-11-02 19:34:22 -07:00
Chelliah Vinu R
a2639f4c3d msm: ipclite: Rebased SSR updates from kernel_platform
Added latest SSR updates in IPCLite from kernel_platform
to vendor space

Change-Id: I9e551a0d69f45d89cae2165e25468945fcc68f7f
Signed-off-by: Chelliah Vinu R <quic_chelliah@quicinc.com>
2022-10-23 19:41:07 +05:30
NITIN LAXMIDAS NAIK
25cb61693a msm: synx: build script as DLKM for Vendor SI
added mk and Kbuild script to support building synx driver as external module for Vendor SI

Change-Id: Ib66325d115ca46e6b61de1e168e85d09419f73e2
Signed-off-by: NITIN LAXMIDAS NAIK <quic_nitinlax@quicinc.com>
2022-09-15 10:11:42 -07:00
Gerrit SelfHelp Service Account
c9856ccfeb Initial empty repository 2022-05-06 17:27:21 -07:00