Currently we are enabling all the lanes irrespective of the
lanes we are actually going to use. Add support to enable
only those lanes that are required and thus save power.
Change-Id: I9aae76eeaa05a79337d4e4b1f2e36ea9842bd580
Signed-off-by: Srihitha Tangudu <quic_tangudu@quicinc.com>
In dual display configuration, where only one display is active at a time,
dsi0 and dsi1 can be used to drive primary large display and, one of the
dsi (dsi0 or dsi1) can be used to drive secondary display. This helps to
time division multiplex shared DSI for primary and secondary panel which
solves the bandwidth limitation problem. This change adds support to allow
sharing of dsi ctrl and phy between dual displays.
Change-Id: Ib4ed1bf51f587b544ec24b1b558ff83225b36e4b
Signed-off-by: Ritesh Kumar <quic_riteshk@quicinc.com>
The change adds a check for DSI controller and PHY resources during the
DSI display probe. The validation now only checks for the availabilty
of the resources without increasing the refcount of the controller or
PHY till an exact match is found after the device tree is parsed.
Change-Id: I96a5022a8ab5f55271e0df36675037b597e1ec85
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
PLL codes from devicetree are only required if dynamic clock is enabled
for video mode panels. This change ensures that unnecessary error logs are
not seen for all other panels, by parsing the data only if the panel property
is set.
Change-Id: I206520aab65b7a5613909c8ff527e88303533617
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
Change avoids clock framework APIs to configure the DSI PHY
PLL. It follows HW recommendation to set the byte and pclk
dividers.
Change-Id: I8c110f3997e4ec4c2eaa28778b70091855725ab8
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
This change allows dynamic refresh trigger to sw trigger
and mdp intf flush. With this we can make sure that DSI
timing/clock update and mdp intf timings are updated in
one vsync.
Change-Id: Ic807f498e2e47be6dd0f1e11ff1fc0896a8ec758
Signed-off-by: Vara Reddy <varar@codeaurora.org>
Add support to read register ranges and IRQ lines that needs
isolation during VM switch in dsi ctrl and dsi phy.
Register for VM resource collection event providing the
callback function.
Change-Id: I5eae4699b0a97ffed438627ccea855c401b3fbeb
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Display in trusted VM works in a handover mode i.e, all
display components need to be initialized by the primary VM
before switching to trusted VM on the usecase boundary.
That makes it a hard requirement for the trusted VM not to
re-program any of the display configuration registers before
it could hand the HW back to the primary VM.
Also, most of the linux framework drivers including pintrl, clocks
are not enabled in the trusted VM.
In order to address the above two limitations and to control the
probe/commit sequences, this change adapts the same path as that
of continuous splash to bypass some of the critical functions
which are identified to be HW intrusive. Based on the DT property
read from SDE handle, dsi drivers will choose to bypass
enable/disable HW state updates when executing in the vm environment.
Change-Id: Ica71c924d189ab65fe3be5b0ac870633e3b749e1
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
DSI PLL is tightly coupled with DSI PHY. This change removes
separate DSI pll driver and makes DSI pll as a subnode to DSI
PHY which is an accurate way of representation. In addition, this
change adds support for 5nm DSI ctrl and PHY revisions and adds
DSI pll support for 5nm. Remove support for older DSI pll revisions
such as 7nm, 10nm, 14nm, 20nm, 28nm.
Change-Id: Ic8b886a9fe24b906e4ec5130720600efa1e59b68
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
DSI PHY timings must be committed every time the values
are updated after a dynamic mode switch.
Change-Id: Id605c76dfe75ec41ceb89000f24baccda189e82f
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
This change is a snapshot of dsi files taken of 4.14
as of commit 764f7c2 (Merge remote-tracking branch
'quic/dev/msm-4.14-display' into msm-4.14)
Change-Id: I8361a844c35a4450f7800964a8da2741676fd6c7
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
This change adds support for dynamic switching of dsi clocks
to avoid RF interference issues. Also with dynamic dsi clock
switch feature coming into picture, now populate the supported
refresh rate as list instead of providing a range. Modify the
logic to enumerate all the modes in dsi driver, taking dynamic
bit clocks, resolutions and refresh rates into account.
Change-Id: I5b6e62bc935cf2234bdd96fcb3c7537b4e735fff
Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
Signed-off-by: Yujun Zhang <yujunzhang@codeaurora.org>
This change brings msm display driver including sde,
dp, dsi, rotator, dsi pll and dp pll from base 4.19 kernel
project. It is first source code snapshot from base kernel project.
Change-Id: Iec864c064ce5ea04e170f24414c728684002f284
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
