İşleme Grafiği

122 İşleme

Yazar SHA1 Mesaj Tarih
Krishna Manikandan
70d2ee1bf4 disp: msm: sde: enable system cache support for shima
This change enables system cache support for shima
target which allows sde to read image from system
cache instead of DDR memory during static display
for video mode panels.

Change-Id: I2d7e17c4a6f6b477acf84fd2914c8db2d83df286
Signed-off-by: Krishna Manikandan <mkrishn@codeaurora.org>
2020-10-01 12:02:42 +05:30
Krishna Manikandan
5bacc44468 disp: msm: sde: enable trusted vm support for shima
Enable catalog entry to support trusted vm support
for shima target.

Change-Id: I1bdabf20243f7b52ad5978e75cd6decfa30c9b36
Signed-off-by: Krishna Manikandan <mkrishn@codeaurora.org>
2020-09-17 11:26:53 +05:30
qctecmdr
eeb99bc637 Merge "disp: msm: sde: update min_prefill lines for lito and lagoon" 2020-09-10 18:45:36 -07:00
Jayaprakash
12bfeccd42 disp: msm: sde: update min_prefill lines for lito and lagoon
Add changes to update min_prefill_lines to 40 for
inline rotation use-cases on lito and lagoon targets.

Change-Id: I1d6ba877972e31a8f950d98ebab8944e1b93cef0
Signed-off-by: Jayaprakash <jmadiset@codeaurora.org>
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-09-08 18:45:39 -04:00
Amine Najahi
deae97dd0d disp: msm: sde: Allow for overriding CP features flush mechanism
Allow for overriding color processing features that normally uses
DSPP flush to use LM flush instead. This is required on targets
where some of the DSPP features have been tied to LM flush bits.

This changes adds a field in color processing node to track if the
override is needed and enables LM flush override for rounded corner
on target requiring it.

Change-Id: I584bd7b20dfc9fc7795b1b3b10e2f17a82945ce4
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
2020-08-26 22:20:05 -07:00
Yashwanth
8a72802e89 disp: msm: sde: add rev check for scuba target
Add required sde revision checks for scuba target.

Change-Id: Ic3f0f8e2b182d0d68b2f5342043d3e12f0f35557
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-08-25 01:07:34 -04:00
Jayaprakash
d0d8918487 disp: msm: sde: add rev check for Lagoon target
Add required sde revision checks for lagoon target.
Also, update rscc branch offset for lagoon.

Change-Id: Id445caf6b584a6a35a4d9797e6d85aa9af9ee0bf
Signed-off-by: Jayaprakash <jmadiset@codeaurora.org>
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-08-25 01:07:29 -04:00
Steve Cohen
d66ea6fc29 disp: msm: sde: use the correct get_status op for all INTFs
A new status register was added in DPU 5.x to INTFs to allow for
confirmation when the timing engine is disabled. This
functionality was controlled via an overloaded feature flag
which is used to enable INTF tear-check ops (also added in DPU
5.x). External displays support INTF_STATUS but have no use for
any tear-check functions. Separate these features so they can be
enabled individually on the interfaces which support them.

Change-Id: Ib8548619cb58bf19b7c02211ead7f33f52ffeae4
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-08-23 21:23:18 -04:00
Lei Chen
f11da41a6e disp: msm: sde: add a property to control display input touch event
Display input touch event is replaced with IOCTL in performance HAL
to early wake up DSI clock.
Add a property to enable/disable display input touch event for backward
compatibility.

Change-Id: Ib6b9123d726e79a2927b05d1ef77c343f01d0c5e
Signed-off-by: Lei Chen <chenlei@codeaurora.org>
2020-08-12 17:32:20 -07:00
Narendra Muppalla
69f2101ccc disp: msm: sde: update min prefill lines for lahaina
This change updates min prefill lines for lahaina target.

Change-Id: I004244585c3940bddf600290a7c0fe5b5ef5885e
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
2020-08-04 12:35:17 -07:00
Krishna Manikandan
d141d184e6 disp: msm: sde: fix cache controller node parse logic
Cache controller is not a sde property, add
proper parsing logic to get the compatible version
of llcc cache.

Featurise system cache support with a catalog entry as it
provides a finer control to enable/disable llcc
for display.

Change-Id: I07fa8e144d0a4fa32ab16e46142c7b68f771d9c7
Signed-off-by: Krishna Manikandan <mkrishn@codeaurora.org>
2020-07-20 16:47:20 +05:30
qctecmdr
5e96ba152b Merge "disp: msm: sde: add rev check for shima target" 2020-07-14 09:50:09 -07:00
qctecmdr
8c127fd44f Merge "disp: msm: sde: add support to parse hbb and ddr type" 2020-07-14 09:50:09 -07:00
Krishna Manikandan
0e257f3325 disp: msm: sde: add support to parse hbb and ddr type
Add support to parse ddr type and corresponding
highest bank bit for configuring UBWC parameters.

Change-Id: I54f79a60f55fd6b146783c8f53fce1bf6c8d8d0a
Signed-off-by: Krishna Manikandan <mkrishn@codeaurora.org>
2020-07-13 18:09:10 +05:30
qctecmdr
47918b2ba5 Merge "disp: msm: sde: update uidle wd timer load value and fal1 threshold" 2020-07-13 02:05:31 -07:00
Krishna Manikandan
bb7d5f490f disp: msm: sde: add rev check for shima target
Add required revision checks for shima target.

Change-Id: I610263844c280e12b91a8b88781a6b6344415174
Signed-off-by: Krishna Manikandan <mkrishn@codeaurora.org>
2020-07-13 11:25:00 +05:30
Krishna Manikandan
471b1ef0bc disp: msm: sde: add rev checks for holi target
Add required revision checks for holi target.

Change-Id: I27daa66d9af10f90a5432b5698bbdb16d7866c2f
Signed-off-by: Krishna Manikandan <mkrishn@codeaurora.org>
2020-07-13 10:17:19 +05:30
Jeykumar Sankaran
b09250d7ed disp: msm: sde: parse property for max concurrent TUI displays
Add support in hw catalog to parse the maximum number of concurrent
TUI displays supported in SDE.

Change-Id: Ic1f4d93afc472c2fa073e1d292ebd1d27e40f4ec
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
2020-07-10 15:48:37 -07:00
Linux Build Service Account
b86633e592 Merge changes Iea651a2f,Idb564927 into display-kernel.lnx.5.4
* changes:
  disp: sde: add CRTC property for VM requests
  disp: msm: sde: add capability flag for trusted VM support
2020-07-01 11:36:06 -07:00
Dhaval Patel
11b2a41dc8 disp: msm: sde: fix prefill line calculation for high fps
Fix prefill line calculation for high refresh rate
usecase and define correct number of prefill lines
for lahaina target.

Change-Id: Ib3467b9beb43de9c5faa2b1af2d8873a89c9c481
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
2020-06-29 16:17:34 -07:00
qctecmdr
e5e4004854 Merge "disp: msm: sde: avoid physical encoder disable(s) in trusted VM" 2020-06-28 01:57:54 -07:00
Samantha Tran
d46c9286e5 disp: msm: sde: update uidle wd timer load value and fal1 threshold
Update the uidle wd timer load value to 18. This change will allow
a 15us wd timer per hardware recommendation.

Update fal1 threshold value to take the minimum of 15 or the
current setting which takes line time and target idle time into
consideration. The target idle time is also being updated from 10us to
40us.

Change-Id: Ia8d9c2070813beef18fdf342526d82cf8f82989b
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2020-06-26 13:54:33 -07:00
Jeykumar Sankaran
98a6a1131c disp: msm: sde: add capability flag for trusted VM support
Add a new hw catalog flag to indicate target support for
trusted VM. Currently, the flags is set for Lahaina target.

Change-Id: Idb56492758ef580673b2ebf44fecd577a2876f1b
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
2020-06-19 17:46:43 -07:00
Dhaval Patel
31d4bb10a6 disp: msm: sde: add xin client clock status for wb2
CWB may trigger frame missed message if interrupts
are disabled on specific CPU. WB2 will only find single
interrupt status for two posted start triggered frame.
SDE driver will start checking the xin client clock
status for wb2 timeout case to trigger the valid
frame done status.

Change-Id: I16a99667116732002e6dec8a18330f8b45199387
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
2020-06-19 16:28:14 -07:00
Jeykumar Sankaran
cb4f390241 disp: msm: sde: add helper api to check executing VM
Adds a DT property to indicate trusted VM execution
environment and support catalog parsing for the same.
Add helper API to read the value.

Change-Id: I9194618b6f080119f1f15271a9b3c7edf938ca08
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
2020-06-18 11:28:40 -07:00
Jeykumar Sankaran
fdf88f7853 disp: msm: sde: add dt property for QSEED scalar HW revision
QSEED scalar block HW revision is constant for a given MDSS revision.
Both SSPP and DS HW files invoke this API to read the revision register
at various points of time. Expose this revision information through
DT binding and maintain in the catalog to avoid repeated register
reads.

Change-Id: I95c0a5242cfda0aaa4ec5c2ff5c7cc0bed191b59
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
2020-06-12 14:29:42 -07:00
Jeykumar Sankaran
7f35be34eb disp: msm: sde: rename qseed_type to qseed_sw_lib_rev
Rename the property to qseed_sw_lib_rev to indicate that it
represents the qseed sw library revision that is compatible with
the targets qseed hw version.

Change-Id: I5a588dc20cf4a4f76f5c71301538bfc630ea220d
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
2020-06-12 14:29:25 -07:00
qctecmdr
d9b4204aad Merge "disp: msm: sde: add vig formats before qseed and csc initializations" 2020-06-12 00:11:19 -07:00
Amine Najahi
ed868466f5 disp: msm: dp: Extend mode filtering to support 8K
Currently DP driver determines if a mode is DSC capable
based on a DTSI entry and the required number of DSC
to support it. This approach does not scale when there
is an overlap in DSC requirement between DSI displays
and external DP display, thus causing one of the display to
report modes that cannot be supported.

This change compares the resources reserved for DP driver
calculated at initialization time and the currently available
ones to determine the correct number of resources that DP driver
can use. It also adds DSC and topology filtering logic and moves
DSC hardware specific from DP driver to SDE driver.

Change-Id: I8e601de33422b7c6d786826f7bfe152c4af8a6b5
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
2020-06-09 09:17:38 -04:00
santosh
fb72c8faa8 disp: msm: sde: add vig formats before qseed and csc initializations
Setup vig pipe makes an early return if csc and qseed are
not supported. This change moves addition of vig formats
before intializing qseed and csc.

Change-Id: I2eb651f7bbd81757a9de23501fda51a510d0e673
Signed-off-by: santosh <santoshkumar@codeaurora.org>
2020-06-08 11:40:05 -07:00
Yashwanth
4194c7b7cd disp: msm: sde: add dt based support for pm qos irq latency
This change adds dt based support for pm qos irq
latency instead of using hardcoded value.

Change-Id: I9f67ed1092eefac193a409773f841350532bc722
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
2020-06-08 11:39:09 -07:00
qctecmdr
fc27d51acd Merge "disp: msm: sde: fix static cache programming" 2020-05-31 11:49:34 -07:00
Nilaan Gunabalachandran
1fedb0a712 disp: msm: sde: fix static cache programming
Add smmu cache hint at during the msm gem prime import
to ensure memory is cacheable. Ensure sys cache feature
is added to all sspp, not just vig.

Change-Id: Icc10468ad8d3e7c6aabd437776cde99eb627375a
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
2020-05-28 20:36:51 -04:00
Prabhanjan Kandula
0d6151b303 disp: msm: sde: update wb line width for linear format
This change adds support for enabling WB maximum linewidth
based on color format is linear or UWBC.

Change-Id: Icc71eb14b3156e06036a4a82029d9d7a5c89e909
Signed-off-by: Prabhanjan Kandula <pkandula@codeaurora.org>
2020-05-27 16:27:56 -07:00
qctecmdr
f2b1cba0d5 Merge "disp: msm: dsi: add api to control dsi active status" 2020-05-25 13:47:05 -07:00
qctecmdr
a8f62850f1 Merge "disp: msm: sde: avoid disabling dsc encoder in PP block" 2020-05-25 10:52:49 -07:00
qctecmdr
fc44cf529b Merge "disp: msm: sde: add ubwc entries to crtc only if supported" 2020-05-25 10:52:48 -07:00
Veera Sundaram Sankaran
6575366a16 disp: msm: sde: fix possible null pointer dereference
Fix a possible uninitialized variable usage in sde
catalog and a null pointer dereference in sde crtc.

Change-Id: I4299ade65fa7cf5bfc3d60d6d7a368d523286626
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2020-05-15 10:18:23 -07:00
Veera Sundaram Sankaran
7245366343 disp: msm: sde: parse MDSS HW from device tree
Get the MDSS HW version from the device tree instead
of reading directly from the hardware register.

Change-Id: Icfb7a80c8f19312001b070a454741421fd67aae5
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2020-05-11 12:11:18 -07:00
Narendra Muppalla
fffb767bc0 drm/msm/sde: add sui blendstage support for lahaina
This change adds secure-ui blendstage support for
lahaina target.

Change-Id: If6e0f9df469e39f53329b264416ef9214ec01be9
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
2020-05-05 11:00:44 -07:00
qctecmdr
a2a04712a9 Merge "disp: msm: update VDC-m hardware version in display driver" 2020-05-04 23:32:46 -07:00
Yashwanth
c9b3e866bb disp: msm: sde: add ubwc entries to crtc only if supported
In few targets, ubwc might not be supported. In those
cases, ubwc properties should not be added to crtc.

Change-Id: I57d295fca018239ae3695657963d8162d6a50df5
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2020-05-04 15:00:15 -07:00
qctecmdr
31a258431a Merge "disp: msm: sde: use sde_dt_props for parsing TOP properties" 2020-05-04 08:32:50 -07:00
qctecmdr
dfc3e3ddc8 Merge "disp: msm: sde: add sys cache usage for static image" 2020-05-01 17:58:07 -07:00
Nilaan Gunabalachandran
83ee51cb5a disp: msm: sde: add sys cache usage for static image
Store full or partial static image in system cache (L3 cache)
for video mode primary display. Added additional commit to
crtc commit thread to transition to read cache state.
The change also updates llcc APIs to support generic functionality.

Change-Id: I6b2a45da946d7e0e0b326da9d214be3f01a9420e
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
2020-04-27 15:12:17 -04:00
Steve Cohen
4d8c732c47 disp: msm: sde: use sde_dt_props for parsing TOP properties
Use the new helper for parsing TOP device node properties and
reduce the code complexity by re-arranging the ordering of some
conditional branching which simplifies the logic.

Change-Id: I222bff6d1311f988c57f5f43e677dac4167fb7b9
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-04-23 15:36:18 -04:00
Steve Cohen
0c86eedd21 Revert "disp: msm: sde: add support to handle mdp limits property"
This reverts commit a4c2827a47.

The change is not needed on 5.4 since BW limits have moved to
user-space per-target based XML file, and there are already other
properties for specifying the various linewidth parameters.

Change-Id: I87d81047678869bba6f8ec98104dec17c7a9ace2
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-04-23 14:58:15 -04:00
Thomas Dedinsky
d4124a5322 disp: msm: sde: add rotation and scaling check for max linewidth
Add scaling linewidth variable and logic changes to get
valid max linewidth values for inline rotation and scaling.
Modify linewidth check to compare with scaler source width.

Change-Id: I7c63175e568ecb524f9cdf8ada1d7c6fdc999236
Signed-off-by: Thomas Dedinsky <tdedinsk@codeaurora.org>
2020-04-22 14:08:47 -07:00
Abhinav Kumar
b55251f17f disp: msm: update VDC-m hardware version in display driver
Update the VDC-m hardware version in the display driver as per
the latest programming guidelines.

Change-Id: I0073cb7b713599de43f2a675202390df3b4a1d58
Signed-off-by: Abhinav Kumar <abhinavk@codeaurora.org>
2020-04-21 18:37:57 -07:00
Narendra Muppalla
690deaec8e disp: msm: sde: add pm_qos support for high frame rate display
Add/remove pm_qos request during sde encoder resource
controller enable/disable for high frame rate and command mode display.

Change-Id: I95fab92de8399d8b892751d654e7913166856cf3
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
2020-04-03 09:52:02 -07:00